int ret;
u8 val;
- ade7758_spi_read_reg_8(dev,
- ADE7758_OPMODE,
- &val);
+ ret = ade7758_spi_read_reg_8(dev, ADE7758_OPMODE, &val);
+ if (ret < 0) {
+ dev_err(dev, "Failed to read opmode reg\n");
+ return ret;
+ }
val |= 1 << 6; /* Software Chip Reset */
- ret = ade7758_spi_write_reg_8(dev,
- ADE7758_OPMODE,
- val);
-
+ ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
+ if (ret < 0)
+ dev_err(dev, "Failed to write opmode reg\n");
return ret;
}
int ret;
u8 val;
- ade7758_spi_read_reg_8(dev,
- ADE7758_OPMODE,
- &val);
+ ret = ade7758_spi_read_reg_8(dev, ADE7758_OPMODE, &val);
+ if (ret < 0) {
+ dev_err(dev, "Failed to read opmode reg\n");
+ return ret;
+ }
val |= 7 << 3; /* ADE7758 powered down */
- ret = ade7758_spi_write_reg_8(dev,
- ADE7758_OPMODE,
- val);
-
+ ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
+ if (ret < 0)
+ dev_err(dev, "Failed to write opmode reg\n");
return ret;
}
struct device_attribute *attr,
char *buf)
{
- int ret, len = 0;
+ int ret;
u8 t;
int sps;
t = (t >> 5) & 0x3;
sps = 26040 / (1 << t);
- len = sprintf(buf, "%d SPS\n", sps);
- return len;
+ return sprintf(buf, "%d SPS\n", sps);
}
static ssize_t ade7758_write_frequency(struct device *dev,
if (!st->rx)
return -ENOMEM;
st->tx = kcalloc(ADE7758_MAX_TX, sizeof(*st->tx), GFP_KERNEL);
- if (st->tx == NULL) {
+ if (!st->tx) {
ret = -ENOMEM;
goto error_free_rx;
}
static struct spi_driver ade7758_driver = {
.driver = {
.name = "ade7758",
- .owner = THIS_MODULE,
},
.probe = ade7758_probe,
.remove = ade7758_remove,