X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=CHANGELOG;h=bd3a7b76d8a22d367c31a277e2d6984136301e4f;hb=b5b004ad8a0ac6f98bd5708ec8b22fbddd1c1042;hp=85dc920f2b8089b207247d4e62756f0c6961854b;hpb=5289feadb7857e2eaf81848aa632afa4a07bc0cc;p=karo-tx-uboot.git diff --git a/CHANGELOG b/CHANGELOG index 85dc920f2b..bd3a7b76d8 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,6908 @@ +commit 635e5f8fc82365e6e9734b3132bc95135a6de679 +Author: Wolfgang Denk +Date: Sun Jan 18 21:37:48 2009 +0100 + + Prepare 2009.01-rc3 + + Update CHANGELOG + + Signed-off-by: Wolfgang Denk + +commit 4cda437898f7873752f0201757cd33f12196ce87 +Author: Mike Frysinger +Date: Sat Jan 17 13:32:42 2009 -0500 + + build system: treat all Darwin's alike + + The x86 based version of Darwin behaves the same quirky way as the powerpc + Darwin, so only check HOSTOS when setting up Darwin workarounds. + + Signed-off-by: Mike Frysinger + +commit c088a108c75db565e07292fd668dfa5491e85bc2 +Author: Peter Korsgaard +Date: Wed Jan 14 13:52:24 2009 +0100 + + fdt_resize(): fix actualsize calculations with unaligned blobs + + The code in fdt_resize() to extend the fdt size to end on a page boundary + is wrong for fdt's not located at an address aligned on a page boundary. + What's even worse, the code would make actualsize shrink rather than grow + if (blob & 0xfff) was bigger than the amount of padding added by ALIGN(), + causing fdt_add_mem_rsv to fail. + + Fix it by aligning end address (blob + size) to a page boundary instead. + For aligned fdt's this is equivalent to what we had before. + + Signed-off-by: Peter Korsgaard + +commit fadad1573fb16c90025f08a2861d6047d093cba7 +Author: Mike Frysinger +Date: Fri Jan 9 04:38:17 2009 -0500 + + ncb: use socklen_t + + The recvfrom() function takes a socklen_t, not an int. + + Signed-off-by: Mike Frysinger + +commit fc83c9273cec6e6e542f4a0ea3b653b7d0513ffa +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Jan 11 16:35:16 2009 +0100 + + sh: serial: use readx/writex accessors + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 9e1fa628bdb64745811cdd26c4f953846c076180 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Jan 11 16:35:15 2009 +0100 + + sh: serial: coding style cleanup + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit c9935c992575922b7ef13eec0656ed8665d324e3 +Author: Nobuhiro Iwamatsu +Date: Sun Jan 11 17:48:56 2009 +0900 + + sh: Fix compile error on lowlevel_init file + + lowlevel_init of SH was corrected to use the write/readXX macro. + However, there was a problem that was not able to be compiled partially. + This patch corrected this. + + Signed-off-by: Nobuhiro Iwamatsu + +commit a5b04d00bfeb940c62232972ce644d50b45797f9 +Author: Kieran Bingham +Date: Tue Dec 30 01:16:03 2008 +0000 + + sh: Fix up rsk7203 target for out of tree build + + Fix up rsk7203 target to build successfully using out-of-tree build. + + Signed-off-by: Kieran Bingham + Signed-off-by: Nobuhiro Iwamatsu + +commit f7e78f3b74aae9caca2997bad865a72338326c0a +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Dec 20 19:29:49 2008 +0100 + + sh: use write{8,16,32} in all lowlevel_init + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit e4430779623af500de1cee7892c379f07ef59813 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Dec 20 19:29:48 2008 +0100 + + sh: lowlevel_init coding style cleanup + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 85cb052ee41675ca361e6a4c69455dc715c8f2d9 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Dec 20 15:27:45 2008 +0100 + + sh: update sh2/sh2a timer coding style + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 1e15ff999322e81af4c0c0c548908f38944ba39c +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Dec 20 15:25:22 2008 +0100 + + sh: update sh timer coding style + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 0e3ece33801e377be67ffa29f083421ad820f28b +Author: Wolfgang Denk +Date: Wed Jan 14 23:26:05 2009 +0100 + + Prepare 2009.01-rc2 + + Update CHANGELOG. + + Signed-off-by: Wolfgang Denk + +commit e92c9a860e44c14513c8909ce4299e253a775eeb +Author: Wolfgang Denk +Date: Wed Jan 14 22:35:30 2009 +0100 + + cpu/mpc824x/Makefile: fix warning with parallel builds + + Parallel builds would occasionally issue this build warning: + + ln: creating symbolic link `cpu/mpc824x/bedbug_603e.c': File exists + + Use "ln -sf" as quick work around for the issue. + + Signed-off-by: Wolfgang Denk + +commit 3ba605d4beec649438539e7df97b5fedb26592fb +Author: Matthias Fuchs +Date: Fri Jan 2 12:18:49 2009 +0100 + + ppc4xx: Add loadpci command to esd's CPCI4052 and CPCI405AB boards + + This patch adds esd's loadpci BSP command to CPCI4052 and + CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 600fe46fb3dab7f07604f9009904f31584415114 +Author: Matthias Fuchs +Date: Fri Jan 2 12:18:12 2009 +0100 + + ppc4xx: Disable pci node in device tree on CPCI405 pci adapters + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit f6a1f490d224c600a09137e58d1026d150b8e679 +Author: Matthias Fuchs +Date: Fri Jan 2 12:17:36 2009 +0100 + + ppc4xx: Cleanup CPCI405 board code + + This patch cleans up CPCI405 board support: + - wrap long lines + - unification of spaces in function calls + - remove dead code + + Use correct io accessors on peripherals. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit fceebb45a0b97e92f9889861f8c3b9cb885e706f +Author: Matthias Fuchs +Date: Fri Jan 2 12:16:35 2009 +0100 + + ppc4xx: Enable auto RS485 mode on PLU405 boards + + This patch turns on the auto RS485 mode in the 2nd external + uart on PLU405 boards. This is a special mode of the used + Exar XR16C2850 uart. Because these boards only have a 485 physical + layer connected it's a good idea to turn it on by default. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit b5f65dfa9aa8e068e62aba4733dc4fd97b1d9bf6 +Author: Haiying Wang +Date: Tue Jan 13 16:29:28 2009 -0500 + + Some changes of TLB entry setting for MPC8572DS + + - Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode, + all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0 + can not access PIXIS_BASE anymore (any access will cause DataTLBError exception) + + - Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board. + + Signed-off-by: Haiying Wang + +commit 950264317eb9594b2b5ee2fb65206200a1c6007a +Author: Haiying Wang +Date: Tue Jan 13 16:29:22 2009 -0500 + + Change DDR tlb start entry to CONFIG param for 85xx + + So that we can locate the DDR tlb start entry to the value other than 8. By + default, it is still 8. + + Signed-off-by: Haiying Wang + +commit 6d3a10f73ece7ffb736890c10e023222612a4aa0 +Author: Roy Zang +Date: Fri Jan 9 16:02:35 2009 +0800 + + Change PCIE1&2 deciide logic on MPC8544DS board more readable + + The IO port selection for MPC8544DS board: + Port cfg_io_ports + PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7 + PCIE2 0x4, 0x5, 0x6, 0x7 + PCIE3 0x6, 0x7 + This patch changes the PCIE12 and PCIE2 logic more readable. + Signed-off-by: Roy Zang + +commit 028e116811d28a031660f1ad9e20ac1293b3c5c7 +Author: Roy Zang +Date: Fri Jan 9 16:01:52 2009 +0800 + + PCIE2 and PCIE3 are decided by corresponing bit in devdisr instead of PCIE1 bit + + PCIE2 and PCIE3 should be decided by corresponing bit in devdisr instead of + PCIE1 bit. + On MPC8572DS board, PCIE refers to PCIE1. + Signed-off-by: Roy Zang + +commit 9afc2ef0307aecf52482df67c31b75d5f9e66b47 +Author: Roy Zang +Date: Fri Jan 9 16:00:55 2009 +0800 + + Fix IO port selection issue on MPC8544DS and MPC8572DS boards + + The IO port selection is not correct on MPC8572DS and MPC8544DS board. + This patch fixes this issue. + For MPC8572 + Port cfg_io_ports + PCIE1 0x2, 0x3, 0x7, 0xb, 0xc, 0xf + PCIE2 0x3, 0x7 + PCIE3 0x7 + + For MPC8544 + Port cfg_io_ports + PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7 + PCIE2 0x4, 0x5, 0x6, 0x7 + PCIE3 0x6, 0x7 + Signed-off-by: Roy Zang + +commit 3e3fffe3baf3befde287fec1fcbfe55052fb8946 +Author: Becky Bruce +Date: Wed Dec 3 22:36:44 2008 -0600 + + mpc8610hpcd: Fix PCI mapping concepts + + Rename _BASE to _BUS, as it's actually a PCI bus address, + separate virtual and physical addresses into _VIRT and _PHYS, + and use each appopriately. This makes the code easier to read + and understand, and facilitates mapping changes going forward. + + Signed-off-by: Becky Bruce + +commit 79e436cad3b4a7db88408c3f05175028f30d700d +Author: Becky Bruce +Date: Wed Dec 3 22:36:26 2008 -0600 + + sbc8641d: Fix PCI mapping concepts + + Rename _BASE to _BUS, as it's actually a PCI bus address, + separate virtual and physical addresses into _VIRT and _PHYS, + and use each appopriately. This makes the code easier to read + and understand, and facilitates mapping changes going forward. + + Signed-off-by: Becky Bruce + +commit a9f3acbcd07da72b5446ce557531a3ed8b8beff0 +Author: Wolfgang Denk +Date: Mon Jan 12 14:50:35 2009 +0100 + + MPC86xx: fix build warnings + + Signed-off-by: Wolfgang Denk + +commit 032a1c934ef4dc003281f57302b6e693062c1868 +Author: Mike Frysinger +Date: Mon Jan 5 16:09:44 2009 -0500 + + bf537-stamp/nand: fix board_nand_init prototype + + The board_nand_init() function should return an int, not void. + + Signed-off-by: Mike Frysinger + +commit 687f952e4119594ab913be11c90f7f018c2a7a79 +Author: Mike Frysinger +Date: Thu Dec 11 07:04:48 2008 -0500 + + Blackfin: drop CONFIG_SPI handling in board init + + The eeprom SPI init functions are duplicated as the common code already + executes these for us. + + Signed-off-by: Mike Frysinger + +commit e7e684b10d73a303902208594c7c3e7e0d753282 +Author: Mike Frysinger +Date: Fri Oct 24 17:51:57 2008 -0400 + + Blackfin: fix out-of-tree building with ldscripts + + Many of the Blackfin board linker scripts are preprocessed, so make sure we + output the linker script into the build tree rather than the source tree. + + Signed-off-by: Mike Frysinger + +commit b9eecc342f767b50e1476fbc1aad7d88dd4ce5eb +Author: Mike Frysinger +Date: Fri Oct 24 17:48:54 2008 -0400 + + Blackfin: fix linker scripts to work with --gc-sections + + Make sure all .text sections get pulled in and the entry point is properly + referenced so they don't get discarded when linking with --gc-sections. + + Signed-off-by: Mike Frysinger + +commit 509fc553bc6087a6f705b3bf52f3950d7d1eaa58 +Author: Mike Frysinger +Date: Sat Oct 11 20:45:44 2008 -0400 + + Blackfin: set proper LDRFLAGS for parallel booting LDRs + + In order to boot an LDR out of parallel flash, the ldr utility needs a few + flags to tell it to generate the right header. + + Signed-off-by: Mike Frysinger + +commit 3dd9395a0d7ce69a335d0e743c04b9caedd681d3 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Jan 6 21:41:59 2009 +0100 + + at91rm9200: move define from lowlevel_init to header + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 8a48686fac2030287765f1970ea046bd5734b733 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Jan 3 17:22:26 2009 +0100 + + m501sk: move to the common memory setup + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit d481c80d78f954133c035dae6c7d22de3625795d +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Jan 3 17:22:25 2009 +0100 + + at91rm9200: rename lowlevel init value to CONFIG_SYS_ + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 4e170b16625291aa10d0d9abc3f34e8a5945d157 +Author: Nicolas Ferre +Date: Tue Jan 6 21:13:14 2009 +0100 + + at91: add at91sam9xeek board support + + At91sam9xe is basically an at91sam9260 with embedded flash. We can manage + it as another entry for at91sam9260 in the Makefile. + + Check documentation at : + http://www.atmel.com/dyn/products/product_card.asp?part_id=4263 + + Signed-off-by: Nicolas Ferre + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 9ffd53db870a7da134f9a1ae76894a6b31237be5 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Jan 6 21:15:57 2009 +0100 + + fix bmp_logo.h make dependencies to allow parallel build + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit e12d9a8fb48d24176efffccc072b445e60a3afe4 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Jan 3 17:22:24 2009 +0100 + + at91: Fix Atmel's at91sam9 boards out of tree build + + introduced in commit 89a7a87f084c + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 0668236bafaa1c11c521652a2facebc74beecbf0 +Author: Wolfgang Denk +Date: Tue Dec 30 22:56:11 2008 +0100 + + README: update mailing list name and hits to patch submission. + + Signed-off-by: Wolfgang Denk + +commit d9011f9b75561a0bd9254934c2bb2bc799d4f645 +Author: Peter Tyser +Date: Tue Dec 23 16:32:01 2008 -0600 + + 85xx: Enable inbound PCI config cycles for X-ES boards cleanup + + Signed-off-by: Peter Tyser + +commit 1f03cbfae221b24ba1341a0a3f62ff01c5c874df +Author: Peter Tyser +Date: Tue Dec 23 16:32:00 2008 -0600 + + XPedite5200 board support cleanup + + Signed-off-by: Peter Tyser + +commit fea91edee8ae0295e3c30b1ff544df51f4d668e1 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Dec 2 21:58:04 2008 +0100 + + usb_kbd: fix usb_kbd_deregister when DEVICE_DEREGISTER not enable + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Remy Böhmer + +commit ada591d2a0ecff5f9bc5ed1ebf310f439c3d0a28 +Author: Trent Piepho +Date: Wed Dec 3 15:16:37 2008 -0800 + + mpc8[56]xx: Put localbus clock in sysinfo and gd + + Currently MPC85xx and MPC86xx boards just calculate the localbus frequency + and print it out, but don't save it. + + This changes where its calculated and stored to be more consistent with the + CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock. + + The localbus frequency is added to sysinfo and calculated when sysinfo is + set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are. + + get_clocks() copies the frequency into the global data, as the other + frequencies are, into a new field that is only enabled for MPC85xx and + MPC86xx. + + checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency + from sysinfo, like the other frequencies, instead of calculating it on the + spot. + + Signed-off-by: Trent Piepho + Acked-by: Kumar Gala + Acked-by: Jon Loeliger + +commit 9863d6aca11405e1e0d8aba2045d78aeec4d4ee7 +Author: Trent Piepho +Date: Wed Dec 3 15:16:36 2008 -0800 + + mpc86xx: Double local bus clock divider + + The local bus clock divider should be doubled for both 8610 and 8641. + + Signed-off-by: Trent Piepho + Acked-by: Kumar Gala + Acked-by: Jon Loeliger + +commit 446c381e3e16f19857b72ea0d06241267b8b9d58 +Author: Trent Piepho +Date: Wed Dec 3 15:16:35 2008 -0800 + + mpc8568: Double local bus clock divider + + The clock divider for the MPC8568 local bus should be doubled, like the + other newer MPC85xx chips. + + Since there are now more chips with a 2x divider than a 1x, and any new + 85xx chips will probably be 2x, invert the sense of the #if so that it + lists the 1x chips instead of the 2x ones. + + Signed-off-by: Trent Piepho + Acked-by: Kumar Gala + Acked-by: Jon Loeliger + +commit f51f07eb58fad12de9294ba4ee6c09a0ddeaee03 +Author: Dave Liu +Date: Tue Dec 16 12:09:27 2008 +0800 + + 85xx: Fix the boot window issue + + If one custom board is using the 8MB flash, it is set + as FLASH_BASE = 0xef000000, TEXT_BASE = 0xef780000. + The current start.S code will be broken at switch_as. + + It is because the TLB1[15] is set as 16MB page size, + EPN = TEXT_BASE & 0xff000000, RPN = 0xff000000. + + For the 8MB flash case, the EPN = 0xefxxxxxx, + RPN = 0xffxxxxxx. Assume the virt address of switch_as + is 0xef7ff18c, the real address of the instruction at + switch_as should be 0xff7ff18c. the 0xff7ff18c is out + of the range of the default 8MB boot LAW window + 0xff800000 - 0xffffffff. + + So when we switch to AS1 address space at switch_as, + the core can't fetch the instruction at switch_as any + more. It will cause broken issue. + + Signed-off-by: Dave Liu + +commit 58da8890d5fbd074746037722a423de9ac408616 +Author: Paul Gortmaker +Date: Thu Dec 11 15:47:50 2008 -0500 + + sbc8548: use proper PHY address + + The values given for the PHY address were wrong, so the code + read no valid PHY ID, and fell through to the generic PHY + support, which would work on 1000M but would not auto negotiate + down to 100M or 10M. + + Signed-off-by: Paul Gortmaker + +commit ad22f9273c6f24fbfa917e867680e9688e0c59c5 +Author: Paul Gortmaker +Date: Thu Dec 11 15:47:51 2008 -0500 + + sbc8548: enable command line editing by default. + + Lets make things a bit more user friendly. It isn't 1985 anymore. + + Signed-off-by: Paul Gortmaker + +commit bd93105fa171184a71ca8b22be03dc2705cfbd3f +Author: Paul Gortmaker +Date: Thu Dec 11 15:47:49 2008 -0500 + + sbc8548: don't enable the 3rd and 4th eTSEC + + These interfaces don't have usable connectors on the board, so don't + bother enumerating or configuring them. + + Signed-off-by: Paul Gortmaker + +commit 181a3650113883728927928b3ac81ad6dade4b2c +Author: Haiying Wang +Date: Wed Dec 3 10:08:19 2008 -0500 + + Set IVPR to kenrel entry point in second core boot page + + Assuming the OSes exception vectors start from the base of kernel address, and + the kernel physical starting address can be relocated to an non-zero address. + This patch enables the second core to have a valid IVPR for debugger before + kernel setting IVPR in CAMP mode. Otherwise, IVPR is 0x0 and it is not a valid + value for second core which runs kernel at different physical address other + than 0x0. + + Signed-off-by: Haiying Wang + +commit a5d212a263c58cc746481bf1fc878510533ce7d6 +Author: Trent Piepho +Date: Wed Dec 3 15:16:34 2008 -0800 + + mpc8xxx: LCRR[CLKDIV] is sometimes five bits + + On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits + instead of four. + + In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It + should be safe as the fifth bit was defined as reserved and set to 0. + + Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. + + Signed-off-by: Trent Piepho + Acked-by: Kumar Gala + Acked-by: Jon Loeliger + +commit 58ec4866ed916c7e422f5107bb27b0822084728e +Author: Trent Piepho +Date: Wed Dec 3 15:16:38 2008 -0800 + + mpc8[56]xx: Put localbus clock in device tree + + Export the localbus frequency in the device tree, the same way the CPU, TB, + CCB, and various other frequencies are exported in their respective device + tree nodes. + + Some localbus devices need this information to be programed correctly, so + it makes sense to export it along with the other frequencies. + + Unfortunately, when someone wrote the localbus dts bindings, they didn't + bother to define what the "compatible" property should be. So it seems no + one was quite sure what to put in their dts files. + + Based on current existing dts files in the kernel source, I've used + "fsl,pq3-localbus" and "fsl,elbc" for MPC85xx, which are used by almost all + of the 85xx devices, and are looked for by the Linux code. The eLBC is + apparently not entirely backward compatible with the pq3 LBC and so eLBC + equipped platforms like 8572 won't use pq3-localbus. + + For MPC86xx, I've used "fsl,elbc" which is used by some of the 86xx systems + and is also looked for by the Linux code. On MPC8641, I've also used + "fsl,mpc8641-localbus" as it is also commonly used in dts files, some of + which don't use "fsl,elbc" or any other acceptable name to match on. + + Signed-off-by: Trent Piepho + Acked-by: Kumar Gala + Acked-by: Jon Loeliger + +commit 9d94aff699eed38b286814fcbb335f3eb8516a0e +Author: Kumar Gala +Date: Tue Dec 16 14:59:22 2008 -0600 + + NAND FSL elbc: Use virt_to_phys to determine which bank is in use + + The current code that determines which bank/chipselect is used for a + given NAND instance only worked for 32-bit addresses and assumed + a 1:1 mapping. This breaks in 36-bit physical configs. + + The proper way to handle this is to use the virt_to_phys() and + BR_PHYS_ADDR() routinues to match the 34-bit lbc bus address + with the the virtual address the NAND code uses. + + Signed-off-by: Kumar Gala + Acked-by: Scott Wood + +commit 77c8115b1f1871811633eae77a5a700fac1f0e50 +Author: Kumar Gala +Date: Tue Dec 16 14:59:21 2008 -0600 + + ppc: Use addrmap in virt_to_phys and map_physmem. + + If we have addr map support enabled use the mapping functions to + implement virt_to_phys() and map_physmem(). + + Signed-off-by: Kumar Gala + +commit ecf5b98c7a6a2e2256dfddd48fab26678dcd6b90 +Author: Kumar Gala +Date: Tue Dec 16 14:59:20 2008 -0600 + + 85xx: Add support to populate addr map based on TLB settings + + Signed-off-by: Kumar Gala + +commit 78bbc5ce151c5a484bb51bf1866b4a993ffc16ec +Author: Peter Tyser +Date: Mon Dec 1 13:47:13 2008 -0600 + + XPedite5200 board support + + Initial support for Extreme Engineering Solutions XPedite5200 - + a MPC8548-based PMC single board computer. + + Signed-off-by: Peter Tyser + +commit 487dcb4fb89be0992bc06ec1341090017bd9cf2f +Author: Peter Tyser +Date: Wed Oct 29 12:39:27 2008 -0500 + + 85xx: Enable inbound PCI config cycles for X-ES boards + + Update X-ES Freescale boards to allow inbound PCI configuration + cycles when configured as agent/endpoint. + + Signed-off-by: Peter Tyser + +commit ccf0fdd02b97323f8caae18d06cc9daeac2f192f +Author: Peter Tyser +Date: Wed Dec 17 16:36:23 2008 -0600 + + XPedite5370 board support + + Initial support for Extreme Engineering Solutions XPedite5370 - + a MPC8572-based 3U VPX single board computer with a PMC/XMC + site. + + Signed-off-by: Peter Tyser + +commit e92739d34e2d6b6aca93b2598248210710897ce8 +Author: Peter Tyser +Date: Wed Dec 17 16:36:21 2008 -0600 + + Add support for PCA953x I2C gpio devices + + Initial support for NXP's 4 and 8 bit I2C gpio expanders + (eg pca9537, pca9557, etc). The CONFIG_PCA953X define + enables support for the devices while the CONFIG_CMD_PCA953X + define enables the pca953x command. The CONFIG_CMD_PCA953X_INFO + define enables an 'info' sub-command which provides summary + information for the given pca953x device. + + Signed-off-by: Peter Tyser + +commit 7a8979591171676417ab36852d8811a8c46accd8 +Author: Peter Tyser +Date: Wed Oct 29 12:39:26 2008 -0500 + + pci/fsl_pci_init: Enable inbound PCI config cycles + + Add fsl_pci_config_unlock() function to enable a + PCI/PCIe interface configured in agent/endpoint mode to + respond to inbound PCI configuration cycles. + + Signed-off-by: Peter Tyser + +commit b616f2b545f73757669b37386f0b37bb61fc6797 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Mon Sep 8 22:27:18 2008 +0200 + + MIPS: qemu_mips: update doc to generate and to use qemu flash, ide file + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Shinya Kuribayashi + +commit 16cdf816779f5b602a9b3b4d2ea4dea05095c35b +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Dec 16 22:10:31 2008 +0100 + + MIPS: qemu_mips: update doc to use all disk and boot linux kernel + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Shinya Kuribayashi + +commit 13095b2f07dacb1f863772266c1789d47a523a8a +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Dec 16 22:10:30 2008 +0100 + + MIPS: qemu_mips: move env storage just after u-boot + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Shinya Kuribayashi + +commit aced78d852d0b009e8aaa1445af8cb40861ee549 +Author: Wolfgang Denk +Date: Tue Dec 16 23:48:27 2008 +0100 + + Prepare 2009.01-rc1 + + Signed-off-by: Wolfgang Denk + +commit 9e2a79b4c585ad31138fb90b68fd0234d64a8da8 +Author: Wolfgang Denk +Date: Tue Dec 16 23:13:46 2008 +0100 + + include/configs/at91cap9adk.h: fix typo. + + Signed-off-by: Wolfgang Denk + +commit 45ca04f2377361593151d2d4da51f8ba4832d233 +Author: Wolfgang Denk +Date: Tue Dec 16 22:32:25 2008 +0100 + + board/trab/memory.c: Fix compile problems. + + Apply changes from commit 44b4dbed to board/trab/memory.c, too. + + Actually we'd need a major cleanup here - as it turns out, + board/trab/memory.c is more or less a verbatim copy of + post/drivers/memory.c ... but then, trab is EOL anyway,r + so this is not worth the effort. + + Signed-off-by: Wolfgang Denk + +commit ff49ea8977b56916edd5b1766d9939010e30b181 +Author: Scott Wood +Date: Tue Dec 16 14:24:16 2008 -0600 + + NAND: Mark the BBT as scanned prior to calling scan_bbt. + + Otherwise, recursion can occur if scan_bbt does not find a bad block + table, and tries to write one, and the attempt to erase the BBT area + causes a bad block check. + + Signed-off-by: Scott Wood + +commit 584eedab66d0828f2d571a24b10526c4e65f547b +Author: Ilya Yanok +Date: Thu Dec 11 05:51:57 2008 +0300 + + jffs2: include instead of defining own min_t + + Include header for min_t definition instead of + providing our own one. Removes warnings in case of OneNAND support + enabled. + + Although I thinks it's a bit silly to include + just for min_t... + + Signed-off-by: Ilya Yanok + Acked-by: Stefan Roese + +commit b1ffecec37b57a59c139042267faac458e5324e9 +Author: Becky Bruce +Date: Wed Dec 3 23:04:37 2008 -0600 + + powerpc: fix io.h build warning with CONFIG_PHYS_64BIT + + Casting a pointer to a phys_addr_t when it's an unsigned long long + on a 32-bit system without first casting to a non-pointer type + generates a compiler warning. Fix this. + + Signed-off-by: Becky Bruce + +commit 6cdadcb3f1b6eac4a1c4256acaa1438413f95351 +Author: Wolfgang Denk +Date: Tue Dec 16 16:22:50 2008 +0100 + + trab: make trab_fkt standalone code independent of libgcc + + Use our own local functions in lib_arm/ instead. + + Signed-off-by: Wolfgang Denk + +commit aa1bcca3d2e22af4dea9f02132f9b56a30378ded +Author: Wolfgang Denk +Date: Tue Dec 16 14:44:06 2008 +0100 + + post/Makefile: fix dependency problem with parallel builds + + Parallel builds (using "make -jN") would occasionally fail with error + messages like + ppc_4xxFP-objdump: string.o: File format not recognized + or + post/libpost.a(cpu.o): In function `cpu_post_test': + /home/wd/git/u-boot/work/post/lib_ppc/cpu.c:130: undefined reference to `cpu_post_test_string' + or similar. We now make sure to run the 'postdeps" step before + attempting to build the specific POST libraries. + + Signed-off-by: Wolfgang Denk + +commit 4a0f7538c5c0805fd9a791967bbabacc41deadd9 +Author: Wolfgang Denk +Date: Tue Dec 16 14:41:02 2008 +0100 + + Makefile: fix dependency problem with parallel builds + + Parallel builds (using "make -jN") would occasionally fail with error + messages like + include/autoconf.mk:212: *** missing separator. Stop. + Line numbers and affected boards were changing. Obviously some + Makefiles included autoconf.mk while it was still being written to. + As a fix, we now write to a temporary file first and then rename it, + so that it is really ready to use as soon as it appears. + + Signed-off-by: Wolfgang Denk + +commit 455ae7e87f67c44e6aea68865c83acadd3fcd36c +Author: Wolfgang Denk +Date: Tue Dec 16 01:02:17 2008 +0100 + + Coding style cleanup, update CHANGELOG. + + Signed-off-by: Wolfgang Denk + +commit 84bc72d90c505fec3ef4b693995407a0bd4064e5 +Author: Mike Frysinger +Date: Thu Dec 11 18:39:08 2008 -0500 + + spi/stmicro: fix debug() display of cmd + + The stmicro_wait_ready() func tries to show the actual opcode that was sent + to the device, but instead it displays the array pointer. Fix it to pull + out the opcode from the start of the array. + + Signed-off-by: Mike Frysinger + +commit 5b3375ac8c36c29c87abb132fede0509eb21e5c9 +Author: Mike Frysinger +Date: Thu Dec 11 06:23:37 2008 -0500 + + env_sf: support embedded environments + + If both CONFIG_ENV_SECT_SIZE and CONFIG_ENV_SIZE are defined, and the sect + size is larger than the env size, then it means the env is embedded in a + block. So we have to save/restore the part of the sector which is not the + environment. Previously, saving the environment in SPI flash in this + setup would probably brick the board as the rest of the sector tends to + contain actual U-Boot data/code. + + Signed-off-by: Mike Frysinger + Acked-by: Haavard Skinnemoen + +commit ecf5f077c8e77454f532eaac3e3afb7cfc48c62d +Author: Timur Tabi +Date: Wed Dec 3 11:28:30 2008 -0600 + + i2c: merge all i2c_reg_read() and i2c_reg_write() into inline functions + + All implementations of the functions i2c_reg_read() and + i2c_reg_write() are identical. We can save space and simplify the + code by converting these functions into inlines and putting them in + i2c.h. + + Signed-off-by: Timur Tabi + Acked-By: Jean-Christophe PLAGNIOL-VILLARD + +commit e39cd81c44740d7355d277ed3d38536cbe1e003d +Author: Dave Liu +Date: Fri Dec 5 15:36:14 2008 +0800 + + lib_ppc: rework the flush_cache + + - It is possible to miss flush/invalidate the last + cache line, we fix it at here. + - add the volatile and memory clobber. + + They are pointed by Scott Wood. + + Signed-off-by: Dave Liu + +commit 63240ba88cd6a220057a0f28e5bf97f5b17ac84b +Author: Kumar Gala +Date: Sat Dec 13 17:20:28 2008 -0600 + + Introduce addr_map library + + Add a library that helps in translating between virtual and physical + addresses. This library can be useful as a simple means to implement + map_physmem() and virt_to_phys() for platforms that need functionality + beyond the simple 1:1 mapping. + + Signed-off-by: Kumar Gala + +commit 65e43a10631537dcb92c302d36301a12308216c3 +Author: Kumar Gala +Date: Sat Dec 13 17:20:27 2008 -0600 + + Introduce virt_to_phys() + + virt_to_phys() returns the physical address given a virtual. In most + cases this will be just the input value as the vast majority of + systems run in a 1:1 mode. + + However in systems that are not running this way it should report the + physical address or ~0 if no mapping exists for the given virtual + address. + + Signed-off-by: Kumar Gala + +commit 45845301af3de8675c1f7bbc815c6de35452605a +Author: Yuri Tikhonov +Date: Sun Dec 7 22:12:50 2008 +0100 + + POST Make: fix the sub-dir dependencies missing. + + Signed-off-by: Yuri Tikhonov + +commit 22525779cb51f1bbe4e96fea7b778de1935a5a69 +Author: Martin Michlmayr +Date: Wed Aug 6 14:44:05 2008 +0300 + + Fix a typo in fw_env.config + + Reported-by: Martin Michlmayr + Signed-off-by: Wolfgang Denk + +commit ba490b7761c62b549c222a9723e532dc801a3899 +Author: Peter Tyser +Date: Mon Dec 1 16:22:45 2008 -0600 + + Remove unused CONFIG_ADDR_STREAMING defines + + Signed-off-by: Peter Tyser + +commit d16da93430520d3e46c1ab52eedacf36ab7a2311 +Author: Peter Tyser +Date: Mon Nov 24 11:54:47 2008 -0600 + + cmd_mem: Remove unused variable + + Signed-off-by: Peter Tyser + +commit 3aed3aa2c128ce9fb39ca3f4e9385a7499e93dbf +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Dec 14 10:29:39 2008 +0100 + + Fix new found CFG_ + + Also fix some minor typos. + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Wolfgang Denk + +commit 0e0c862efe7279e9609db74d758cd1b84c6c7209 +Author: Sergei Poselenov +Date: Fri Sep 19 12:07:34 2008 +0200 + + Remove compiler warning: target CPU does not support interworking + + This warning is issued by modern ARM-EABI GCC on non-thumb targets. + + Signed-off-by: Vladimir Panfilov + Signed-off-by: Sergei Poselenov + +commit cd6734510a9ff0f41c4a73567d4080ea0033d2c1 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Mon Nov 24 13:33:51 2008 +0100 + + Fix FIT and FDT support to have CONFIG_OF_LIBFDT and CONFIG_FIT independent + + FDT support is used for both FIT style images and for architectures + that can pass a fdt blob to an OS (ppc, m68k, sparc). + + For other architectures and boards which do not pass a fdt blob to an + OS but want to use the new uImage format, we just need FIT support. + + Now we can have the 4 following configurations : + + 1) FIT only CONFIG_FIT + 2) fdt blob only CONFIG_OF_LIBFDT + 3) both CONFIG_OF_LIBFDT & CONFIG_FIT + 4) none none + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 19ef4f7a6ef3b725aa9fe4b4f5fb676a84160172 +Author: Matthias Fuchs +Date: Wed Dec 10 15:13:32 2008 +0100 + + ppc4xx: Disable EEPROM write access on PMC440 boards + + This patch disables EEPROM wrtie access by default on PMC440 board. + + Signed-off-by: Matthias Fuchs + +commit 5b67a1439a73ba6c34007d9ff60a2c6aa90265df +Author: Matthias Fuchs +Date: Wed Dec 10 15:12:56 2008 +0100 + + ppc4xx: Fix Ethernet PHY LED configuration on PMC440 boards + + Signed-off-by: Matthias Fuchs + +commit 71fa0714fe5134bc8718c38d5261d267e88582ba +Author: Stefan Roese +Date: Tue Nov 18 16:36:12 2008 +0100 + + MIPS: Flush data cache upon relocation + + This patch now adds a flush to the data cache upon relocation. The + current implementation is missing this. Only a comment states that it + should be done. So let's really do it now. + + Signed-off-by: Stefan Roese + Signed-off-by: Shinya Kuribayashi + +commit 44174343688dba32571a34550dba08971c65fef1 +Author: Stefan Roese +Date: Tue Nov 18 16:36:22 2008 +0100 + + MIPS: Add CONFIG_SKIP_LOWLEVEL_INIT + + This patch adds the CONFIG_SKIP_LOWLEVEL_INIT option to start.S. This + enables support for boards where the lowlevel initialization is + already done when U-Boot runs (e.g. via OnChip ROM). + + This will be used in the upcoming VCTH board support. + + Signed-off-by: Stefan Roese + Signed-off-by: Shinya Kuribayashi + +commit db08ecaa6eb8176904b3bae103a85ee8f735dc40 +Author: Stefan Roese +Date: Wed Nov 12 13:18:02 2008 +0100 + + MIPS: Add board_early_init_f() to init_sequence + + This patch adds the board_early_init_f() call to the MIPS init + sequence. A weak dummy implementation is also added which can be + overridden by a board specific version. + + This will be used by the upcoming VCTH board support. + + Signed-off-by: Stefan Roese + Signed-off-by: Shinya Kuribayashi + +commit 9d23fc584c4b7b8bb9ecbee48920b1b04b08fa1b +Author: Stefan Roese +Date: Wed Nov 12 13:18:19 2008 +0100 + + MIPS: Add onenand_init() to board.c and move nand_init() + + This patch adds a call to onenand_init() for OneNAND support and moves + the nand_init() call to an earlier place, so that the environment can + be used from NAND and OneNAND. + + Signed-off-by: Stefan Roese + Signed-off-by: Shinya Kuribayashi + +commit d8bbc51c7ba9b737a20984333d19fe28a3526431 +Author: Nobuhiro Iwamatsu +Date: Tue Dec 9 11:32:46 2008 +0900 + + sh: Update sh2/sh2a timer + + Renesas SH2/SH2A timer broken. + This patch fix timer function. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit a319f1496210117b73198e3d889ffffaf6825d00 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Dec 5 07:27:37 2008 +0100 + + sh: r2dplus fix register access + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 4d4a96055f6917335a89dbdf2e5556fa5ac329f6 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Dec 2 07:40:03 2008 +0100 + + sh: r2dplus/lowlevel_init: coding style fix + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit c54b9a42d8f5ab5b2a039b3a2e6fde8b427745e5 +Author: Nobuhiro Iwamatsu +Date: Tue Nov 25 11:05:19 2008 +0900 + + sh: Changed value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT + + SH4 is different a value of CACHE_OC_NUM_ENTRIES and + CACHE_OC_WAY_SHIFT every CPU. + This patch corrects these values. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit e9d5f35497885b3c65d494d09a525d443dcccd3b +Author: Nobuhiro Iwamatsu +Date: Thu Nov 20 16:44:42 2008 +0900 + + sh: Update sh timer function + + Change to write/readX function and fix timer problem. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit b81786cff476c41e332eaeb679158f6527cd67d4 +Author: Nobuhiro Iwamatsu +Date: Tue Nov 4 11:58:58 2008 +0900 + + sh: Migo-R: Update BSC value + + A value of BSC CS4 was wrong, Fixed it. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit 5783758fd260a02f44566ad8f29f899565cd0403 +Author: Nobuhiro Iwamatsu +Date: Mon Nov 17 16:52:09 2008 +0900 + + sh: Update ms7722se board config + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit 15e2697c9f7fb2ba672a1a70f07cd6d9d4e92b51 +Author: Nobuhiro Iwamatsu +Date: Mon Nov 17 16:53:09 2008 +0900 + + sh: Update SuperH serial driver + + The address of SCFSR register is wrong at SH7720/SH7721. + This patch fix this. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit 9a1d3557dcd47365c12eeab584b822e57d994352 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Nov 11 22:20:15 2008 +0100 + + sh: fix rsk7203 and MigoR out of tree build + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 1951f847f0a851853871b613ad7cf21a5242226c +Author: Matthias Fuchs +Date: Wed Dec 10 14:41:25 2008 +0100 + + ppc4xx: Update TEXT_BASE for CPCI405 boards + + This patch fixes building U-Boot for CPCI405 boards. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 8c92af7b2fbd60ae87379477f93c7ec9441b7452 +Author: Stefan Roese +Date: Tue Dec 9 20:08:01 2008 +0100 + + ppc4xx: Remove some features from ALPR to fit into 256k again + + Signed-off-by: Stefan Roese + +commit 3b089e4f889a2902449d55e081c886ae607cae89 +Author: Stefan Roese +Date: Wed Dec 10 10:32:59 2008 +0100 + + UBI: Set ubi_dev.type back to DEV_TYPE_NONE upon failing initialization + + With this patch we set the type back to NONE upon failing UBI partition + initialization. Otherwise further calls to the UBI subsystem would try + to really access the non-existing UBI partition. + + Thanks to Michael Lawnick for pointing this out. + + Signed-off-by: Stefan Roese + +commit 817329351639a8895cd9b87b33aeff043f3d5a44 +Author: Stefan Roese +Date: Wed Dec 10 10:28:33 2008 +0100 + + UBI: Return -ENOMEM upon failing malloc + + Return with correct error code (-ENOMEM) from ubi_attach_mtd_dev() upon + failing malloc(). + + Signed-off-by: Stefan Roese + +commit 2145188bea2df8f2b47a87ec3071b55027e8d0ae +Author: Ben Warren +Date: Tue Dec 9 23:34:15 2008 -0800 + + Fix compile error in building MBX860T. + + Signed-off-by: Ben Warren + +commit 8fab49ea911fe925392fa5afcc9bc7373a3d0cee +Author: Michal Simek +Date: Tue Nov 25 11:42:20 2008 +0100 + + microblaze: Remove XUPV2P board + + --- + + Microblaze platforms use generic settings and to have + many platforms is confusing that's why I decided to remove this + platform from U-BOOT. ml401 tree is sufficient for covering + all Microblaze platforms. + + This change will go through microblaze custodian tree. + +commit 99ba6f353582720defff6e6e6761dc455a207d31 +Author: Michal Simek +Date: Mon Nov 24 18:25:41 2008 +0100 + + microblaze: Remove CONFIG_LIBFDT due to error in common files + +commit e7d591e823a991513833af7030468409e25a3b13 +Author: Michal Simek +Date: Mon Nov 24 11:43:00 2008 +0100 + + microblaze: Fix ml401 uart16550 setting + + Signed-off-by: Michal Simek + +commit c85ff0553a8cfbcca51c15b947e1ed55d3810a39 +Author: Michal Simek +Date: Mon Nov 24 11:38:22 2008 +0100 + + microblaze: Set up relocation is done + +commit bcb6dd9187d4b23c748704767bd12d20c829e996 +Author: Mike Frysinger +Date: Tue Dec 9 23:20:31 2008 -0500 + + tools/netconsole: new script for working with netconsole over UDP + + While the doc/README.NetConsole does have a snippet for people to + create their own netcat script, it's a lot easier to make a simple + dedicated script and tell people to use it. + + Also spruce it up a bit to make it user friendly. + + Signed-off-by: Mike Frysinger + +commit 8c5170a7d088601d5f30d85093388dab1f1e8ec0 +Author: Sonic Zhang +Date: Tue Dec 9 23:20:18 2008 -0500 + + fs/fat: handle FAT on SATA + + The FAT file system driver should also handle FAT on SATA devices. + + Signed-off-by: Sonic Zhang + Signed-off-by: Mike Frysinger + +commit 97a24a78ee6f34b89b821cb70eda1cf34aa11d97 +Author: Jerry Van Baren +Date: Mon Nov 24 08:15:02 2008 -0500 + + libfdt: Fix redefined uintptr_t warning for USE_HOSTCC + + Compiling U-Boot in an old OS environment (RedHat-7.3 :-) gives the + following warnings from FDT: + + include/libfdt_env.h:50: warning: redefinition of 'uintptr_t' + /usr/include/stdint.h:129: warning: 'uintptr_t' previously declared here + + Fix: Protect the definition of uintptr_t when compiling on the host + system. + + Signed-off-by: Gerald Van Baren + +commit 1fc2b165c51d6f40c8d505f1b3eaefdb6599b17b +Author: Graeme Russ +Date: Sat Nov 22 08:43:29 2008 +1100 + + Moved sc520 PCI definitions to stand-alone file + + Signed Off By: Graeme Russ + +commit 1f5070c0c18fa5684bfce09c8abdf10c04ed48fa +Author: Graeme Russ +Date: Sat Nov 22 08:43:21 2008 +1100 + + Fixed path to sc520 SSI include file + + Signed Off By: Graeme Russ + +commit d4f70da544c33db3e4fce6473dea4ecca4322545 +Author: Graeme Russ +Date: Fri Nov 21 06:28:05 2008 +1100 + + Fixed build error due to #define of _LINUX_STRING_H_ in 82559_eeprom.c + + Signed-off-by: Graeme Russ + +commit c034075a713b60e654c64e88e87da29440f31bb4 +Author: Stefan Roese +Date: Wed Nov 12 13:30:10 2008 +0100 + + serial: Add vcth UART driver + + This patch adds the UART driver for the upcoming VCTH board support. + + Signed-off-by: Stefan Roese + +commit 142a80ffc3b537a9c45acd2444a42a77f147c602 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:36 2008 +0300 + + jffs2: cache data_crc results + + As we moved data_crc() invocation from jffs2_1pass_build_lists() to + jffs2_1pass_read_inode() data_crc is going to be calculated on each + inode access. This patch adds caching of data_crc() results. There + is no significant improvement in speed (because of flash access + caching added in previous patch I think, crc in RAM is really fast) + but this patch impacts memory usage -- every b_node structure uses + 12 bytes instead of 8. + + Signed-off-by: Alexey Neyman + Signed-off-by: Ilya Yanok + +commit 9b7076229ec6a958bd835ab70745f7676297ce82 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:35 2008 +0300 + + jffs2: summary support + + This patch adds support for reading fs information from summary + node instead of scanning full eraseblock. + + Signed-off-by: Ilya Yanok + +commit 70741004dc28946cd82c7af6789c4ddb3fc94526 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:34 2008 +0300 + + jffs2: add buffer to cache flash accesses + + With this patch JFFS2 code allocates memory buffer of max_totlen size + (size of the largest node, calculated during scan time) and uses it to + store entire node. Speeds up loading. If malloc fails we use old ways + to do things. + + Signed-off-by: Alexey Neyman + Signed-off-by: Ilya Yanok + +commit 8a36d31f72411144ac0412ee7e1880e801acd754 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:33 2008 +0300 + + jffs2: rewrite jffs2 scanning code based on Linux one + + Rewrites jffs2_1pass_build_lists() function in style of Linux's + jffs2_scan_medium() and jffs2_scan_eraseblock(). + This includes: + - Caching flash acceses + - Smart dealing with free space + + Signed-off-by: Alexey Neyman + Signed-off-by: Ilya Yanok + +commit e0b5532579eda8b4629f1b4f6e49c3cc60f52237 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:32 2008 +0300 + + jffs2: add sector_size field to part_info structure + + This patch adds sector_size field to part_info structure (used + by new JFFS2 code). + + Signed-off-by: Ilya Yanok + +commit f73846956778a7dfee83403ef9747aff77198848 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:31 2008 +0300 + + jffs2: fix searching for latest version in jffs2_1pass_list_inodes() + + We need to update i_version inside cycle to find really latest version + inside jffs2_1pass_list_inodes(). With that fixed we can use isize inside + dump_inode() instead of calling expensive jffs2_1pass_read_inode(). + + Signed-off-by: Alexey Neyman + Signed-off-by: Ilya Yanok + +commit 1113cb764b3da256ef8a1f9539f4efbe221ff3c4 +Author: Wolfgang Denk +Date: Tue Dec 9 23:13:51 2008 +0100 + + evb64260: fix "cast to pointer from integer of different size" warnings + + Signed-off-by: Wolfgang Denk + +commit d2776827315c3d469b8cb4cec14d58877798daa2 +Author: Stefan Althoefer +Date: Sun Dec 7 19:39:11 2008 +0100 + + USB: descriptor handling + + Hi, + + I found a bug when working with the u-boot USB subsystem on IXP425 processor + (big endian Xscale aka ARMv5). + I recognized that the second usb_endpoint_descriptor of the attached memory + stick was corrupted. + + The reason for this are the packed structures below (either u-boot and + u-boot-usb): + + -------------- + /* Endpoint descriptor */ + struct usb_endpoint_descriptor { + unsigned char bLength; + unsigned char bDescriptorType; + unsigned char bEndpointAddress; + unsigned char bmAttributes; + unsigned short wMaxPacketSize; + unsigned char bInterval; + unsigned char bRefresh; + unsigned char bSynchAddress; + + } __attribute__ ((packed)); + /* Interface descriptor */ + struct usb_interface_descriptor { + unsigned char bLength; + unsigned char bDescriptorType; + unsigned char bInterfaceNumber; + unsigned char bAlternateSetting; + unsigned char bNumEndpoints; + unsigned char bInterfaceClass; + unsigned char bInterfaceSubClass; + unsigned char bInterfaceProtocol; + unsigned char iInterface; + + unsigned char no_of_ep; + unsigned char num_altsetting; + unsigned char act_altsetting; + struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS]; + } __attribute__ ((packed)); + ------------ + + As usb_endpoint_descriptor is only 7byte in length, the start of all + odd ep_desc[] structures is not word aligned. This makes wMaxPacketSize + of these structures also not word aligned. + + ARMv5 Architecture however does not support non-aligned multibyte + data type (see A2.8 of ARM Architecture Reference Manual). + + Signed-off-by: Stefan Althoefer + Signed-off-by: Remy Böhmer + +commit 4c253fdb2a175ea3472c38a1455a16faa58e81f0 +Author: Kumar Gala +Date: Tue Dec 9 10:27:33 2008 -0600 + + drivers/fsl_pci_init: Fix compile warning + + fsl_pci_init.c: In function 'fsl_pci_setup_inbound_windows': + fsl_pci_init.c:122: warning: comparison is always true due to limited range of data type + + The check only makes sense if we are CONFIG_PHYS_64BIT + + Signed-off-by: Kumar Gala + +commit dedacc18a8c2b3951581eb721fa055a4e0ac4845 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Dec 7 09:45:35 2008 +0100 + + usbtty/omap: update to current API + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Remy Böhmer + +commit ee2e9ba917a62cc2e3a484bb79c8da0e01cb93ed +Author: Anatolij Gustschin +Date: Tue Dec 9 17:52:05 2008 +0100 + + video: fix FADS823 and RRvision compiling issues + + Since commit 561858ee building for FADS823 and RRvision + doesn't work. Let's include version.h and timestamp.h + unconditionally to fix the problem. + + Signed-off-by: Anatolij Gustschin + +commit 2d2e05727fe4013f807ffa814dff0e75259a1db4 +Author: Stefan Roese +Date: Tue Dec 2 10:53:47 2008 +0100 + + UBI: Fix size parsing in "ubi create" + + Signed-off-by: Stefan Roese + +commit 2ee951ba2ac9874d2a93d52e7a187d3184be937e +Author: Stefan Roese +Date: Thu Nov 27 14:07:09 2008 +0100 + + UBI: Enable re-initializing of the "ubi part" command + + With this patch now, the user can call "ubi part" multiple times to + re-connect the UBI device to another MTD partition. + + Signed-off-by: Stefan Roese + +commit 9def12cae33d2d3ea2dd56b197fd3dfb3ad60bf4 +Author: Stefan Roese +Date: Thu Nov 27 14:05:15 2008 +0100 + + MTD: Fix problem based on non-working relocation (list head mtd_partitions) + + Don't use LIST_HEAD() but initialize the struct via INIT_LIST_HEAD() upon + first call of add_mtd_partitions(). Otherwise this won't work on platforms + where the relocation is broken (like MIPS or PPC). + + Signed-off-by: Stefan Roese + +commit 5e3ab68e9acf9edf304b8aa32ad7e005483a2c47 +Author: Trent Piepho +Date: Wed Nov 12 17:29:48 2008 -0800 + + Section name should be ".data", not "data" + + Signed-off-by: Trent Piepho + Signed-off-by: Wolfgang Denk + +commit 7fa6a2f3b66579dea8bc1a9177646e1141731b15 +Author: Wolfgang Denk +Date: Tue Dec 9 00:39:08 2008 +0100 + + MAKEALL: Automatically use parallel builds + + Add logic to the MAKEALL script to determine the number of CPU cores + on the system, and run a parallel build if there is more than one. + Usually this significantrly accelerates builds. + + Allow to manually adjust the number of parallel make jobs by using + the "BUILD_NCPUS" environment variable. + + Signed-off-by: Wolfgang Denk + +commit 268405fa7c44156c5192a70779920c70906af8d6 +Author: Wolfgang Denk +Date: Tue Dec 9 00:24:30 2008 +0100 + + vxworks.h: Fix build problem introduced by commits 29a4c24d/e9084b23 + + Signed-off-by: Wolfgang Denk + +commit 153176a9414120ca1736f3cc4951623d6e14e6af +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Nov 11 06:08:59 2008 +0100 + + avr32/bootm: remove unused variable 'ret' + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Acked-by: Haavard Skinnemoen + +commit 434c51a5e62f608a2a78ed5398ac43a1c77cc183 +Author: Peter Tyser +Date: Wed Nov 12 13:06:48 2008 -0600 + + Remove unneeded CONFIG_SHELL references + + Make should be using the bash shell by default which makes + CONFIG_SHELL unnecessary + + Signed-off-by: Peter Tyser + +commit cf7a7b99794bac936899819b95539be1dbd71708 +Author: Peter Tyser +Date: Wed Nov 12 12:33:20 2008 -0600 + + Use bash for default GNU Make shell application + + Some Make script commands rely on bash-specific features like brace + expansion, so default to bash for the SHELL variable with a fallback + to the standard sh shell + + Signed-off-by: Peter Tyser + +commit 4b530018764934ad5689196e9aa5714a6f4d1a6c +Author: Heiko Schocher +Date: Wed Nov 12 09:50:45 2008 +0100 + + jffs2: rename devices_init () in common/jffs2.c + + rename devices_init () in common/jffs2.c to + jffs2_devices_init (), because there is also a + devices_init () in common/devices.c. + + Signed-off-by: Heiko Schocher + +commit af5eb847a10f1037590001355d88bab3fe7be48b +Author: Daniel Hellstrom +Date: Mon Nov 10 12:46:20 2008 +0000 + + SPARC: Fixed compiler error introduced by commit c160a9544743 + + This patch fixes a build error for the SPARC platform. It was + introduced by commit c160a9544743e80e8889edb2275538e7764ce334. + + Signed-off-by: Daniel Hellstrom + +commit 4c60259899aa00f59db0d936b8807f9a26411c0f +Author: Gary Jennejohn +Date: Sun Nov 9 12:50:59 2008 +0100 + + mgsuvd add the board-specific part of the HDLC driver + + Signed-off-by: Gary Jennejohn + +commit 534a4359666af48bd69a3743d8a8c2bdb1d3ec70 +Author: Gary Jennejohn +Date: Sun Nov 9 12:45:03 2008 +0100 + + mgcoge add the board-specific part of the HDLC driver + + Signed-off-by: Gary Jennejohn + +commit 135f5534538bb8ea4f38a7030da12187d22ef7e0 +Author: Gary Jennejohn +Date: Sun Nov 9 12:36:15 2008 +0100 + + keymile add the common parts of the HDLC driver + + This implements the ICN protocol used across the backplane and is + needed by all the keymile boards. + + Signed-off-by: Gary Jennejohn + +commit 1cb82a9207a550557399eabc7fe47f21bbd9ddf8 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Nov 7 22:46:22 2008 +0100 + + drivers/bios_emulator: Move conditional compilation to Makefile + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit bcdf1d2cf6b24fb905fd7da80da4b3c65a7995b5 +Author: Richard Retanubun +Date: Thu Nov 6 14:01:51 2008 -0500 + + common/cmd_ide.c: Corrected endian order printing for compact flash serial number. + + Corrected endian order printing for compact flash serial number. + + Signed-off-by: Richard Retanubun + +commit 16a28ef219c27423a1ef502f19070c4d375079b8 +Author: Gary Jennejohn +Date: Thu Nov 6 15:04:23 2008 +0100 + + IOMUX: Add console multiplexing support. + + Modifications to support console multiplexing. This is controlled using + CONFIG_SYS_CONSOLE_MUX in the board configuration file. + + This allows a user to specify multiple console devices in the environment + with a command like this: setenv stdin serial,nc. As a result, the user can + enter text on both the serial and netconsole interfaces. + + All devices - stdin, stdout and stderr - can be set in this manner. + + 1) common/iomux.c and include/iomux.h contain the environment setting + implementation. + 2) doc/README.iomux contains a somewhat more detailed description. + 3) The implementation in (1) is called from common/cmd_nvedit.c to + handle setenv and from common/console.c to handle initialization of + input/output devices at boot time. + 4) common/console.c also contains the code needed to poll multiple console + devices for input and send output to all devices registered for output. + 5) include/common.h includes iomux.h and common/Makefile generates iomux.o + when CONFIG_SYS_CONSOLE_MUX is set. + + Signed-off-by: Gary Jennejohn + +commit 774ce72026f74ac9641bcbbc588b20f2e13f7ab8 +Author: Mike Frysinger +Date: Tue Nov 4 16:03:46 2008 -0500 + + strings: use puts() rather than printf() + + When running `strings` on really long strings, the stack tends to get + smashed due to printf(). Switch to puts() instead since we're only passing + the data through. + + Signed-off-by: Mike Frysinger + +commit b03150b52e3c491a86a3cc0945274f0e8f9872e7 +Author: Niklaus Giger +Date: Mon Nov 3 22:16:18 2008 +0100 + + Use new CONFIG_SYS_VXWORKS parameters for Netstal boards + + Signed-off-by: Niklaus Giger + +commit 29a4c24de99d8cb4ac32991c04cab87ed94ca1f9 +Author: Niklaus Giger +Date: Mon Nov 3 22:15:34 2008 +0100 + + cmd_elf.c: Cleanup bootvx and handle new CONFIG_SYS_VXWORKS parameters + + - fix size too small by one in sprintf + - changed old (pre 2004) device name ibmEmac to emac + - boot device may be overriden in board config + - servername may be defined in board config + - additional parameters may be defined in board config + - fixed some line wrappings + - replaced redundant MAX define by max + + Signed-off-by: Niklaus Giger + +commit e9084b23d16102f44ace24379a1c0c352497ef80 +Author: Niklaus Giger +Date: Mon Nov 3 22:14:36 2008 +0100 + + Add vxworks.h to handle CONFIG_SYS_VXWORKS parameters + + Signed-off-by: Niklaus Giger + +commit 0b2f4ecad473d785959c7976f20d2a00bd0ee01f +Author: Niklaus Giger +Date: Mon Nov 3 22:13:47 2008 +0100 + + README: Document CONFIG_SYS parameters for vxworks + + Signed-off-by: Niklaus Giger + +commit ace514837cac656e29c37a19569cb8ea83071126 +Author: Peter Tyser +Date: Fri Oct 31 11:12:38 2008 -0500 + + lcd: Let the board code show board-specific info cleanup + + remove unneeded version.h from lcd.c + + Signed-off-by: Peter Tyser + Signed-off-by: Wolfgang Denk + +commit 561858ee7d0274c3e89dc98d4d0698cb6fcf6fd9 +Author: Peter Tyser +Date: Mon Nov 3 09:30:59 2008 -0600 + + Update U-Boot's build timestamp on every compile + + Use the GNU 'date' command to auto-generate a new U-Boot + timestamp on every compile. + + Signed-off-by: Peter Tyser + +commit 83ad179e2f0f625b88adb8ef5696709e46fb9077 +Author: Remy Bohmer +Date: Thu Dec 4 22:25:57 2008 +0100 + + Remove redundant armv4 flag from arm926ejs compile flags + + Currently the arm926ejs tree has the armv4 option set during compilation. + This flag does not belong here because a arm926 CPU is always a armv5 CPU. + + Signed-off-by: Remy Bohmer + +commit 89a7a87f084c657f8e32b513a77b50eca07e17ec +Author: Nicolas Ferre +Date: Sat Dec 6 13:11:14 2008 +0100 + + at91: Choose environment variables location within make config target + + This patch adds the possiblity to choose the media where the environment will + be located. This allow to choose this fundamental configuration without editing + config files. + + Documentation file added. + + Signed-off-by: Nicolas Ferre + Acked-by: Stelian Pop + Acked-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 1450c4a6682378567030414a9f1198c39b7730c7 +Author: Anatolij Gustschin +Date: Mon Nov 3 15:30:34 2008 +0100 + + lwmon, tqm8xx: Fix build errors + + Commit 6b59e03e0237a40a2305ea385defdfd92000978b + lcd: Let the board code show board-specific info + + introduced some bugs which prevent U-Boot building + for lwmon board if CONFIG_LCD_INFO_BELOW_LOGO will + be defined in the board configuration. + + Also "LCD enabled" building for TQM823L doesn't work + since this commit. + + This patch fixes above-mentioned issues. + + Signed-off-by: Anatolij Gustschin + +commit bfa0af6b22ff25b0719a8910f9b6d1f975aa6fb0 +Author: Mike Frysinger +Date: Sun Nov 2 01:18:18 2008 -0400 + + ignore .gdb_history files + + When using gdb, history files will often get generated. So ignore them. + + Signed-off-by: Mike Frysinger + +commit c8aa7dfc18f7cc90d0aea6c7becbb67dfc5bba4b +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 31 12:26:55 2008 +0100 + + FPGA: move fpga drivers to drivers/fpga + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 6a86bb6c25376f0358478219fa28d7c84dd01ed0 +Author: Peter Tyser +Date: Mon Dec 1 16:29:38 2008 -0600 + + net: Fix TftpStart() ip:filename bug + + The TftpStart() function modifies the 'BootFile' + string when 'BootFile' contains both an IP address + and filename (eg 1.2.3.4:/path/file). This causes + subsequent calls to TftpStart to incorrectly parse + the TFTP filename and server IP address to use. + For example: + + => tftp 0x100000 10.52.0.62:/home/ptyser/non_existant + Speed: 100, half duplex + Using eTSEC1 device + TFTP from server 10.52.0.62; our IP address is 10.52.253.79 + ^^^^^^^^^^ CORRECT + Filename '/home/ptyser/non_existant'. + ^^^^^^^^^^^^^^^^^^^^^^^^^ CORRECT + Load address: 0x100000 + Loading: * + TFTP error: 'File not found' (1) + Starting again + + eTSEC2: No link. + Speed: 100, half duplex + Using eTSEC1 device + TFTP from server 10.52.0.33; our IP address is 10.52.253.79 + ^^^^^^^^^^ WRONG + Filename '10.52.0.62'. + ^^^^^^^^^^ WRONG + Load address: 0x100000 + Loading: * + TFTP error: 'File not found' (1) + Starting again + + TftpStart() was modified to not modify the 'BootFile' string. + + Signed-off-by: Peter Tyser + Signed-off-by: Ben Warren + +commit d32c5be50bf0600bfdc54223ef341ee9c63db445 +Author: Peter Tyser +Date: Mon Dec 1 16:26:21 2008 -0600 + + net: Add additional IP fragmentation check + + Ignore IP packets which have the "more fragments" flag bit + set. This flag indicates the IP packet is fragmented and + must be ignored by U-Boot. + + Signed-off-by: Peter Tyser + Signed-off-by: Ben Warren + +commit e0c07b868cab405ab4b5335a0247899bfc5ea0b6 +Author: Peter Tyser +Date: Mon Dec 1 16:26:20 2008 -0600 + + net: Define IP flag field values + + These defines were pulled from the "Add simple + IP/UDP fragmentation support" patch from Frank + Haverkamp . + + Signed-off-by: Peter Tyser + Signed-off-by: Ben Warren + +commit 23afaba65ec5206757e589ef334a8b38168c045f +Author: Anatolij Gustschin +Date: Tue Dec 2 10:31:04 2008 +0100 + + net: tsec: Fix Marvell 88E1121R phy init + + This patch tries to ensure that phy interrupt pin + won't be asserted after booting. We experienced + following issues with current 88E1121R phy init: + + Marvell 88E1121R phy can be hardware-configured + to share MDC/MDIO and interrupt pins for both ports + P0 and P1 (e.g. as configured on socrates board). + Port 0 interrupt pin will be shared by both ports + in such configuration. After booting Linux and + configuring eth0 interface, port 0 phy interrupts + are enabled. After rebooting without proper eth0 + interface shutdown port 0 phy interrupts remain + enabled so any change on port 0 (link status, etc.) + cause assertion of the interrupt. Now booting Linux + and configuring eth1 interface will cause permanent + phy interrupt storm as the registered phy 1 interrupt + handler doesn't acknowledge phy 0 interrupts. This + of course should be fixed in Linux driver too. + + Signed-off-by: Anatolij Gustschin + Acked-by: Andy Fleming + Signed-off-by: Ben Warren + +commit 2e4970d8109d690adcf615d9e3cac7b5b2e8eaed +Author: Peter Tyser +Date: Tue Dec 2 12:59:51 2008 -0600 + + net: Fix download command parsing + + When CONFIG_SYS_HUSH_PARSER is defined network download + commands with 1 argument in the format 'tftp "/path/file"' + do not work as expected. The hush command parser strips + the quotes from "/path/file" which causes the network + commands to interpret "/path/file" as an address + instead of the intended filename. + + The previous check for a leading quote in netboot_common() + was replaced with a check which ensures only valid + numbers are treated as addresses. + + Signed-off-by: Peter Tyser + Signed-off-by: Ben Warren + +commit 3c2c2f427905040c1513d0c51d637689cba48346 +Author: Remy Bohmer +Date: Thu Nov 27 22:30:27 2008 +0100 + + Remove non-ascii characters from fat code + + This code contains some non-ascii characters in comment lines and code. + Most editors do not display those characters properly and editing those + files results always in diffs at these places which are usually not required + to be changed at all. This is error prone. + + So, remove those weird characters and replace them by normal C-style + equivalents for which the proper defines were already in the header. + + Signed-off-by: Remy Bohmer + +commit dc889e865356497d3e495570118c2245ebce2631 +Author: Dave Liu +Date: Fri Nov 28 20:16:58 2008 +0800 + + 85xx: fix the wrong DDR settings for MPC8572DS + + The default DDR freq is 400MHz or 800M data rate, + the old settings is pure wrong for the default case. + + Signed-off-by: Dave Liu + Acked-by: Andy Fleming + +commit 9df59533f77de2829b4b66e5b7620e04edaa391c +Author: Kumar Gala +Date: Mon Nov 24 10:29:26 2008 -0600 + + 85xx: init gd as early as possible + + Moved up the initialization of GD so C code like set_tlb() can use + gd->flags to determine if we've relocated or not in the future. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit aed461af81012a398a205e9be67ab37667491838 +Author: Kumar Gala +Date: Mon Nov 24 10:29:25 2008 -0600 + + 85xx: Fix relocation of CCSRBAR + + If the virtual address for CCSRBAR is the same after relocation but + the physical address is changing we'd end up having two TLB entries with + the same VA. Instead we new us the new CCSRBAR virt address + 4k as a + temp virt address to access the old CCSRBAR to relocate it. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit ea154a1781135d822eedee7567cc156089eae93c +Author: Kumar Gala +Date: Mon Nov 24 10:25:14 2008 -0600 + + FSL: Moved BR_PHYS_ADDR for localbus to common header + + The BR_PHYS_ADDR macro is useful on all machines that have local bus + which is pretty much all 83xx/85xx/86xx chips. + + Additionally most 85xx & 86xx will need it if they want to support + 36-bit physical addresses. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit 9427ccde0355a2ebf47454e8e1be59f5b9864e08 +Author: Peter Tyser +Date: Mon Dec 1 13:47:12 2008 -0600 + + 85xx: Add PORDEVSR_PCI1 define + + Add define used to determine if PCI1 interface is in PCI or PCIX mode. + + Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 + + Signed-off-by: Peter Tyser + Signed-off-by: Andy Fleming + +commit 35db1c6d34b57ae15e99cf03c8e8f8a6148d74f3 +Author: Becky Bruce +Date: Fri Nov 21 19:24:22 2008 -0600 + + drivers/fsl_pci_init: Fix inbound window mapping bug + + The current code will cause the creation of a 4GB window + starting at 0 if we have more than 4GB of RAM installed, + which overlaps with PCI_MEM space and causes pci_bus_to_phys() + to return erroneous information. Limit the size to 4GB - 1; + which causes the code to create one 2GB and one 1GB window + instead. + + Signed-off-by: Becky Bruce + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit 5a105a333dab6a23e92d763ce76d6f31d57f45df +Author: Jon Loeliger +Date: Thu Nov 20 15:36:48 2008 -0600 + + Removed unused CONFIG_L1_INIT_RAM symbol. + + Prevent further viral propogation of the unused + symbol CONFIG_L1_INIT_RAM by just removing it. + + Signed-off-by: Jon Loeliger + Acked-by: Andy Fleming + +commit 7008d26a40a76f90cae5824c812cfed449fb97b8 +Author: Ed Swarthout +Date: Wed Oct 29 09:21:44 2008 -0500 + + fsl ddr skip interleaving if not supported. + + Removed while(1) hang if memctl_intlv_ctl is set wrong. + Remove embedded tabs from strings. + + Signed-off-by: Ed Swarthout + Acked-by: Kumar Gala + Acked-by: Andy Fleming + +commit dd332e18d082de75eca3fc2c7c778f5d4571a096 +Author: Anatolij Gustschin +Date: Thu Nov 13 18:08:57 2008 +0100 + + 85xx: socrates: fix DDR SDRAM tlb entry configuration + + since commit be0bd8234b9777ecd63c4c686f72af070d886517 + tlb entry for socrates DDR SDRAM will be reconfigured + by setup_ddr_tlbs() from initdram() causing an + inconsistency with previously configured DDR SDRAM tlb + entry from tlb_table: + + socrates>l2cam 7 9 + IDX PID EPN SIZE V TS RPN U0-U3 WIMGE UUUSSS + 7 : 00 00000000 256MB V 0 -> 0_00000000 0000 -I-G- ---RWX + 8 : 00 00000000 256MB V 0 -> 0_00000000 0000 ----- ---RWX + 9 : 00 10000000 256MB V 0 -> 0_10000000 0000 ----- ---RWX + + This patch makes the presence of the DDR SDRAM tlb entry in + the tlb_table dependent on CONFIG_SPD_EEPROM to avoid this + inconsistency. + + Signed-off-by: Anatolij Gustschin + Acked-by: Andy Fleming + +commit a2cd50ed6ef0ac6b127b3d6db756979a8336718d +Author: Peter Tyser +Date: Tue Nov 11 10:17:10 2008 -0600 + + 85xx: Add CPU 2 errata workaround to all 8548 boards + + All mpc8548-based boards should implement the suggested workaround + to CPU 2 errata. Without the workaround, its possible for the + 8548's core to hang while executing a msync or mbar 0 instruction + and a snoopable transaction from an I/O master tagged to make + quick forward progress is present. + + Signed-off-by: Peter Tyser + Acked-by: Andy Fleming + +commit e57f0fa1333cdf3ca36110aac2900712a5f82976 +Author: Dave Liu +Date: Tue Oct 28 17:53:45 2008 +0800 + + 85xx: the DDR tlb is missed for the !CONFIG_SPD_EEPROM case + + we need TLB entry for DDR at !SPD case. + + Signed-off-by: Dave Liu + Acked-by: Andy Fleming + +commit 9b0ad1b1c7a15ff674978705c7c52264978dc5d8 +Author: Dave Liu +Date: Tue Oct 28 17:53:38 2008 +0800 + + 85xx: remove the unused ddr_enable_ecc in the board file + + The DDR controller of 8548/8544/8568/8572/8536 processors + have the ECC data init feature, and the new DDR code is + using the feature, and we don't need the way with DMA to + init memory any more. + + Signed-off-by: Dave Liu + Acked-by: Andy Fleming + +commit 4a129a57d923f7c15aa1f567028a80a32d66a100 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Nov 30 19:36:53 2008 +0100 + + at91rm9200dk: Fix typo + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit ed3b18e05c9a8ffa5fb643da9bcec7452e5d5e01 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Nov 30 19:36:50 2008 +0100 + + AT91: remove non supported board AT91RM9200DF macro + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit bd876772ee04095e5dd943d97515a1f14bad4b1c +Author: Ilko Iliev +Date: Tue Dec 2 17:27:54 2008 +0100 + + mtd/dataflash.c: fix a problem with the last partition + + This patch fix the problem that only the [NB_DATAFLASH_AREA - 1] dataflash + partition can be defined to use the area to the end of dataflash size. + Now it is possible to have only one dataflash partition from 0 to the end + of of dataflash size. + + Signed-off-by: Ilko Iliev + +commit 03f797793b124dccaae145b977d15d6cb9e74504 +Author: Ilko Iliev +Date: Tue Dec 2 17:20:17 2008 +0100 + + fix some coding style violations. + + This patch fix some coding style violations. + + Signed-off-by: Ilko Iliev + +commit 5e46b1e54112f4b7fd5185665e571510132c12a7 +Author: Stefan Roese +Date: Thu Nov 27 14:11:37 2008 +0100 + + OneNAND: Add missing mtd info struct before calling onenand_erase() + + Without this patch "saveenv" crashes when MTD partitions are enabled (e.g. + for use in UBI) via CONFIG_MTD_PARTITIONS. + + Signed-off-by: Stefan Roese + Signed-off-by: Scott Wood + +commit 29382d4064fbaff5daacff4c3209370fa5713966 +Author: Becky Bruce +Date: Thu Nov 20 16:43:52 2008 -0600 + + mpc8641: Fix error in README + + I made some updates to the code that didn't make it into the + README - fix this + + Signed-off-by: Becky Bruce + +commit 801a194616d95e6fc426a176d9615ccbf9876c7f +Author: Jon Loeliger +Date: Thu Nov 20 12:01:02 2008 -0600 + + Removed unused CONFIG_L1_INIT_RAM symbol. + + Prevent further viral propogation of the unused + symbol CONFIG_L1_INIT_RAM by just removing it. + + Signed-off-by: Jon Loeliger + +commit f698738e46cb461e28c2d58228bb34a2fcf5a475 +Author: Jon Loeliger +Date: Thu Nov 20 14:02:56 2008 -0600 + + 86xx: Fix non-64-bit compilation problems. + + Introducing 64-bit (36-bit) support for the MPC8641HPCN + failed to accomodate the other two 86xx boards. + Introduce definitions for CONFIG_SYS_CCSRBAR_PHYS_{LOW,HIGH} + CONFIG_SYS_CCSR_DEFAULT_DBAT{U,L} and CONFIG_SYS_CCSR_DEFAULT_IBAT{U,L} + with nominal 32-bit values. + + Signed-off-by: Jon Loeliger + Acked-by: Becky Bruce + +commit bebfc6ef3ec994c8e18783269b1d8d41f8e38afd +Author: Michael Trimarchi +Date: Wed Nov 26 17:40:37 2008 +0100 + + Remove obsolete command (apply afte USB style patch, 80 chars strict) + + Remove USB obsolete commmand + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Böhmer + +commit de39f8c19d7c12017248c49d432dcb81db68f724 +Author: Michael Trimarchi +Date: Wed Nov 26 17:41:34 2008 +0100 + + USB style patch, 80 chars strict + + USB Code style patch + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Böhmer + +commit d10c5a87cb8affbb4d35a311370316d4383d598e +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Nov 7 22:46:21 2008 +0100 + + drivers/usb: Move conditional compilation to Makefile + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Remy Böhmer + +commit 2077e348c2a84901022ad95311b47b70361e6daa +Author: Scott Wood +Date: Tue Nov 25 10:47:02 2008 -0600 + + NAND: Fix misplaced return statement in nand_{read,write}_skip_bad(). + + This caused the operation to be needlessly repeated if there were + no bad blocks and no errors. + + Signed-off-by: Valeriy Glushkov + Signed-off-by: Scott Wood + +commit 89295028e7d8f7a524f485328279d72fdb102385 +Author: Michal Simek +Date: Mon Nov 24 12:09:50 2008 +0100 + + ppc4xx: ml300 remove Xilinx BSP from ml300 folder + + This BSP should be outside u-boot source tree. + The second reason is that xilinx ppc405 was moved to generic platform. + + Signed-off-by: Michal Simek + Signed-off-by: Stefan Roese + +commit 24eea623d4974a169026a975ba12fb23d48154b1 +Author: Matthias Fuchs +Date: Mon Nov 24 15:11:10 2008 +0100 + + ppc4xx: Remove unused features + + This patch disables some unused features from the PCI405 configuration + to keep U-Boot image size below 192k. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 0c2385c3bb51f5d3911fce1ec4720db86b534c2b +Author: Matthias Fuchs +Date: Mon Nov 24 15:11:09 2008 +0100 + + ppc4xx: Use correct io accessors for PCI405 + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 348c849d86a6f0785752b9bc497a34658713d1d1 +Author: Matthias Fuchs +Date: Mon Nov 24 15:11:08 2008 +0100 + + ppc4xx: Remove unused code from PCI405 code + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 58c696eed839af894e0265064669c402dc28b371 +Author: Wolfgang Denk +Date: Mon Nov 24 21:50:59 2008 +0100 + + AT91RM9200DK: fix broken boot from NOR flash + + Signed-off-by: Wolfgang Denk + +commit 8052352f20b33bef8f9872fc983eac73d4693c38 +Author: Jens Scharsig +Date: Tue Nov 18 10:48:46 2008 +0100 + + at91rm9200: fix broken boot from nor flash + + This patch fix the broken boot from NOR Flash on AT91RM9200 boards, if + CONFIG_AT91RM9200 is defined and nor preloader is used. + + Signed-off-by: Jens Scharsig + +commit 25ea652e907516a283b38237e83712a918f125d7 +Author: Piotr Ziecik +Date: Mon Nov 17 15:58:00 2008 +0100 + + UBI: Add proof-of-concept CFI flash support + + With this patch UBI can be used on CFI flash chips. + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit e6a7edbc1778d27431ac663b40a71dafa5d20578 +Author: Piotr Ziecik +Date: Mon Nov 17 15:57:59 2008 +0100 + + mtd: Remove a printf() from add_mtd_device(). + + Remove a printf() from add_mtd_device(), which produces spurious output. + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit 91809ed51d8327a8dbbf29aa98a091154c282171 +Author: Piotr Ziecik +Date: Mon Nov 17 15:57:58 2008 +0100 + + cfi-mtd: Add cfi-mtd driver. + + Add cfi-mtd driver, which exports CFI flash to MTD layer. + This allows CFI flash devices to be used from MTD layer. + + Building of the new driver is controlled by CONFIG_FLASH_CFI_MTD + option. Initialization is done by calling cfi_mtd_init() from + flash_init(). + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit 6ea808efdf9aa5d9067fbfac32acde8539129ed2 +Author: Piotr Ziecik +Date: Mon Nov 17 15:49:32 2008 +0100 + + cfi_flash: Add interface for flash verbosity control + + Add interface for flash verbosity control. It allows + to disable output from low-level flash API. It is useful + when calling these low-level functions from context other + than flash commands (for example the MTD/CFI interface + implmentation). + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit ebc9784ce6528385bb8d2558e783622d4bbf20f8 +Author: Piotr Ziecik +Date: Thu Nov 20 15:17:38 2008 +0100 + + cfi_flash: Export flash_sector_size() function. + + Export flash_sector_size() function from drivers/mtd/cfi_flash.c, + so that it can be used in the upcoming cfi-mtd driver. + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit 45aa5a7f4d5bcb79927ddfc896c1d7c4326e235d +Author: Stefan Roese +Date: Mon Nov 17 14:45:22 2008 +0100 + + cfi_flash: Make all flash access functions weak + + This patch defines all flash access functions as weak so that + they can be overridden by board specific versions. + + This will be used by the upcoming VCTH board support where the NOR + FLASH unfortunately can't be accessed memory-mapped. Special + accessor functions are needed here. + + To enable this weak functions you need to define + CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS in your board config header. + Otherwise the "old" default functions will be used resulting + in smaller code. + + Signed-off-by: Stefan Roese + Acked-by: Haavard Skinnemoen + +commit a5c4067017631d903e1afa6ad615f0ce19fea517 +Author: Stefan Roese +Date: Mon Nov 24 08:31:16 2008 +0100 + + UBI: Change parsing of size in commands to default to hex + + Currently the size parameters of the UBI commands (e.g. "ubi write") are + decoded as decimal instead of hex as default. This patch now interprets + all these values consistantly as hex, as all other standard U-Boot commands + do. + + Signed-off-by: Stefan Roese + +commit de01c76c3ccc4e6c5989228eed58e955a3a1a968 +Author: Stefan Roese +Date: Fri Nov 21 13:06:06 2008 +0100 + + ppc4xx: ML2 shouldn't include the 4xx EMAC driver + + Signed-off-by: Stefan Roese + +commit 1a6a00dcc5bdfc6e9b4b00f39c1f583a7f96fc7f +Author: Yuri Tikhonov +Date: Fri Nov 14 16:19:19 2008 +0300 + + ppc4xx: katmai: Change default config + + This patch enables support for EXT2, and increases the + CONFIG_SYS_BOOTMAPSZ size for the default configuration + of the katmai boards to use them as the RAID-reference + AMCC setups. + + EXT2 enabling allows one to boot kernels from the EXT2 + formatted Compact Flash cards. + + CONFIG_SYS_BOOTMAPSZ increasing allows one to boot the + Linux kernels, which use PAGE_SIZE of 256KB. Otherwise, + the memory area with DTB file (which is placed at the + end of the bootmap area) will turn out to be overlapped + with the BSS segment of the 256KB kernel, and zeroed + in early_init() of Linux. + + Actually, increasing of the bootmap size could be done + via setting of the bootm_size U-Boot variable, but it looks + like the current U-Boot implementation have some bootm_size- + related functionality lost. In many places through the U-Boot + code the CONFIG_SYS_BOOTMAPSZ definition is used directly + (instead of trying to read the corresponding value from the + environment). The same is truth for the boot_jump_linux() + function in lib_ppc/bootm.c, where U-Boot transfers control + to Linux passing the CONFIG_SYS_BOOTMAPSZ (not bootm_size) + value to the booting kernel. + + Signed-off-by: Yuri Tikhonov + Signed-off-by: Ilya Yanok + Signed-off-by: Stefan Roese + +commit ddf45cc758d394591fb9bcdcbe96530f733f2bce +Author: Dave Mitchell +Date: Thu Nov 20 14:09:50 2008 -0600 + + ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initialization + + Expanded OCM TLB to allow access to 64K OCM as well as 256K of + internal SRAM. + + Adjusted internal SRAM initialization to match updated user + manual recommendation. + + OCM & ISRAM are now mapped as follows: + physical virtual size + ISRAM 0x4_0000_0000 0xE300_0000 256k + OCM 0x4_0004_0000 0xE304_0000 64k + + A single TLB was used for this mapping. + + Signed-off-by: Dave Mitchell + Signed-off-by: Stefan Roese + +commit b14ca4b61a681f75f3125676e09d7ce6af66e927 +Author: Dave Mitchell +Date: Thu Nov 20 14:00:49 2008 -0600 + + ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs + + Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and + L2 cache DCRs from ppc440.h to this new header. + + Also converted these DCR defines from lowercase to uppercase and + modified referencing modules to use them. + + Signed-off-by: Dave Mitchell + Signed-off-by: Stefan Roese + +commit 711e2b2af820d21d9931d4cf8057d3894600fd54 +Author: Steven A. Falco +Date: Thu Nov 20 14:37:57 2008 -0500 + + ppc4xx: Delete unused definitions for SDR0_DDRCFG from ppc4xx.h + + The definitions of bits in SDR_CFG are incorrect, and not used within + U-Boot. Therefore, they can be removed. + + The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions, + and are unused, so they can be removed too. + + A definition for SDR0_DDRCFG is added. + + Signed-off-by: Steven A. Falco + Signed-off-by: Stefan Roese + +commit e23c7c95a96eb0f068efe5c532215a10a1512a95 +Author: Dirk Behme +Date: Mon Nov 10 20:15:25 2008 +0100 + + ARM: OMAP: Convert IO macros + + Convert IO macros to readx/writex. + + Signed-off-by: Dirk Behme + +commit 263b749e2e25473a48776d317bd2a7e2ddcdd212 +Author: Ilko Iliev +Date: Sun Nov 9 15:53:14 2008 +0100 + + lib_arm: do_bootm_linux() - correct a small mistake + + This patch corrects a small bug in the "if" condition: + the parameter "flag" is 0 and the "if" condition is always true. + The result is - the boom command doesn't start the kernel. + Affected targets: all arm based. + + Signed-off-by: Ilko Iliev + +commit 3e0cda071a67cb5709e3fa4faf6b31a731859acc +Author: Stelian Pop +Date: Sun Nov 9 00:14:46 2008 +0100 + + AT91: Enable PLLB for USB + + At least some (old ?) versions of the AT91Bootstrap do not set up the + PLLB correctly to 48 MHz in order to make USB host function correctly. + + This patch sets up the PLLB to the same values Linux uses, and makes USB + work ok on the following CPUs: + - AT91CAP9 + - AT91SAM9260 + - AT91SAM9263 + + This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all + the relevant AT91CAP9/AT91SAM9 atmel boards. + + Signed-off-by: Stelian Pop + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit ad229a44e162af0f65e57e4e3dc133d5f0364ecb +Author: Stelian Pop +Date: Fri Nov 7 13:55:14 2008 +0100 + + AT91: Use AT91_CPU_CLOCK in displays + + Introduce AT91_CPU_CLOCK and use it for displaying the CPU + speed in the LCD driver. + + Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the + corresponding board clocks. + + Signed-off-by: Stelian Pop + +commit 25fb4eaaeab3f8866020818f4729d990dcc91cf0 +Author: Stefan Roese +Date: Thu Nov 20 11:46:20 2008 +0100 + + ppc4xx: Clear all potentially pending exceptions in MCSR + + This is needed on Canyonlands which still has an exception pending + while running relocate_code(). This leads to a failure after trap_init() + is moved to the top of board_init_r(). + + Signed-off-by: Stefan Roese + +commit facdad5f2602e899a01746916beddbf9e856b5ee +Author: Heiko Schocher +Date: Wed Nov 19 10:10:30 2008 +0100 + + powerpc: 83xx: add missing TIMING_CFG1_CASLAT_* defines + + Signed-off-by: Heiko Schocher + Signed-off-by: Kim Phillips + +commit 2f2a5c3714d17f4ead18b713128b7226e0e822f4 +Author: Howard Gregory +Date: Tue Nov 4 14:55:33 2008 +0800 + + mpc83xx: Improve the performance of DDR memory + + modify the CAS timings. my understanding is that these + settings decrease various wait times in the DDR interface. + Because these wait times are in clock cycles, and the DDR + clock on the 8315 RDB runs slower than on some other 83xx + platforms, we can dial down these values without a problem, + thereby decreasing the latency of memory a little. + + Signed-off-by: Howard Gregory + Signed-off-by: Dave Liu + Signed-off-by: Kim Phillips + +commit 8000b086b33a5a81f3f390f37e178db7956dc08b +Author: Kyungmin Park +Date: Fri Oct 24 14:55:33 2008 +0200 + + ARM: Add Apollon UBI support + + To enable UBI on Apollon you need to uncomment the CONFIG_SYS_USE_UBI + macro. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 694a0b3f1c0accd0de94b89555155d69f8022824 +Author: Kyungmin Park +Date: Wed Nov 19 11:47:05 2008 +0100 + + UBI: Add UBI command support + + This patch adds these UBI commands: + + ubi part [nand|onenand] [part] - Show or set current partition + ubi info [l[ayout]] -Display volume and UBI layout information + ubi create[vol] volume [size] [type] - Create volume name with size + ubi write[vol] address volume size - Write volume from address with size + ubi read[vol] address volume [size] - Read volume to address with size + ubi remove[vol] volume - Remove volume + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 58be3a1056d88c6d05f3e914389282807e69923a +Author: Kyungmin Park +Date: Wed Nov 19 16:38:24 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 8/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 47ae6693f54f80455ae32c2e0d995e0e4bdc15b9 +Author: Kyungmin Park +Date: Wed Nov 19 16:36:36 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 7/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 7e6ee7ad27de5216db1baef76f38c3429c8f4a2a +Author: Kyungmin Park +Date: Wed Nov 19 16:32:36 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 6/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit c91a719daa331b5856109313371e4ece5ec06d96 +Author: Kyungmin Park +Date: Wed Nov 19 16:28:06 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 5/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit f412fefa079c6aa9a9763f6869bf787ea6bf6e1b +Author: Kyungmin Park +Date: Wed Nov 19 16:27:23 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 4/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 2d262c4853cb5b6ddce1a28a9641f2de3688d7ea +Author: Kyungmin Park +Date: Wed Nov 19 16:26:54 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 3/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 961df83361aff9a14f226214224eb8a06e05ba24 +Author: Kyungmin Park +Date: Wed Nov 19 16:25:44 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 2/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit f399d4a281713d5ef2d764f05d545fe61e3bd569 +Author: Kyungmin Park +Date: Wed Nov 19 16:23:06 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 1/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit e29c22f5abe6e0f4baa6251efed6074cdfc3db79 +Author: Kyungmin Park +Date: Wed Nov 19 16:20:36 2008 +0100 + + MTD: Add MTD paritioning infrastructure + + This MTD part infrastructure will be used by the upcoming + UBI support. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 9b827cf1720acda2473afa516956eab6f7cca9a1 +Author: Selvamuthukumar +Date: Thu Oct 16 22:54:03 2008 +0530 + + Align end of bss by 4 bytes + + Most of the bss initialization loop increments 4 bytes + at a time. And the loop end is checked for an 'equal' + condition. Make the bss end address aligned by 4, so + that the loop will end as expected. + + Signed-off-by: Selvamuthukumar + Signed-off-by: Wolfgang Denk + +commit 3f510db522d160179dff3ddcce9b18f6241c2c24 +Author: Becky Bruce +Date: Mon Nov 10 19:45:35 2008 -0600 + + mpc8641: fix address-cells default in old .dts detection + + address-cells defaults to 2, not 1; so in the unlikely + event that it isn't specified, this patch is required + for correct operation. + + Signed-off-by: Becky Bruce + +commit d025aa4b20a0618a2bada0132a9a0a4afb717f1a +Author: Becky Bruce +Date: Fri Oct 31 17:14:39 2008 -0500 + + lib_ppc: Move trap_init to occur earlier + + Doing trap_init immediately once we're running from RAM + means we're no longer dependent on the physical location of + the flash on non-BookE platforms. Before trap_init, those + platforms switch to real mode and go to 0xfff00100 on exception. + After the switch, they go to 0x00000100 This makes it easier to + move the flash location. + + Signed-off-by: Becky Bruce + +commit d52082b12c6e545705a19433a2f4142526536189 +Author: Becky Bruce +Date: Fri Nov 7 13:46:19 2008 -0600 + + mpc8641: Try to detect old .dts files + + Since we've changed the memory map of the board, be nice and + add some checking to try to catch out-of-date .dts files. We do + this by checking the CCSRBAR location in the .dts and comparing + it to the CCSRBAR location in u-boot. If they don't match, a + warning msg is printed. This isn't foolproof, but it's simple and + will catch most of the cases where an out-of-date .dts is present, + including all of the cases where a new u-boot is used with an old + standard MPC8641 .dts file as supplied with Linux. + + Signed-off-by: Becky Bruce + +commit 8db0400a27839f91c047dcb83f4a0f09e054a180 +Author: Becky Bruce +Date: Thu Nov 6 13:04:09 2008 -0600 + + toplevel Makefile: Add MPC8641HPCN_36BIT target + + This will enable CONFIG_PHYS_36BIT for MPC8641HPCN. + + Signed-off-by: Becky Bruce + +commit 3111d32c494e8251b90917447796a7206b757e1e +Author: Becky Bruce +Date: Thu Nov 6 17:37:35 2008 -0600 + + mpc8641: Support 36-bit physical addressing + + This patch creates a memory map with all the devices + in 36-bit physical space, in addition to the 32-bit map. + The CCSR relocation is moved (again, sorry) to + allow for the physical address to be 36 bits - this + requires translation to be enabled. With 36-bit physical + addressing enabled, we are no longer running with VA=PA + translations. This means we have to distinguish between + the two in the config file. The existing region name is + used to indicate the virtual address, and a _PHYS variety + is created to represent the physical address. + + Large physical addressing is not enabled by default. + Set CONFIG_PHYS_64BIT in the config file to turn this on. + + Signed-off-by: Becky Bruce + +commit c759a01a0022de9378a3a761f49786f87684c916 +Author: Becky Bruce +Date: Thu Nov 6 17:36:04 2008 -0600 + + mpc8641: Change 32-bit memory map + + The memory map on the 8641hpcn is modified to look more like + the 85xx boards; this is a step towards a more standardized + layout going forward. As part of this change, we now relocate + the flash. + + The regions for some of the mappings were far larger than they + needed to be. I have reduced the mappings to match the + actual sizes supported by the hardware. + + In addition I have removed the comments at the head + of the BAT blocks in the config file, rather than updating + them. These get horribly out of date, and it's a simple + matter to look at the defines to see what they are set to + since everything is right here in the same file. + + Documentation has been changed to reflect the new map, as this + change is user visible, and affects the OS which runs post-uboot. + + Signed-off-by: Becky Bruce + +commit bf9a8c34309ed9276258295db9e9212aabb2531a +Author: Becky Bruce +Date: Wed Nov 5 14:55:35 2008 -0600 + + mpc86xx: Change early FLASH mapping to 1M at CONFIG_MONITOR_BASE_EARLY + + We define CONFIG_MONITOR_BASE_EARLY to define the initial location + of the bootpage in flash. Use this to create an early mapping + definition for the FLASH, and change the early_bats code to use this. + + This change facilitates the relocation of the flash since the early + mappings are no longer tied to the final location of the flash. + + Signed-off-by: Becky Bruce + +commit c1e1cf69547b138173f87a7f81c42a5d8dbfde3d +Author: Becky Bruce +Date: Wed Nov 5 14:55:34 2008 -0600 + + mpc86xx: Use SRR0/1/rfi to enable address translation, not blr + + Using a mtmsr/blr means that you have to be executing at the + same virtual address once you enable translation. This is + unnecessarily restrictive, and is not really how this is + usually done. Change it to use the more common mtspr SRR0/SRR1 + and rfi method. + + Signed-off-by: Becky Bruce + +commit 6bf98b1362f0cb237620355ed3e6762fff82388d +Author: Becky Bruce +Date: Wed Nov 5 14:55:33 2008 -0600 + + mpc8641: make DIAG_ADDR == FLASH_BASE + + Currently, that's what it is, but it's hardcoded. + + Signed-off-by: Becky Bruce + +commit 170deacb1ddc39164bdb68f3963e0c0456a5369b +Author: Becky Bruce +Date: Wed Nov 5 14:55:32 2008 -0600 + + mpc8641: Drop imaginary second flash bank, map 8MB + + There's a lot of setup and foo for the second flash + bank. The problem is, this board doesn't actually have one. + Clean this up. Also, the flash is 8M in size. Get rid + of the confusing aliased overmapping, and just map 8M. + + Signed-off-by: Becky Bruce + +commit 0f2d66027bfc60dc7eea2f096af8891988c5abe4 +Author: Becky Bruce +Date: Wed Nov 5 14:55:31 2008 -0600 + + mpc8641: only define CONFIG_ENV_SIZE once + + It's currently defined twice inside in an if/else block, but + both halves set the same value. Move the define outside + the if. + + Signed-off-by: Becky Bruce + +commit 24bfb48c35fed6ad1f047e3e4a27df302482cd93 +Author: Becky Bruce +Date: Wed Nov 5 14:55:30 2008 -0600 + + mpc86xx: Move setup_bats into cpu_init_f + + In order to later allow for a physical relocation of the + flash, setup_bats, which sets up the final BAT mapping + for the board, needs to happen *after* init_laws(). + Otherwise, there will be no window programmed for the flash + at the new physical location at the point when we change + the mmu translation. + + Signed-off-by: Becky Bruce + +commit 05df3e5a638be8c5b0899eae1766bbe8e4b92c17 +Author: Becky Bruce +Date: Wed Nov 5 14:55:29 2008 -0600 + + mpc8641: Remove extra "0" from BR2 define + + Signed-off-by: Becky Bruce + +commit edf3fe7d39a1ee07353128af5221422ce9ccfad6 +Author: Richard Retanubun +Date: Thu Oct 23 09:08:18 2008 -0400 + + drivers/qe/uec_phy.c: Added PHY-less (fixed PHY) driver. + + Copied over the fixed PHY driver as used in pp4xx/4xx_enet.c. + This adds support for PHY-less MAC connections to the UEC. + + Signed-off-by: Richard Retanubun + Signed-off-by: Ben Warren + +commit 54bdcc9fb6670afde9c26dcf364f582879bf21d6 +Author: TsiChung Liew +Date: Thu Oct 23 16:27:24 2008 +0000 + + ColdFire: Add mii driver in drivers/net + + All CF platforms' mii.c are consolidated into one + + Signed-off-by: TsiChung Liew + Signed-off-by: Ben Warren + +commit 25a859066b3af1070eb69f12022113c0a91bd813 +Author: Ben Warren +Date: Mon Oct 27 23:53:17 2008 -0700 + + Moved initialization of PPC4xx EMAC to cpu_eth_init() + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + Acked-by: Stefan Roese + +commit 4d03a4e20e58552cb96d61a0e8b56cdb6cc60126 +Author: Ben Warren +Date: Sun Nov 9 21:29:23 2008 -0800 + + Moved PPC4xx EMAC driver to drivers/net + + Also changed path in all linker scripts that reference this driver + + Signed-off-by: Ben Warren + Acked-by: Stefan Roese + +commit 96e21f86e8266ed40759e5495ee461265d7f6d28 +Author: Ben Warren +Date: Mon Oct 27 23:50:15 2008 -0700 + + Changed PPC4xx EMAC driver to require CONFIG_PPC4xx_EMAC + + All in-tree IBM/AMCC PPC4xx boards using the EMAC get this new CONFIG + + Signed-off-by: Ben Warren + Acked-by: Stefan Roese + +commit 9eb79bd8856bcab896ed5e1f1bca159807a124dd +Author: Ben Warren +Date: Thu Oct 23 22:02:49 2008 -0700 + + Moved initialization of MPC8XX SCC to cpu_eth_init() + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + +commit a9bec96d6359ac9f90a852962bf3040cad9e0256 +Author: Ben Warren +Date: Wed Oct 22 23:47:51 2008 -0700 + + Moved initialization of MPC8220 FEC to cpu_eth_init() + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + +commit 0e8454e990385a58f708c2fc26d31ac041c7a6c5 +Author: Ben Warren +Date: Wed Oct 22 23:32:48 2008 -0700 + + Moved initialization of QE Ethernet controller to cpu_eth_init() + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + +commit 3456a148276d5494b53ee40242efb6462d163504 +Author: Ben Warren +Date: Wed Oct 22 23:20:29 2008 -0700 + + Moved initialization of FCC Ethernet controller to cpu_eth_init + + Affected boards: + Several MPC8xx boards + Several MPC8260/MPC8272 boards + Several MPC85xx boards + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + +commit 62e15b497f5c6334c059512678c8db7940ae4c61 +Author: Ben Warren +Date: Thu Oct 30 22:15:35 2008 -0700 + + Fix typo in cpu/mpc85xx/cpu.c + + CONFIG_MPC85xx_FEC -> CONFIG_MPC85XX_FEC + + Signed-off-by: Ben Warren + +commit 5dfb3ee3f54e2382a08d72906f0e79ecf944f6e3 +Author: Shinya Kuribayashi +Date: Sun Oct 19 12:08:50 2008 +0900 + + net: Move initialization of Au1x00 SoC ethernet MAC to cpu_eth_init + + This patch will move au1x00_eth_initialize from net/eth.c to cpu_eth_init + as a part of ongoing eth_initialize cleanup work. The function ret value + is also fixed as it should be negative on fail. + + Signed-off-by: Shinya Kuribayashi + Signed-off-by: Ben Warren + +commit cc94074ecac1885d18ddb683eb934b3c0268aa5b +Author: Ben Warren +Date: Fri Sep 5 01:55:22 2008 -0400 + + Moved initialization of IXP4XX_NPE Ethernet controller to cpu_eth_init() + + Also, removed the driver initialization from net/eth.c + + Signed-off-by: Ben Warren + +commit f2a7806fc23e82d30c8548911369e0c530607354 +Author: Clive Stubbings +Date: Mon Oct 27 15:05:00 2008 +0000 + + xilinx_emaclite buffer overrun + + Patch to fix buffer allocation size and alignment. Buffer needs to be u32 aligned and + PKTSIZE_ALIGN bytes long. + + Acked-by: Michal Simek + + Signed-off-by: Ben Warren + +commit 0115b1953718a2969f6469d3d5da51ba11e12d42 +Author: richardretanubun +Date: Fri Sep 26 08:59:12 2008 -0400 + + NET: QE: UEC: Make uec_miiphy_read() and uec_miiphy_write() use the devname arg. + + The current uec_miiphy_read and uec_miiphy_write hardcode access devlist[0] + This patch makes these function use the devname argument that is passed in to + allow access to the phy registers of other devices in devlist[]. + + Signed-of-by: Richard Retanubun + + Signed-off-by: Ben Warren + +commit 44dcb7332033db8de2810f2fffcae3084f15c8d4 +Author: richardretanubun +Date: Mon Oct 6 15:31:43 2008 -0400 + + Adds two more ethernet interface to 83xx + + Fixed compiler warning "declared but unused" eth5_uec_info and eth6_uec_info. + Signed-off-by: Richard Retanubun + Signed-off-by: Ben Warren + +commit d8003fa03733901b73d6c4667b4d80fc8eb1ddd3 +Author: Stelian Pop +Date: Fri Nov 7 13:54:31 2008 +0100 + + AT91: Replace AT91_BASE_EMAC by the board specific values. + + AT91_BASE_EMAC is never used outside the board specific files, + so replace its usage by the board specific AT91xxx_BASE_EMAC. + + Signed-off-by: Stelian Pop + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit c91e17affa175ce06afa89b04752301eb4a61666 +Author: Stelian Pop +Date: Fri Nov 7 12:09:21 2008 +0100 + + AT91: Replace (undefined) AT91_ID_US* by the board specific values. + + AT91_ID_US0 / AT91_ID_US1 / AT91_ID_US2 were used but never defined. + Since they are never used outside the board specific files, they can + be replaced by the board specific AT91xxx_ID_US0 / AT91xxx_ID_US1 / + AT91xxx_ID_US2. + + Bug spotted by Jesus Alvarez . + + Signed-off-by: Stelian Pop + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 28962f5a2de81bc0eed1c0b08c6bfaa1cc134ea2 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Nov 1 10:47:59 2008 +0100 + + Makefile/at91sam9: move some at91sam9 to the correct subsection for arm926ejs + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 1079432e04ccf71aa3684181186182cd63512f19 +Author: Sergey Lapin +Date: Fri Oct 31 12:28:43 2008 +0100 + + Custom AFEB9260 board support + + This patch provides support for AFEB9260 board, a product of + OpenSource hardware and software. Some commertial projects + are made with this design. A board is basically AT91SAM9260-EK + with some modifications and different peripherals and different + parts used. Main purpose of this project is to gain experience in + hardware design. + More info: http://groups.google.com/group/arm9fpga-evolution-board + (In Russian only, sorry). + Subversion repository: svn://194.85.238.22/home/users/george/svn/arm9eb + + Signed-off-by: Sergey Lapin + +commit 26eecd24f97130e56e9c2c2af0e714e05bce6e00 +Author: Tomohiro Masubuchi +Date: Tue Oct 21 13:17:16 2008 +0900 + + Change to use "do_div" macro + + Signed-off-by: Tomohiro Masubuchi + +commit e352495318d8056a00faa21b633b3e4374bfbf52 +Author: Roman Mashak +Date: Wed Oct 22 16:00:26 2008 -0400 + + ARM926EJ-S: relocate OMAP specific 'cpuinfo.c' into OMAP directory + + OMAP identification is implemented in 'cpuinfo.c' and located in ARM926EJ-S directory. + It makes sense to place this file in OMAP specific subdirectory, i.e. cpu/arm926ejs/omap + + Signed-off-by: Roman Mashak + +commit 248b2c367210c06dbd5fbdecf27e97fbe9d05fdb +Author: Roman Mashak +Date: Tue Oct 21 03:01:41 2008 -0700 + + ARM/Versatile port: Removed unused functions + + Removal of never used functions. + + Signed-off-by: Roman Mashak + +commit 1266df887781c779deaf6d05eea2ef90a470cb34 +Author: Becky Bruce +Date: Mon Nov 3 15:44:01 2008 -0600 + + powerpc: change 86xx SMP boot method + + We put the bootpg for the secondary cpus into memory and use + BPTR to get to it. This is a step towards converting to the + ePAPR boot methodology. Also, the code is written to + deal properly with more than 4GB of RAM. + + Signed-off-by: Becky Bruce + +commit b5431560682d8f318fbc49db87cfe13ab41d2ee4 +Author: Becky Bruce +Date: Fri Oct 31 17:13:49 2008 -0500 + + 8641HPCN: Config file cleanup + + There are several items in the config file that were hardcoded + but that should really be based on other config options, since + the regions are contiguous and depend on being so. This cleans + that up a bit. Also, add BR_PHYS_ADDR() macro to convert + addresses into the proper format for BR registers. + + Signed-off-by: Becky Bruce + +commit 4c77de3f144ca088c3867bd6240718c10f5a9d69 +Author: Becky Bruce +Date: Fri Oct 31 17:13:32 2008 -0500 + + 86xx: Make dram_size a phys_size_t + + It's currently a long and should be phys_size_t. + + Signed-off-by: Becky Bruce + +commit 104992fc541302a6bac74448e01e7fdad20abca0 +Author: Becky Bruce +Date: Sun Nov 2 18:19:32 2008 -0600 + + powerpc 86xx: Handle CCSR relocation earlier + + Currently, the CCSR gets relocated while translation is + enabled, meaning we need 2 BAT translations to get to both the + old location and the new location. Also, the DEFAULT + CCSR location has a dependency on the BAT that maps the + FLASH region. Moving the relocation removes this unnecessary + dependency. This makes it easier and more intutive to + modify the board's memory map. + + Swap BATs 3 and 4 on 8610 so that all 86xx boards use the same + BAT for CCSR space. + + Signed-off-by: Becky Bruce + +commit af5d100e8d5cd49d69d52d20f1181eb06ddb4ddf +Author: Becky Bruce +Date: Fri Oct 31 17:14:14 2008 -0500 + + mpc8641: Make PCI and RIO mutually exclusive, fix non-PCI build + + You can't actually have both, and with some coming changes to + change the memory map for the board and support 36-bit physical, + we need the extra BAT that is being consumed by having both. + + I also make non-PCI configs build cleanly, for the sake of sanity. + + Signed-off-by: Becky Bruce + +commit 98693b85d42ff438375dc6d6dcadc70eb7b050bb +Author: Becky Bruce +Date: Fri Oct 31 17:14:00 2008 -0500 + + mpc8641: Stop supporting non-PCI_PNP configs + + We don't actually ever do this, remove the code so we + can stop maintaining it. + + Signed-off-by: Becky Bruce + +commit e4f69d1bd21a12049744989d2dd6b5199c9b8f23 +Author: TsiChung Liew +Date: Fri Oct 24 12:59:12 2008 +0000 + + ColdFire: Fix M5329EVB and M5373EVB nand issue + + Fix compilation issue caused by a few mismatches. + Provide proper nand chip select enable/disable in + nand_hwcontrol() rather than in board_nand_init() + just enable once. Remove redundant local nand driver + functions - nand_read_byte(), nand_write_byte() and + nand_dev_ready() to use common nand driver. + + Signed-off-by: TsiChung Liew + +commit 1b2708442224a551a0b865b52710306333888932 +Author: TsiChung Liew +Date: Wed Oct 22 11:55:30 2008 +0000 + + ColdFire: Fix compilation error + + The error was caused by the change for strmhz() in cpu.c. + A few of them were one extra close parenthesis. + + Signed-off-by: TsiChung Liew + +commit 536e7dac16769954915a484e682a2efb28699133 +Author: TsiChung Liew +Date: Wed Oct 22 11:38:21 2008 +0000 + + ColdFire: Add MCF5301x CPU and M53017EVB support + + Signed-off-by: TsiChung Liew + +commit a21d0c2cc9add8894d971ab791f4032f077db817 +Author: TsiChung Liew +Date: Tue Oct 21 15:37:02 2008 +0000 + + ColdFire: Add SBF support for M52277EVB + + Add serial boot support + + Signed-off-by: TsiChung Liew + +commit b202816c61042c183fe67d097a5893b0f2dafba0 +Author: TsiChung Liew +Date: Tue Oct 21 14:19:26 2008 +0000 + + ColdFire: Use CFI driver for M5272C3 + + Signed-off-by: TsiChung Liew + +commit f3962d3f574e5a1cffacd4e9bc48713060a2a314 +Author: TsiChung Liew +Date: Tue Oct 21 13:47:54 2008 +0000 + + ColdFire: Relocate FEC's GPIO and mii functions protocols + + Place FEC pin assignments in cpu_init.c from platform's + mii.c + + Signed-off-by: TsiChung Liew + +commit 6e80f5aa09f8d41bac50b38dc7488ecd22107802 +Author: TsiChung Liew +Date: Tue Oct 21 12:15:44 2008 +0000 + + ColdFire: Remove platforms mii.c file + + Will use mcfmii.c driver in drivers/net rather than + keep creating new mii.c for each future platform. + Remove EB+MCF-EV123, cobra5272, idmr, M5235EVB, + M5271EVB, M5272C3, M5275EVB, M5282EVB, M5329EVB, + M5373EVB, M54451EVB, M54455EVB, M547xEVB, and M548xEVB's + mii.c + + Signed-off-by: TsiChung Liew + +commit 012522fef3b382469125beb46a315ab4dee02fb0 +Author: TsiChung Liew +Date: Tue Oct 21 10:03:07 2008 +0000 + + ColdFire: Modules header files cleanup + + Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG, + MDHA, SKHA, INTC, and FlexBus structures and + definitions in immap_5xxx.h to more unify modules + header files. Append DSPI support for m547x_8x. + SSI cleanup. Remove USB Host structure from immap_539.h. + Apply changes to use FlexBus structures in mcf52x2's + cpu_init.c and platform configuration files. + + Signed-off-by: TsiChung Liew + +commit ac2331aee99ad36be0fcfed8c49922e3c61b576d +Author: TsiChung Liew +Date: Tue Oct 21 08:52:36 2008 +0000 + + ColdFire: Remove linker file + + Each different build for M54455EVB and M5235EVB will + create a u-boot.lds linker file. It is redundant to + keep the u-boot.lds + + Signed-off-by: TsiChung Liew + +commit 0829323073c505556ed5f5073f91adb504584d45 +Author: Peter Tyser +Date: Fri Oct 31 11:26:44 2008 -0500 + + ppc: Fix compile warnings when !CONFIG_OF_LIBFDT + + Signed-off-by: Peter Tyser + +commit a80b21d5127583171d6e9bc7f722947641898012 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 31 12:12:12 2008 +0100 + + common/Makefile: create others group for non core, environment and command files + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 60c68d9c1c6d18ce02c862a05718fd94f97c13d0 +Author: Wolfgang Denk +Date: Fri Oct 31 01:13:37 2008 +0100 + + TQM8260: use CFI flash driver instead of custom driver. + + Signed-off-by: Wolfgang Denk + +commit 20d04774f4ef3f6e38974636e0e36ae0f0b5501f +Author: Andy Fleming +Date: Thu Oct 30 17:35:30 2008 -0500 + + Consolidate MAX/MIN definitions + + There were several, now there is one (two if you count the lower-case + versions). + + Signed-off-by: Andy Fleming + +commit 298e476c66fd88d0bc4f0371118652d2b5de4e8a +Author: Heiko Schocher +Date: Thu Oct 30 09:23:09 2008 +0100 + + mgsuvd: remove unused defines in config file. + + Signed-off-by: Heiko Schocher + +commit 3cbd823116ea8b7c654e275a8c2fca87cd1f5dc5 +Author: Wolfgang Denk +Date: Sun Nov 2 16:14:22 2008 +0100 + + Coding Style cleanup, update CHANGELOG + + Signed-off-by: Wolfgang Denk + +commit a47f957ab523019992fdef857af01bd71c58a4da +Author: Alessandro Rubini +Date: Fri Oct 31 22:33:21 2008 +0100 + + NAND: Allow NAND and OneNAND to coexist + + This removes in nand.h code that is verbatim duplicated from bbm.h, + including directly bbm.h in nand.h. The previous state of affairs + prevented compiling code for a board hosting both NAND and OneNAND chips. + + Reported-by: Scott Wood + Signed-off-by: Alessandro Rubini + Signed-off-by: Scott Wood + +commit 2f77c7f45b9a37ef265a8dbe3c18efa706fed214 +Author: Scott Wood +Date: Fri Oct 31 13:51:12 2008 -0500 + + JFFS2: Eliminate compiler error when both NAND and OneNAND are enabled. + + Reported-by: Alessandro Rubini + Signed-off-by: Scott Wood + +commit c57fc28947e248fb03c49a28b467686299895055 +Author: Jason Jin +Date: Fri Oct 31 05:07:04 2008 -0500 + + NAND: Add NAND support for MPC8536DS board + + This patch defines 1M TLB&LAW size for NAND on MPC8536DS, assigns 0xffa00000 + for CONFIG_SYS_NAND_BASE and adds other NAND supports in config file. + It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image. + + Singed-off-by: Jason Jin + Signed-off-by: Haiying Wang + Signed-off-by: Kumar Gala + +commit 6fc110bd8a8d642b8f7b0653bd9a08a0b7c3d50b +Author: Haiying Wang +Date: Fri Oct 31 05:06:14 2008 -0500 + + NAND: Fix CONFIG_ENV_ADDR for MPC8572DS + + CONFIG_ENV_ADDR should be (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE). + + Signed-off-by: Haiying Wang + Signed-off-by: Kumar Gala + +commit 51b572a801be57790fe26adaa530210e7fba59cc +Author: Nobuhiro Iwamatsu +Date: Fri Oct 24 10:49:48 2008 +0900 + + sh: rsk7203: Moved rsk7203 board to board/renesas + + Signed-off-by: Nobuhiro Iwamatsu + +commit 58453b00b3ebb26aaa901210023f99504a90bb00 +Author: Nobuhiro Iwamatsu +Date: Fri Oct 24 10:48:31 2008 +0900 + + sh: MigoR: Moved MigoR board to board/renesas + + Signed-off-by: Nobuhiro Iwamatsu + +commit c1da2a22817ba85b437afa2f4e715e658b219fd1 +Author: Nobuhiro Iwamatsu +Date: Fri Oct 24 10:39:44 2008 +0900 + + sh: r2dplus: Moved r2dplus board to board/renesas + + Signed-off-by: Nobuhiro Iwamatsu + +commit 78385bf2359d828184d0b3649f7ae6b933420000 +Author: Nobuhiro Iwamatsu +Date: Fri Oct 24 10:36:13 2008 +0900 + + sh: sh7763rdp: Moved sh7763rdp board to board/renesas + + Signed-off-by: Nobuhiro Iwamatsu + +commit c6525d459c350bfc246ea7826456af77e1e314eb +Author: Nobuhiro Iwamatsu +Date: Fri Oct 24 10:35:19 2008 +0900 + + sh: sh7785lcr: Moved sh7785lcr board to board/renesas + + Signed-off-by: Nobuhiro Iwamatsu + +commit acd3e30d09a73f876222f0d496c4f52ee9d0771d +Author: Nobuhiro Iwamatsu +Date: Fri Oct 24 10:34:21 2008 +0900 + + sh: r7780mp: Moved r7780mp board to board/renesas + + Signed-off-by: Nobuhiro Iwamatsu + +commit f84e6ea275353b8fea772ec7553ff7e4b1f642e0 +Author: Nobuhiro Iwamatsu +Date: Fri Oct 24 10:32:14 2008 +0900 + + sh: ap325rxa: Moved ap325rxa board to board/renesas + + Signed-off-by: Nobuhiro Iwamatsu + +commit 9abda6ba735efb059f63dcb25d78b174bfcad1ad +Author: Wolfgang Denk +Date: Fri Oct 31 01:12:28 2008 +0100 + + CFI Driver: Fix "flash not ready" problem + + This patch fixes a problem on systems where the NOR flash is attached + to a 64 bit bus. The toggle bit detection in flash_toggle() is based + on the assumption that the same flash address is read twice without + any other interjacent flash accesses. However, on 32 bit systems the + function flash_read64() [as currently implemented] does not perform + an atomic 64 bit read - instead, this is broken down into two 32 bit + read accesses on addresses "addr" and "addr + 4". So instead of + reading a 64 bit value twice from "addr", we see a sequence of 4 32 + bit reads from "addr", "addr + 4", "addr", and "addr + 4". The + consequence is that flash_toggle() fails to work. + + This patch implements a simple, but somewhat ugly solution, as it + avoids the use of flash_read64() in this critical place (by breaking + it down manually into 32 bit read operations) instead of rewriting + flash_read64() such to perform atomic 64 bit reads as one could + expect. However, such a rewrite would require the use of floating + point load operations, which becomes pretty complex: + + save MSR; + set Floating Point Enable bit in MSR; + use "lfd" instruction to perform atomic 64 bit read; + use "stfd" to store value to temporary variable on stack; + load u64 value from temporary variable; + restore saved MSR; + return u64 value; + + The benefit-cost ratio of such an implementation was considered too + bad to actually attempt this, especially as we can expect that such + an implementation would not only have a bigger memory footprint but + also cause a performance degradation. + + Signed-off-by: Wolfgang Denk + Signed-off-by: Stefan Roese + +commit cdd4fe63b094d4b767f12ff241d72566b461ee61 +Author: Stefan Roese +Date: Fri Oct 31 10:48:08 2008 +0100 + + ppc4xx: Fix spelling error in MAINTAINERS file + + Signed-off-by: Stefan Roese + +commit be270798900b75ad9c47c7b79c72f70441196c56 +Author: Matthias Fuchs +Date: Tue Oct 28 13:37:00 2008 +0100 + + ppc4xx: Update PMC440 board support + + This patch brings PMC440 board support up to date: + + - fix GPIO configuration + - add misc_init_f() + - use better values for usbact variable + - fix USB 2.0 phy reset sequence + - shrink BAR2 to save PCI address space + - add FDT support + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 75183b1a7fc04206d9779d13f16e03853d7e965d +Author: Matthias Fuchs +Date: Tue Oct 28 13:36:59 2008 +0100 + + ppc4xx: Fix PMC440 BSP commands + + This patch fixes the PMC440 BSP commands painit and selfreset + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 76b565b69f886d5ae748db65e44f464b0e70d41a +Author: Matthias Fuchs +Date: Tue Oct 28 13:36:58 2008 +0100 + + ppc4xx: Update PMC440 board configuration + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit ca0c2d42b93116a8e1b8ef8ad4493c7dc9b5f2e4 +Author: Matthias Fuchs +Date: Tue Oct 28 13:36:57 2008 +0100 + + ppc4xx: Fix esd loadpci command + + This patch fixes esd's loadpci command when not all + memory on adapter boards is accessable via PCI. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 492aa9ea13791ca4591b5bde895a425e27ae2d10 +Author: Matthias Fuchs +Date: Tue Oct 28 13:36:56 2008 +0100 + + ppc4xx: Clean up PMC440 header + + -Codingstyle cleanup + -Remove unused GPIO define + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 295133258a44f97a57fb2ec339aecfda11f4db95 +Author: Matthias Fuchs +Date: Tue Oct 28 13:36:55 2008 +0100 + + ppc4xx: Handle other board variant in PMC440 FPGA code + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit cc2dc9b08cf7c09f9f237f8cb9303f11603d4fb0 +Author: Ricardo Ribalda Delgado +Date: Mon Oct 27 12:35:59 2008 +0100 + + ppc4xx: Merge xilinx-ppc440 and xilinx-ppc405 cfg + + Xilinx ppc440 and ppc405 have many similarities. This patch merge the + config files of both infrastuctures + + Signed-off-by: Ricardo Ribalda Delgado + Signed-off-by: Stefan Roese + +commit 3befd85633d33c4dcca1f359c3f4848c5ab8e4d2 +Author: Stefan Roese +Date: Sat Oct 25 06:45:31 2008 +0200 + + ppc4xx: Correctly configure the GPIO pin muxing on Arches + + Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO + pin multiplexing correctly + + Signed-off-by: Stefan Roese + +commit 7c84fe6a06dad9f793ed85b39b1e6c11a7882f5c +Author: Bartlomiej Sieka +Date: Thu Oct 30 23:22:04 2008 +0100 + + Fix to the auto-update feature documentation (CONFIG_UPDATE_TFTP_MSEC_MAX) + + Signed-off-by: Bartlomiej Sieka + +commit 4bc7deee9095f21e243b724ca3d634251c1d5432 +Author: David Gibson +Date: Wed Oct 29 23:27:45 2008 -0500 + + libfdt: Fix bug in fdt_subnode_offset_namelen() + + There's currently an off-by-one bug in fdt_subnode_offset_namelen() + which causes it to keep searching after it's finished the subnodes of + the given parent, and into the subnodes of siblings of the original + node which come after it in the tree. + + Signed-off-by: David Gibson + Signed-off-by: Kumar Gala + +commit f242a08871839eac081ba5b599af979f3a148a0d +Author: Peter Korsgaard +Date: Tue Oct 28 08:26:52 2008 +0100 + + fdt_resize(): ensure minimum padding + + fdt_add_mem_rsv() requires space for a struct fdt_reserve_entry + (16 bytes), so make sure that fdt_resize at least adds that much + padding, no matter what the location or size of the fdt is. + + Signed-off-by: Peter Korsgaard + Acked-by: Andy Fleming + +commit d685b74c64a38849f1a129b3ab846fbf67dd937e +Author: Dave Liu +Date: Thu Oct 23 21:59:35 2008 +0800 + + 74xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache + + The patch is following the commit 392438406041415fe64ab8748ec5ab5ad01d1cf7 + + mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache + + This is needed in unlock_ram_in_cache() because it is called from C and + will corrupt the small data area anchor that is kept in R2. + + lock_ram_in_cache() is modified similarly as good coding practice, but + is not called from C. + + Signed-off-by: Nick Spence + + also, the r2 is used as global data pointer. + + Signed-off-by: Dave Liu + +commit e053ab1903ccae6048ef759025b9f675bba91450 +Author: Scott Wood +Date: Tue Oct 28 11:45:04 2008 -0500 + + mpc83xx pci: Round up memory size in inbound window. + + The current calculation will fail to cover all memory if + its size is not a power of two. + + Signed-off-by: Scott Wood + Signed-off-by: Kim Phillips + +commit 1c671977dc81359628be27ac99c174e76e8069ba +Author: Dave Liu +Date: Thu Oct 23 21:19:13 2008 +0800 + + 86xx: remove the unused definition + + Signed-off-by: Dave Liu + +commit eaa44c5dc83756c3067b9e6c9db626facd0b0660 +Author: Dave Liu +Date: Tue Oct 28 17:47:49 2008 +0800 + + 86xx: remove the redundant r2 global data pointer save + + The commit 67256678f00c09b0a7f19e862e5c1847553d31bc add + the another global data pointer save, but in fact the + global data pointer will be initialized in the board_init_r, + so remove it such as the 85xx/83xx family. + + Signed-off-by: Dave Liu + Acked-by: Kumar Gala + +commit bd888e9544419665334a6f47f81f34011cea38f3 +Author: Dave Liu +Date: Tue Oct 28 17:47:41 2008 +0800 + + 86xx: remove the unused code for 86xx family + + I believe these code was copied from 74xx family, but for + 86xx, it is unused. + + Signed-off-by: Dave Liu + Acked-by: Kumar Gala + +commit 5ba1ef507402bc5e344dc374203792a40f222e8a +Author: Dave Liu +Date: Tue Oct 28 17:46:35 2008 +0800 + + 86xx: remove the second DDR LAW setting for mpc8641hpcn + + The DDR1 LAW will precedence the DDR2 LAW, so remove + the second DDR LAW. + + Signed-off-by: Dave Liu + Acked-by: Becky Bruce + +commit 137a2dfd11ac51ae3154f13f323609b33a4a072e +Author: Dave Liu +Date: Tue Oct 28 17:46:23 2008 +0800 + + 86xx: remove the unused ddr_enable_ecc in the board file + + The DDR controller of 86xx processors have the ECC data init + feature, and the new DDR code is using the feature, we don't + need the way with DMA to init memory again. + + Signed-off-by: Dave Liu + Acked-by: Kumar Gala + +commit dc2adad85bf580d65916c940683f6e9671e8a5dd +Author: Dave Liu +Date: Tue Oct 28 17:46:12 2008 +0800 + + 86xx: Move the clear_tlbs before MMU turn on + + We must invalidate TLBs before MMU turn on, but + currently the code is not, if there are some stale + TLB entry valid in the TLBs, it will cause strange + issue. + + Signed-off-by: Dave Liu + Acked-by: Becky Bruce + +commit 5cdade07b118d07154cb882650f9778cecc8a87c +Author: Scott Wood +Date: Mon Oct 27 15:57:08 2008 -0500 + + mpc8313erdb: Document NAND boot. + + Previously, the documentation claimed that NAND boot is not supported. + This is no longer true. + + Signed-off-by: Scott Wood + +commit bd78bc6b2aebf5566aac464f936b88dfd97ab0bd +Author: Scott Wood +Date: Wed Oct 29 14:20:26 2008 -0500 + + NAND: Properly create JFFS2 cleanmarkers. + + As reported by Ilko Iliev , the "nand erase clean" + command is currently broken, and among other things causes all blocks + to be marked bad. + + This implements it properly using MTD_OOB_AUTO, along with some + indentation fixes. + + Signed-off-by: Scott Wood + +commit f7fe57c09866b44692d18c8cf22828bd137ec58d +Author: Scott Wood +Date: Wed Oct 29 13:42:41 2008 -0500 + + NAND fsl elbc: Set FMR[ECCM] based on page size. + + Hardware expects ECCM 0 for small page and ECCM 1 for large page + when booting from NAND, so use those defaults. + + Signed-off-by: Scott Wood + +commit c013b74975dab0805ef6d369b013230c4e8a660d +Author: Haiying Wang +Date: Wed Oct 29 13:32:59 2008 -0400 + + NAND: Add support for MPC8572DS board + + This patch defines 1M TLB&LAW size for NAND on MPC8572DS, assigns + 0xffa00000 for CONFIG_SYS_NAND_BASE and adds other NAND supports in + config file. + + It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image, to + make room for the increased code size with NAND enabled. + + Signed-off-by: Jason Jin + Signed-off-by: Haiying Wang + Signed-off-by: Scott Wood + +commit 4e190b03aaf2309bd2e025d1187a2ca880fedc95 +Author: Haiying Wang +Date: Wed Oct 29 11:05:55 2008 -0400 + + Make Freescale local bus registers available for both 83xx and 85xx. + + - Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it + can be shared by both 83xx and 85xx + - Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards + files which use lbus83xx_t. + - Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that + 85xx can share them. + + Signed-off-by: Jason Jin + Signed-off-by: Haiying Wang + Signed-off-by: Scott Wood + +commit 695c130e4bf75b444720ddfd83aca88f41c046cf +Author: Scott Wood +Date: Mon Oct 27 15:38:30 2008 -0500 + + NAND: Align right column of the shorthelp with other commands. + + I accidentally broke this in when making consistent the partial + alignment of the longhelp. + + Signed-off-by: Scott Wood + +commit 33efde5ecac91ab118ff00b95a181fd6d75f8645 +Author: Karl Beldan +Date: Mon Sep 15 16:08:03 2008 +0200 + + NAND: Reset chip on power-up + + Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx). + The first command sent is NAND_CMD_READID. + Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id. + Tested with an MT29F4G08AAC. + + Signed-off-by: Karl Beldan + Signed-off-by: Scott Wood + +commit c45912d8abc52de796b9059a58faf7c4166eab58 +Author: Scott Wood +Date: Fri Oct 24 16:20:43 2008 -0500 + + NAND: sync with 2.6.27 + + This brings the core NAND code up to date with the Linux kernel. + + Since there were several drivers in Linux as of the last update that are + not in u-boot, I'm not bringing over new drivers that have been added + since in the absence of an interested party. + + I did not update OneNAND since it was recently synced by Kyungmin Park, + and I'm not sure exactly what the common ancestor is. + + Signed-off-by: Scott Wood + +commit b1d0db1805c3395149777e507b6da53410abac4e +Author: Kumar Gala +Date: Tue Oct 21 17:25:47 2008 -0500 + + bootm: Added CONFIG_BOOTM_{LINUX, NETBSD, RTEMS} + + Added the ability to config out bootm support for Linux, NetBSD, RTEMS + + Signed-off-by: Kumar Gala + +commit 5a98127d81a6eefc5a78a704df619bfe362eeb87 +Author: Kumar Gala +Date: Tue Oct 21 17:25:46 2008 -0500 + + bootm: support subcommands in linux ppc bootm + + Add support for 'bdt', 'cmdline', 'prep' to the linux PPC bootm. + + Signed-off-by: Kumar Gala + +commit 49c3a861d11735838f1f1b11999ce433006dc919 +Author: Kumar Gala +Date: Tue Oct 21 17:25:45 2008 -0500 + + bootm: Add subcommands + + Add the ability to break the steps of the bootm command into several + subcommands: start, loados, ramdisk, fdt, bdt, cmdline, prep, go. + + This allows us to do things like manipulate device trees before + they are passed to a booting kernel or setup memory for a secondary + core in multicore situations. + + Not all OS types support all subcommands (currently only start, loados, + ramdisk, fdt, and go are supported). + + Signed-off-by: Kumar Gala + +commit be08315933537f061bc1ce61f33a29c56458bbad +Author: Kumar Gala +Date: Tue Oct 21 17:25:44 2008 -0500 + + bootm: Move to using a function pointer table for the boot os function + + This removes a bit of code and makes it easier for the upcoming sub bootm + command support to call into the proper OS specific handler. + + Signed-off-by: Kumar Gala + Signed-off-by: Wolfgang Denk + +commit a369f4a492fa2805d87775d27380f0eeaca35aa6 +Author: Graeme Russ +Date: Mon Sep 29 23:03:14 2008 +1000 + + i386: Renamed show_boot_progress in assembler code + + Renamed show_boot_progress in assembler init phase to + show_boot_progress_asm to avoid link conflicts with C version + + Signed-off-by: Graeme Russ + +commit 4442f45b0e1cbad35aa22d4cad22b90a57e3f32d +Author: Peter Tyser +Date: Mon Oct 27 16:42:00 2008 -0500 + + 85xx: Update MPC85xx_PORDEVSR_IO_SEL mask + + The MPC8572 has a 4-bit wide PORDEVSR IO_SEL field. Other MPC85xx + processors have a 3-bit wide IO_SEL field but have the most + significant bit is wired to 0 so this change should not affect + them. + + Signed-off-by: Peter Tyser + +commit cd4251624205cb97104f6e32679dc7754934f711 +Author: Becky Bruce +Date: Mon Oct 27 16:09:42 2008 -0500 + + powerpc: fix pci window initialization to work with > 4GB DRAM + + The existing code has a few errors that need to be fixed in + order to support large RAM sizes. Fix those, and add a + comment to make it clearer. + + Signed-off-by: Becky Bruce + Acked-by: Kumar Gala + +commit 219542a1a66ca017b12860920714a9859b18a5d7 +Author: Kumar Gala +Date: Mon Oct 27 13:16:20 2008 -0500 + + pci/fsl_pci_init: Removed a bunch pointless trailing backslashes. + + Signed-off-by: Kumar Gala + +commit 6b59e03e0237a40a2305ea385defdfd92000978b +Author: Haavard Skinnemoen +Date: Mon Sep 1 16:21:22 2008 +0200 + + lcd: Let the board code show board-specific info + + The information displayed when CONFIG_LCD_INFO is set is inherently + board-specific, so it should be done by the board code. The current code + dealing with this only handles two cases, and is already a horrible mess + of #ifdeffery. + + Yes, this duplicates some code, but it also allows boards to print more + board-specific information; this used to be very difficult. + + Signed-off-by: Haavard Skinnemoen + Signed-off-by: Anatolij Gustschin + +commit 6f93d2b8fca504200a5758f7c6dd2d6852900765 +Author: Haavard Skinnemoen +Date: Mon Sep 1 16:21:21 2008 +0200 + + lcd: Set lcd_is_enabled before clearing the screen + + This allows the logo/info rendering routines to use the regular + lcd_putc/lcd_puts/lcd_printf calls. + + Signed-off-by: Haavard Skinnemoen + Signed-off-by: Anatolij Gustschin + +commit 15b17ab52b7c15d46d9fc631cc06092e1e764de2 +Author: Haavard Skinnemoen +Date: Mon Sep 1 16:21:20 2008 +0200 + + lcd: Implement lcd_printf() + + lcd_printf() has a prototype in include/lcd.h but no implementation. Fix + this by borrowing the lcd_printf() implementation from the cogent board + code (which appears to use its own LCD framework.) + + Signed-off-by: Haavard Skinnemoen + Signed-off-by: Anatolij Gustschin + +commit 70dbc54c0a5c798bcf82ae2a1e227404f412e892 +Author: Haavard Skinnemoen +Date: Mon Sep 1 16:21:19 2008 +0200 + + atmel_lcdfb: Straighten out funky vl_sync logic + + If the board _didn't_ request INVLINE_INVERTED, we set INVLINE_INVERTED, + otherwise we don't. WTF? + + Signed-off-by: Haavard Skinnemoen + Signed-off-by: Anatolij Gustschin + +commit 23bb28f0f76b46c4b573374b0bb3b3f23d85ef55 +Author: Haavard Skinnemoen +Date: Mon Sep 1 16:21:18 2008 +0200 + + atmel_lcdfb: Eliminate unneeded #include + + atmel_lcdfb doesn't actually need anything from asm/arch/hardware.h. It + includes a file that does, asm/arch/gpio.h, but this file doesn't + include like it's supposed to. + + Add the missing include to asm/arch/gpio.h and remove the workaround + from the atmel_lcdfb driver. This makes the driver compile on avr32. + + Signed-off-by: Haavard Skinnemoen + Signed-off-by: Anatolij Gustschin + +commit c2083e0e11a03ef8be2e9f0ed8720fdc20832f3e +Author: Kumar Gala +Date: Wed Oct 22 14:38:55 2008 -0500 + + 86xx: Convert all fsl_pci_init users to new APIs + + Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use + fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). + + With these changes the board code is a bit smaller and we get dma-ranges + set in the device tree for these boards. + + Signed-off-by: Kumar Gala + Signed-off-by: Andrew Fleming-AFLEMING + Acked-by: Jon Loeliger + +commit 2dba0dea98c0dee1799ffd6fd6eb541645dbbd98 +Author: Kumar Gala +Date: Tue Oct 21 08:28:33 2008 -0500 + + 85xx: Convert all fsl_pci_init users to new APIs + + Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, + MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() + and ft_fsl_pci_setup(). + + With these changes the board code is a bit smaller and we get dma-ranges + set in the device tree for these boards. + + Signed-off-by: Kumar Gala + Signed-off-by: Andrew Fleming-AFLEMING + +commit a2aab460727e5f674353a83a81000ef794bffcae +Author: Kumar Gala +Date: Thu Oct 23 00:01:06 2008 -0500 + + pci/fsl_pci_init: Added fdt helper for setting up bus-ranges & dma-ranges + + Signed-off-by: Kumar Gala + Signed-off-by: Andrew Fleming-AFLEMING + +commit b9a1fa9787a3a79573f5f932a4f8aa216bcb1785 +Author: Kumar Gala +Date: Wed Oct 22 14:06:24 2008 -0500 + + pci/fsl_pci_init: Add a common PCI inbound setup function + + Add a common setup function that determines the pci_region(s) based + on how much memory we have in the system. + + Signed-off-by: Kumar Gala + Signed-off-by: Andrew Fleming-AFLEMING + +commit 612ea01018a459234d54ed57ec6a5a244ce75678 +Author: Kumar Gala +Date: Tue Oct 21 10:13:14 2008 -0500 + + pci/fsl_pci_init: Enable larger address and setting inbound windows properly + + * PCI Inbound window was setup incorrectly. The PCI address and system + address were swapped. The PCI address should be setting piwar/piwbear + and the system address should be setting pitar. + + * Removed masking of addresses to allow for system address to support + system address & PCI address >32-bits + + * Set PIWBEAR & POTEAR to allow for full 64-bit PCI addresses + + * Respect the PCI_REGION_PREFETCH for inbound windows + + Signed-off-by: Kumar Gala + Signed-off-by: Andrew Fleming-AFLEMING + +commit 8ab451c46b846f2bbd7122b29ffdd9a4a04da228 +Author: Kumar Gala +Date: Wed Oct 22 23:33:56 2008 -0500 + + fdt: Added helper to set PCI dma-ranges property + + Added fdt_pci_dma_ranges() that parses the pci_region info from the + struct pci_controller and populates the dma-ranges based on it. + + The max # of windws/dma-ranges we support is 3 since on embedded + PowerPC based systems this is the max number of windows. + + Signed-off-by: Kumar Gala + Signed-off-by: Andrew Fleming-AFLEMING + +commit 3bed2aaf2d50fd13273c14d17d4fd40ef42e0d0f +Author: Kumar Gala +Date: Thu Oct 23 00:05:47 2008 -0500 + + fdt: Add fdt_getprop_u32_default helpers + + Add helper functions to return find a node and return it's property + or a default value. + + Signed-off-by: Kumar Gala + Signed-off-by: Andrew Fleming-AFLEMING + Acked-by: Gerald Van Baren + +commit 8ba93f68a1bae89e033527ce67b41b4a87aa5b7f +Author: Kumar Gala +Date: Tue Oct 21 18:06:15 2008 -0500 + + 86xx: Enable 64-bit PCI resources on all Freescale boards + + Signed-off-by: Kumar Gala + Signed-off-by: Andrew Fleming-AFLEMING + +commit 0151cbaccf4504821ecfde0217299bd740086bb6 +Author: Kumar Gala +Date: Tue Oct 21 11:33:58 2008 -0500 + + 85xx: Enable 64-bit PCI resources on all Freescale boards + + Signed-off-by: Kumar Gala + Signed-off-by: Andrew Fleming-AFLEMING + +commit 30e76d5e3bc4c5208ee63585fe12b409d9308cd8 +Author: Kumar Gala +Date: Tue Oct 21 08:36:08 2008 -0500 + + pci: Allow for PCI addresses to be 64-bit + + PCI bus is inherently 64-bit. While not all system require access to + the full 64-bit PCI address range some do. This allows those systems + to enable the full PCI address width via CONFIG_SYS_PCI_64BIT. + + Signed-off-by: Kumar Gala + Signed-off-by: Andrew Fleming-AFLEMING + Acked-by: Wolfgang Denk + +commit ae5f943ba8ede448a4b1a145fd8911856701ecc5 +Author: Dave Liu +Date: Thu Oct 23 21:18:53 2008 +0800 + + 85xx: Fix the incorrect register used for DDR erratum1 + + The 8572 DDR erratum1: + DDR controller may enter an illegal state when operating + in 32-bit bus mode with 4-beat bursts. + + Description: + When operating with a 32-bit bus, it is recommended that + DDR_SDRAM_CFG[8_BE] is cleared when DDR2 memories are used. + This forces the DDR controller to use 4-beat bursts when + communicating to the DRAMs. However, an issue exists that + could lead to data corruption when the DDR controller is + in 32-bit bus mode while using 4-beat bursts. + + Projected Impact: + If the DDR controller is operating in 32-bit bus mode with + 4-beat bursts, then the controller may enter into a bad state. + All subsequent reads from memory is corrupted. + Four-beat bursts with a 32-bit bus only is used with DDR2 memories. + Therefore, this erratum does not affect DDR3 mode. + + Work Arounds: + To work around this issue, software must set DEBUG_1[31] in + DDR memory mapped space (CCSRBAR offset + 0x2f00 for DDR_1 + and CCSRBAR offset + 0x6f00 for DDR_2). + + Currenlty, the code is using incorrect register DDR_SDRAM_CFG_2 + as condition, but it should be DDR_SDRAM_CFG register. + + Signed-off-by: Dave Liu + +commit d5b693090ed08d24c18491df9d8fc7387b2906f3 +Author: Dave Liu +Date: Thu Oct 23 21:17:19 2008 +0800 + + 85xx: remove unused config definition + + Signed-off-by: Dave Liu + +commit 0f060c3bf82832331a509f2e5d2442539e7aad09 +Author: Kumar Gala +Date: Thu Oct 23 01:47:38 2008 -0500 + + 85xx: Add basic e500mc core support + + Introduce CONFIG_E500MC to deal with the minor differences between + e500v2 and e500mc. + + * Certain fields of HID0/1 don't exist anymore on e500mc + * Cache line size is 64-bytes on e500mc + * reset value of PIR is different + + Signed-off-by: Kumar Gala + +commit a38a5b6edd30f29fd5fdb1d7f674521906c0e677 +Author: Kumar Gala +Date: Thu Oct 23 01:47:37 2008 -0500 + + 85xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic number + + Using CONFIG_SYS_CACHELINE_SIZE instead of 31 means we can handle + e500mc's 64-byte cacheline properly when it gets added. + + Signed-off-by: Kumar Gala + +commit 5deb8022c3749faac30e9ad9694691e2442b5c93 +Author: Georg Schardt +Date: Fri Oct 24 13:51:52 2008 +0200 + + ppc4xx: New board avnet fx12 minimodul + + This patch adds support for the avnet fx12 minimodul. + It needs the "ppc4xx: Generic architecture for xilinx ppc405" + patch from Ricardo. + + Signed-off-by: Georg Schardt + Signed-off-by: Ricardo Ribalda Delgado + Signed-off-by: Stefan Roese + +commit 1f4d53260ec6f8f122aed75cce7c757d97a551e0 +Author: Ricardo Ribalda Delgado +Date: Tue Oct 21 18:29:46 2008 +0200 + + ppc4xx: Generic architecture for xilinx ppc405(v3) + + As "ppc44x: Unification of virtex5 pp440 boards" did for the xilinx + ppc440 boards, this patch presents a common architecture for all the + xilinx ppc405 boards. + + Any custom xilinx ppc405 board can be added very easily with no code + duplicity. + + This patch also adds a simple generic board, that can be used on almost + any design with xilinx ppc405 replacing the file ppc405-generic/xparameters.h + + This patch is prepared to work with the latest version of EDK (10.1) + + Signed-off-by: Ricardo Ribalda Delgado + Signed-off-by: Stefan Roese + +commit 485c00a57fab86f72a3769480c66bf1ca22e1459 +Author: Stefan Roese +Date: Fri Oct 24 08:56:09 2008 +0200 + + ppc4xx: Disable DDR2 autocalibration on Kilauea for now + + Since the new autocalibration still has some problems on some Kilauea + boards with 200MHz DDR2 frequency we disable the autocalibration and + use the hardcoded values as done before. This seems to work reliably + on all known DDR2 frequencies. + + After the autocalibration issue is fixed we will enable it again. + + Signed-off-by: Stefan Roese + +commit f177f4250c729727b1629fa8d8d6556c999e9b8c +Author: Mike Frysinger +Date: Wed Apr 9 02:02:07 2008 -0400 + + Blackfin: fix up UART status bit handling + + Some Blackfin UARTs are read-to-clear while others are write-to-clear. + This can cause problems when we poll the LSR and then later try and handle + any errors detected. + + Signed-off-by: Mike Frysinger + +commit ae0910298f31f5bb3d33a64b8467c60ea3c5d6d0 +Author: Mike Frysinger +Date: Sat Oct 11 20:42:17 2008 -0400 + + Blackfin: bf561-ezkit: drop redundant code + + Common Blackfin code already announces CPU information. + + Signed-off-by: Mike Frysinger + +commit e2eea98bff1369f77a9f59a5fd0bd4928bc3332e +Author: Mike Frysinger +Date: Sat Oct 11 20:43:10 2008 -0400 + + Blackfin: bf561-ezkit: drop pointless USB code + + The USB/LAN register settings are not actually used/needed in order to + drive things from U-Boot, so drop the code. + + Signed-off-by: Mike Frysinger + +commit c23bff63fb03cb9dbcd26522841e53f9b34fa1ab +Author: Mike Frysinger +Date: Sat Oct 11 20:47:58 2008 -0400 + + Blackfin: linker scripts: force start.o and set initcode boundaries + + Make sure that the start.o object is always the first object in our linker + script regardless of configuration settings, and add some linker symbols + so the ldr utility can properly locate the initcode when generating a LDR. + + Signed-off-by: Mike Frysinger + +commit bd33e5c613cf70e3cb51a73fdd653fe83b942bb0 +Author: Mike Frysinger +Date: Sat Oct 11 21:19:39 2008 -0400 + + Blackfin: small cpu init optimization while setting interrupt mask + + Use the sti instruction to set the initial interrupt mask rather than + banging on the core IMASK MMR to save both space and time. + + Signed-off-by: Mike Frysinger + +commit 960922291c9594acb575cec7e47d7bed9b58182c +Author: Mike Frysinger +Date: Sat Oct 11 21:18:10 2008 -0400 + + Blackfin: set initial stack correctly according to Blackfin ABI + + Signed-off-by: Mike Frysinger + +commit 25cd33d82ea521b7bd90ca858f8919fae1e9732b +Author: Mike Frysinger +Date: Sun Apr 20 03:11:53 2008 -0400 + + Blackfin: make baud calculation more accurate + + We should use the algorithm in the Linux kernel so that the UART divisor + calculation is more accurate. It also fixes problems on some picky UARTs + that have sampling anomalies. + + Signed-off-by: Mike Frysinger + +commit 0ba1da116e5edcb0c5ae4a7585d73f6548400a06 +Author: Mike Frysinger +Date: Mon Oct 6 04:21:41 2008 -0400 + + Blackfin: decode hwerrcause/excause when crashing + + Having to decode hwerrcause/excause values is a pain, so automate it. + + Signed-off-by: Mike Frysinger + +commit 2de95bb20c488f20298df6881b700a5a757ee780 +Author: Mike Frysinger +Date: Mon Oct 6 04:20:54 2008 -0400 + + Blackfin: fix register dump messages + + Make sure we report RETI/IPEND correctly. + + Signed-off-by: Mike Frysinger + +commit 7133999e6f62a9a01f6a8ffe234b8532b3ad1e4b +Author: Mike Frysinger +Date: Mon Oct 6 04:19:34 2008 -0400 + + Blackfin: don't bother displaying reboot msg when crashing + + The hang function already tells you to reboot, so no point in showing it + twice. + + Signed-off-by: Mike Frysinger + +commit 70c4c032ea112cc42aa1ce959c33fc4825eaef95 +Author: Mike Frysinger +Date: Sun Jun 1 01:23:48 2008 -0400 + + Blackfin: enable support for nested interrupts + + During cpu init, make sure we initialize the CEC properly so that + interrupts can fire and be handled while U-Boot is running. + + Signed-off-by: Mike Frysinger + +commit 39782727e185860faa4884c2b04e84cb33d1c6cf +Author: Mike Frysinger +Date: Mon Oct 6 03:55:25 2008 -0400 + + Blackfin: init NAND before relocating env + + If booting out of NAND, we need to make sure we initialize it properly + before attempting to relocate the environment. + + Signed-off-by: Mike Frysinger + +commit 0f9a8819416ba40a53de50af148847a0e508f84d +Author: Mike Frysinger +Date: Thu Aug 7 18:40:13 2008 -0400 + + Blackfin: check cache bits, not cplb bits + + Signed-off-by: Mike Frysinger + +commit 2c1ea9e370cb72dd6a5aa32338e87a8a1f77bd76 +Author: Mike Frysinger +Date: Thu Aug 7 17:52:59 2008 -0400 + + Blackfin: drop unused cache flush code + + Signed-off-by: Mike Frysinger + +commit 50f0d211912a648e31aa9123b4665a0444bb8ca9 +Author: Mike Frysinger +Date: Thu Aug 7 15:21:47 2008 -0400 + + Blackfin: unify cache handling code + + Signed-off-by: Mike Frysinger + +commit 3c8798983403cb68a827d7a0d09b1134524a1b7d +Author: Mike Frysinger +Date: Mon Oct 6 03:39:07 2008 -0400 + + Blackfin: only initialize the RTC when actually used + + Signed-off-by: Mike Frysinger + +commit 621e579b812dd1a2e6777f7cbf6e55e736505823 +Author: Mike Frysinger +Date: Mon Oct 6 03:44:33 2008 -0400 + + Blackfin: fix SWRST register definition + + The SWRST register is a 16bit, not 32bit, register. + + Signed-off-by: Mike Frysinger + +commit 06121c4e2d183887dcd7a4ca2dcd395b213ea15b +Author: Mike Frysinger +Date: Thu Aug 7 18:54:57 2008 -0400 + + Blackfin: build with -fomit-frame-pointer + + Signed-off-by: Mike Frysinger + +commit adbfeeb7b32f737a9738daa583350d2bb9ed017a +Author: Mike Frysinger +Date: Thu Aug 7 17:50:26 2008 -0400 + + Blackfin: document some of the blackfin directories + + Signed-off-by: Mike Frysinger + +commit e4337968e43698a68ba608369f46d4a4114111ca +Author: Mike Frysinger +Date: Thu Aug 7 15:16:56 2008 -0400 + + Blackfin: only enable hardware error irq by default + + Signed-off-by: Mike Frysinger + +commit 2b66f08f257ef6a06785f27b3c6dc2a4cfc9cac4 +Author: Mike Frysinger +Date: Thu Aug 7 13:36:43 2008 -0400 + + Blackfin: punt old unused mem_init.h header + + Signed-off-by: Mike Frysinger + +commit bcc121a01608042066a19ab5bff5bcfb805bf406 +Author: Mike Frysinger +Date: Thu Aug 7 13:18:55 2008 -0400 + + Blackfin: delete unused page_descriptor_table_size define + + Signed-off-by: Mike Frysinger + +commit 30fb9d24ae16e5b0ed39e5b7cc85981165ca98bc +Author: Mike Frysinger +Date: Thu Aug 7 13:17:03 2008 -0400 + + Blackfin: fix typo in boot mode comment and add NAND define + + Signed-off-by: Mike Frysinger + +commit 2e5cbe5461c5c4c6665e318cfe950a5a150d999c +Author: Ben Maan +Date: Thu Aug 7 13:14:21 2008 -0400 + + Blackfin: fix port mux defines for BF54x + + Signed-off-by: Mike Frysinger + +commit 0656ef2ba274910d31364fe022f6c7db0051660d +Author: Mike Frysinger +Date: Thu Aug 7 13:09:50 2008 -0400 + + Blackfin: update anomaly lists + + Signed-off-by: Mike Frysinger + +commit 50ca95402876cf7bac4e2d4f7855f616a038763f +Author: Mike Frysinger +Date: Thu Aug 7 13:08:54 2008 -0400 + + Blackfin: unify DSPID/DBGSTAT MMR definitions + + Signed-off-by: Mike Frysinger + +commit d9d8c7c696dec370ca714c03beb6e79d4c90bd5e +Author: Wolfgang Denk +Date: Tue Oct 21 15:53:51 2008 +0200 + + Fix strmhz(): avoid printing negative fractions + + Signed-off-by: Wolfgang Denk + +commit 4a7f6b750d8de543fdf8e58acd86745010054571 +Author: Richard Retanubun +Date: Fri Oct 17 08:55:51 2008 -0400 + + mpc83xx: Removed #ifdef CONFIG_MPC834X dependency on upmconfig function + + This is done to allow other 83XX based platforms which also have UPM + (e.g. 8360) to configure and use their UPM in u-boot. + + Signed-off-by: Richard Retanubun + Signed-off-by: Kim Phillips + +commit 3bf1be3c0cfb1129b68cc1474119e5f323536488 +Author: Anton Vorontsov +Date: Tue Oct 14 22:58:53 2008 +0400 + + mpc83xx: add support for switching between USB Host/Function for MPC837XEMDS + + With this patch u-boot can fixup the dr_mode and phy_type properties + for the Dual-Role USB controller. + + While at it, also remove #ifdefs around includes, they are not needed. + + Signed-off-by: Anton Vorontsov + Signed-off-by: Kim Phillips + +commit b3379f3fd13969934c00097c05754e7a8990fd39 +Author: Anton Vorontsov +Date: Wed Oct 8 20:52:54 2008 +0400 + + mpc83xx: add ELBC NAND support for the MPC837XEMDS boards + + Though NAND chip is replaceable on the MPC837XE-MDS boards, the + current settings don't work with the default chip on the board. + Nevertheless Freescale's U-Boot sets the option register correctly, + so I just dumped the register from the working u-boot. My guess is + that the old settings were applicable for some pilot boards, not + found in the production. + + This patch also enables FSL ELBC driver so that we could access + the NAND storage in the u-boot. + + The NAND support costs about 45KB, so the u-boot no longer fits + into two 128KB NOR flash sectors, thus we also have to adjust + environment location: add another 128KB to the monitor length. + + Signed-off-by: Anton Vorontsov + + It is due to hardware design and logic defect, that is the + I/O[0:7] of NAND chip is connected to LAD[7:0], so when + the NAND chip connected to nLCS3, you have to set up the + OR3[BCTLD] = '1' for normal operation, otherwise it will have + bus contention due to the pin 48/25 of U60 is enabled. + + Setup the OR3[BCTLD] = '1' , that meaning the LBCTL is not + asserted upon access to the NAND chip, keep the default state. + + Acked-by: Dave Liu + Signed-off-by: Kim Phillips + +commit 00f7bbae92e3b13f2b37aeb1def9bb12445521b7 +Author: Anton Vorontsov +Date: Thu Oct 2 19:17:33 2008 +0400 + + mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards + + The MPC837xE-MDS board's CPLD can auto-detect if the board is on the PIB, + standalone or acting as a PCI agent. User's Guide says: + + - When the CPLD recognizes its location on the PIB it automatically + configures RCW to the PCI Host. + - If the CPLD fails to recognize its location then it is automatically + configured as an Agent and the PCI is configured to an external arbiter. + + This sounds good. Though in the standalone setup the CPLD sets PCI_HOST + flag (it's ok, we can't act as PCI agents since we receive CLKIN, not + PCICLK), but the CPLD doesn't set the ARBITER_ENABLE flag, and without + any arbiter bad things will happen (here the board hangs during any config + space reads). + + In this situation we must disable the PCI. And in case of anybody really + want to use an external arbiter, we provide "pci_external_aribter" + environment variable. + + Signed-off-by: Anton Vorontsov + Signed-off-by: Kim Phillips + +commit 1da83a63d8e1b4bddeb82581b1745a09aac3e2d3 +Author: Anton Vorontsov +Date: Thu Oct 2 18:32:25 2008 +0400 + + mpc83xx: add SGMII riser module support for the MPC8378E-MDS boards + + This involves configuring the SerDes and fixing up the flags and + PHY addresses for the TSECs. + + For Linux we also fix up the device tree. + + Signed-off-by: Anton Vorontsov + Signed-off-by: Kim Phillips + +commit e6d9c8916de9c24f2c52d0b01cf00d2e74a04cd8 +Author: Anton Vorontsov +Date: Thu Oct 2 18:31:59 2008 +0400 + + mpc83xx: add TSECs' HRCWH masks for MPC837x processors + + We'll use these masks to parse TSEC modes out of HRCWH. + + Signed-off-by: Anton Vorontsov + Signed-off-by: Kim Phillips + +commit 6f9cc6608b4e1cefde56c0fb99ae1c95c42575ff +Author: Anton Vorontsov +Date: Thu Oct 2 18:31:56 2008 +0400 + + mpc83xx: serdes: add forgotten shifts for rfcks + + The rfcks should be shifted by 28 bits left. We didn't notice the bug + because we were using only 100MHz clocks (for which rfcks == 0). + + Though, for SGMII we'll need 125MHz clocks. + + Signed-off-by: Anton Vorontsov + Signed-off-by: Kim Phillips + +commit 55c531984dcf933e4cd13a187a7e08e873b7ced1 +Author: Anton Vorontsov +Date: Thu Oct 2 18:31:53 2008 +0400 + + mpc83xx: fix serdes setup for the MPC8378E boards + + MPC837xE specs says that SerDes1 has: + + — Two lanes running x1 SGMII at 1.25 Gbps; + — Two lanes running x1 SATA at 1.5 or 3.0 Gbps. + + And for SerDes2: + + — Two lanes running x1 PCI Express at 2.5 Gbps; + — One lane running x2 PCI Express at 2.5 Gbps; + — Two lanes running x1 SATA at 1.5 or 3.0 Gbps. + + The spec also explicitly states that PEX options are not valid for + the SD1. + + Nevertheless MPC8378 RDB and MDS boards configure the SD1 for PEX, + which is wrong to do. + + Signed-off-by: Anton Vorontsov + Signed-off-by: Kim Phillips + +commit 5c2ff323a94e27e481f70c44838d43fcd844dd46 +Author: Anton Vorontsov +Date: Wed Sep 10 18:12:37 2008 +0400 + + mpc83xx: mpc8360emds: rework LBC SDRAM setup + + Currently 64M of LBC SDRAM are mapped at 0xF0000000 which makes + it difficult to use (b/c then the memory is discontinuous and + there is quite big memory hole between the DDR/SDRAM regions). + + This patch reworks LBC SDRAM setup so that now we dynamically + place the LBC SDRAM near the DDR (or at 0x0 if there isn't any + DDR memory). + + With this patch we're able to: + + - Boot without external DDR memory; + - Use most "DDR + SDRAM" setups without need to support for + sparse/discontinuous memory model in the software. + + Signed-off-by: Anton Vorontsov + Signed-off-by: Kim Phillips + +commit def0819e920b05b34b56d8b42e1e43d9b89a52d6 +Author: Wolfgang Denk +Date: Tue Oct 21 11:23:56 2008 +0200 + + FDT: don't use private kernel header files + + On some systems (for example Fedora Core 4) U-Boot builds with the + following wanrings only: + + ... + In file included from /home/wd/git/u-boot/include/libfdt_env.h:33, + from fdt.c:51: + /usr/include/asm/byteorder.h:6:2: warning: #warning using private kernel header; include instead! + + This patch fixes this problem. + + Signed-off-by: Wolfgang Denk + +commit f4d14c55504ce40287321bd63ee269e3233ee4ae +Author: Stefan Roese +Date: Mon Oct 13 15:15:31 2008 +0200 + + ppc4xx: Add 1.0 & 1.066 GHz to canyonlands bootstrap command for PLL setup + + Signed-off-by: Stefan Roese + +commit 43cbce69d48d052574d71f50724be546d90a46a4 +Author: Stefan Roese +Date: Mon Oct 13 10:45:14 2008 +0200 + + ppc4xx: Correctly setup ranges property in ebc node + + Previously only the NOR flash mapping was written into the ranges + property of the ebc node. This patch now writes all enabled chip + select areas into the ranges property. + + Signed-off-by: Stefan Roese + +commit d7b26d58328f137471ea97de382bfa63f7239931 +Author: Dirk Eibach +Date: Wed Oct 8 15:37:50 2008 +0200 + + ppc4xx: Add GDSys neo 405EP board support + + Signed-off-by: Dirk Eibach + Signed-off-by: Stefan Roese + +commit c11da194545d2f4bbb54be1bb5e504e20ce8c16c +Author: Niklaus Giger +Date: Wed Oct 1 14:46:13 2008 +0200 + + ppc4xx: Update configs for Netstal boards + + I reorganized my config files, putting the common stuff into netstal-common.h + (got the idea by looking a amcc-common.h from Stefan). + + Added stuff to boot the new powerpc linux via NFS (only tested with HCU4). + + Signed-off-by: Niklaus Giger + Signed-off-by: Stefan Roese + +commit c9c11d751e4242cf29c3c3c290d971f6d0cb1d15 +Author: Adam Graham +Date: Wed Oct 8 10:13:19 2008 -0700 + + ppc4xx: Add routine to retrieve CPU number + + Provide a weak defined routine to retrieve the CPU number for + reference boards that have multiple CPU's. Default behavior + is the existing single CPU print output. Reference boards with + multiple CPU's need to provide a board specific routine. + See board/amcc/arches/arches.c for an example. + + Signed-off-by: Adam Graham + Signed-off-by: Victor Gallardo + Signed-off-by: Stefan Roese + +commit 59217bae40e90982ab5400d849c08af683ace036 +Author: Adam Graham +Date: Wed Oct 8 10:13:14 2008 -0700 + + ppc4xx: Add static support for 44x IBM SDRAM Controller + + This patch add the capability to configure a PPC440 based IBM SDRAM + Controller with static, compiled-in, values. PPC440 memory subsystem + includes a Memory Queue core. + + Signed-off-by: Adam Graham + Signed-off-by: Victor Gallardo + Signed-off-by: Stefan Roese + +commit f09f09d3899017aaaa2b031bba63c271e9c48e4d +Author: Adam Graham +Date: Wed Oct 8 10:12:53 2008 -0700 + + ppc4xx: Add AMCC Arches board support (dual 460GT) + + The Arches Evaluation board is based on the AMCC 460GT SoC chip. + This board is a dual processor board with each processor providing + independent resources for Rapid IO, Gigabit Ethernet, and serial + communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR + FLASH, UART, EEPROM and temperature sensor, along with a shared debug + port. The two 460GT's will communicate with each other via shared + memory, Gigabit Ethernet and x1 PCI-Express. + + Signed-off-by: Adam Graham + Signed-off-by: Victor Gallardo + Signed-off-by: Stefan Roese + +commit 055b12f2ffd7c34eea7e983a0588b24f2e69e0e3 +Author: Wolfgang Denk +Date: Sun Oct 19 21:54:30 2008 +0200 + + TQM8260: environment in flash instead EEPROM, baudrate 115k + + Several customers have reported problems with the environment in + EEPROM, including corrupted content after board reset. Probably the + code to prevent I2C Enge Conditions is not working sufficiently. + + We move the environment to flash now, which allows to have a backup + copy plus gives much faster boot times. + + Also, change the default console initialization to 115200 bps as used + on most other boards. + + Signed-off-by: Wolfgang Denk + +commit 1836881190b3d8a6918b0d64b39fe32bbbdf85d8 +Author: Kumar Gala +Date: Sun Oct 19 12:49:19 2008 -0500 + + 85xx: Fix compile warning in mpc8536ds.c + + mpc8536ds.c: In function 'is_sata_supported': + mpc8536ds.c:615: warning: unused variable 'devdisr' + + Signed-off-by: Kumar Gala + +commit 8ed44d91c8122d00368523b0b746691c895d3b3c +Author: Wolfgang Denk +Date: Sun Oct 19 02:35:50 2008 +0200 + + Cleanup: fix "MHz" spelling + + Signed-off-by: Wolfgang Denk + +commit 08ef89ecd174969b3544f3f0c7cd1de3c57f737b +Author: Wolfgang Denk +Date: Sun Oct 19 02:35:49 2008 +0200 + + Use strmhz() to format clock frequencies + + Signed-off-by: Wolfgang Denk + +commit d50c7d4be150b2252c0d2e16cfcf69643bdd6dc9 +Author: Wolfgang Denk +Date: Sun Oct 19 02:35:48 2008 +0200 + + strmhz(): Round numbers when printing clock frequencies + + Round clock frequencies for printing. + + Many boards printed off clock frequencies like 399 MHz instead of the + exact 400 MHz because numberes were not rounded. This is fixed now. + + Signed-off-by: Wolfgang Denk + +commit 681c02d05b29c6d46093525052c74b9c4ddc8b08 +Author: Timur Tabi +Date: Mon Oct 20 15:16:47 2008 -0500 + + 85xx: properly document MPC85xx_PORDEVSR2_SEC_CFG + + Commit f7d190b1 corrected the value of MPC85xx_PORDEVSR2_SEC_CFG, but forgot + to add a comment that the correct value disagrees with the 8544 reference + manual. The changelog for that commit is also wrong, as it says "bit 28" + when it should be "bit 24". + + Signed-off-by: Timur Tabi + +commit 360fe71e82b83e264c964c9447c537e9a1f643c8 +Author: Heiko Schocher +Date: Fri Oct 17 18:24:06 2008 +0200 + + mgcoge: add redundant environment sector + + Signed-off-by: Heiko Schocher + +commit 53ebf0c470c87d5f9fa76462e5f4064d26a9b16a +Author: Heiko Schocher +Date: Fri Oct 17 18:23:27 2008 +0200 + + mgsuvd: update size of environment + + Signed-off-by: Heiko Schocher + +commit 2e26d837f11460c0e6dede7d65424a31e0183d09 +Author: Jason Jin +Date: Fri Oct 10 11:41:00 2008 +0800 + + Enabled the Freescale SGMII riser card on 8536DS + + Signed-off-by: Jason Jin + +commit 7e183cad0c5ab6415dca95d6ac290ea918b28c55 +Author: Liu Yu +Date: Fri Oct 10 11:40:59 2008 +0800 + + Enabled the Freescale SGMII riser card on 8572DS + + This patch based on Andy's work. + Including command 'pixis_set_sgmii' support. + + Signed-off-by: Liu Yu + +commit bff188baf9427c35745356439435acf3864d4c65 +Author: Liu Yu +Date: Fri Oct 10 11:40:58 2008 +0800 + + Make pixis_set_sgmii more general to support MPC85xx boards. + + The pixis sgmii command depend on the FPGA support on the board, some 85xx + boards support SGMII riser card but did not support this command, define + CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command. + + Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits + are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and + PIXIS_VCFGEN1_MASK in header file for both boards. + + Signed-off-by: Liu Yu + +commit 5e981d683d2363204c76773941c2e9c2044c808f +Author: Ed Swarthout +Date: Wed Oct 8 23:38:02 2008 -0500 + + Add cpu/8xxx to TAGS_SUBDIRS + + Signed-off-by: Ed Swarthout + +commit e1f7d22b8b52fc08c4d17a6a7db1e664281aed63 +Author: Ed Swarthout +Date: Thu Oct 9 01:25:55 2008 -0500 + + fsl_law clear enable before changing. + + Debug sessions may have left enabled laws. + Changing lawbar with an unkown enabled tgtid could cause problems. + + Signed-off-by: Ed Swarthout + +commit 86be510f7b5443e7e937f696bfbe037fdc740b15 +Author: Ed Swarthout +Date: Thu Oct 9 00:29:27 2008 -0500 + + mpc8572 additional end-point mode + + mpc8572 supports all pcie controllers as end-points with cfg_host_agent=0. + Include host_agent == 0 decode for end-point determination. + + This is not needed for the ds reference board since pcie3 will be a host + in order to connect to the uli chip. Include it here as a reference for + other mpc8572 boards. + + Signed-off-by: Ed Swarthout + +commit 6856b3d0221a838580e6bb06f61425fd7529ba93 +Author: Ed Swarthout +Date: Wed Oct 8 23:37:59 2008 -0500 + + 85xx if NUM_CPUS>1, print cpu number + + Signed-off-by: Ed Swarthout + +commit f7fecc3e25050a036c9f50f0d2b85bc3199a96e0 +Author: Ed Swarthout +Date: Wed Oct 8 23:38:01 2008 -0500 + + pixis do not print long help if not configured + + Signed-off-by: Ed Swarthout + +commit 0e17f02a8a78d85225a4d805f6a1ea95a0a460b5 +Author: Andy Fleming +Date: Tue Oct 7 08:09:50 2008 -0500 + + Have u-boot pass stashing parameters into device tree + + Some cores don't support ethernet stashing at all, and some + instances have errata. Adds 3 properties to gianfar nodes + which support stashing. For now, just add this support to + 85xx SoCs. + + Signed-off-by: Andy Fleming + +commit c21617fd265b7c126c6e2f2d8a23cdb00d4fade7 +Author: Haiying Wang +Date: Fri Oct 3 12:37:57 2008 -0400 + + Add DDR options setting on MPC8641HPCN board + + * Add board specific parameter table to choose correct cpo, clk_adjust, + write_data_delay based on board ddr frequency and n_ranks. + + * Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#. + + Signed-off-by: James Yang + Signed-off-by: Haiying Wang + +commit 4ca06607d60d0a6378812ef58fd1eab2a7f77111 +Author: Haiying Wang +Date: Fri Oct 3 12:37:41 2008 -0400 + + Add ddr interleaving suppport for MPC8572DS board + + * Add board specific parameter table to choose correct cpo, clk_adjust, + write_data_delay, 2T based on board ddr frequency and n_ranks. + + * Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#. + + * Set memory controller interleaving mode to bank interleaving, and disable + bank(chip select) interleaving mode by default, because the default on-board + DDR DIMMs are 2x512MB single-rank. + + * Change CONFIG_ICS307_REFCLK_HZ from 33333333 to 33333000. + + Signed-off-by: James Yang + Signed-off-by: Haiying Wang + +commit 1f293b417ac6ab8e317ca2b770377ca93edf2370 +Author: Haiying Wang +Date: Fri Oct 3 12:37:26 2008 -0400 + + Add debug information for DDR controller registers + + Signed-off-by: Haiying Wang + +commit c9ffd839b1ada502c86f88edaf1534426b6688ce +Author: Haiying Wang +Date: Fri Oct 3 12:37:10 2008 -0400 + + Check DDR interleaving mode + + * Check DDR interleaving mode from environment by reading memctl_intlv_ctl and + ba_intlv_ctl. + * Print DDR interleaving mode information + * Add doc/README.fsl-ddr to describe the interleaving setting + + Signed-off-by: Haiying Wang + +commit dfb49108e4f86c2224e1f30124328b0de66ef72e +Author: Haiying Wang +Date: Fri Oct 3 12:36:55 2008 -0400 + + Pass dimm parameters to populate populate controller options + + Because some dimm parameters like n_ranks needs to be used with the board + frequency to choose the board parameters like clk_adjust etc. in the + board_specific_paramesters table of the board ddr file, we need to pass + the dimm parameters to the board file. + + * move ddr dimm parameters header file from /cpu to /include directory. + * add ddr dimm parameters to populate board specific options. + * Fix fsl_ddr_board_options() for all the 8xxx boards which call this function. + + Signed-off-by: Haiying Wang + +commit dbbbb3abeff325855cae76e33d69d5665631443f +Author: Haiying Wang +Date: Fri Oct 3 12:36:39 2008 -0400 + + Make DDR interleaving mode work correctly + + Fix some bugs: + 1. Correctly set intlv_ctl in cs_config. + 2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled. + 3. Set base_address and total memory for each ddr controller in memory + controller interleaving mode. + + Signed-off-by: Haiying Wang + +commit 1c9aa76bf9013069e24258f46f4687c9f98a02d6 +Author: Kumar Gala +Date: Mon Sep 22 23:40:42 2008 -0500 + + 85xx: Enable interrupt and setexpr commands on Freescale 85xx boards + + Signed-off-by: Kumar Gala + +commit 7c0d4a7508d252d2d7c137eeb376814132dda30f +Author: Kumar Gala +Date: Mon Sep 22 14:11:11 2008 -0500 + + 85xx: Improve flash remapping on MPC8572DS & MPC8536DS + + Changing the flash from cacheable to cache-inhibited was taking a significant + amount of time due to the fact that we were iterating over the full 256M of + flash. Instead we can just flush the L1 d-cache and invalidate the i-cache. + + Signed-off-by: Kumar Gala + +commit 54e091d3b603a3332c619199ca83a07e95960da4 +Author: Kumar Gala +Date: Mon Sep 22 14:11:10 2008 -0500 + + 85xx: Export invalidate_{i,d}cache and add flush_dcache + + Added the ability for C code to invalidate the i/d-cache's and + to flush the d-cache. This allows us to more efficient change mappings + from cache-able to cache-inhibited. + + Signed-off-by: Kumar Gala + +commit 6250f0f6297c5ba9aecdea6290799a95c5d4b1da +Author: Heiko Schocher +Date: Fri Oct 17 16:11:52 2008 +0200 + + mgcoge, mgsuvd: extract more common code + + in ft_blob_update () for both boards was an unneccessary + repetition of code, which this patch moves in a common + function for this boards. + + Signed-off-by: Heiko Schocher + +commit 9e299192ca9850cf725456388042a5aa5a6f3ec7 +Author: Heiko Schocher +Date: Fri Oct 17 12:15:55 2008 +0200 + + mgcoge, mgsuvd: use in_*/out_* accesors + + Signed-off-by: Heiko Schocher + +commit a21ca95f8b9dca22714952b348e4905ac157b5cd +Author: Heiko Schocher +Date: Fri Oct 17 13:52:51 2008 +0200 + + mgsuvd: fix compiler warning when using soft_i2c driver + + Signed-off-by: Heiko Schocher + +commit cac9cf7875c2a01d63422820ed4732a9bdf5ab7b +Author: Heiko Schocher +Date: Fri Oct 17 12:15:05 2008 +0200 + + mgsuvd: fix coding style + + Signed-off-by: Heiko Schocher + +commit 5f4c3137f4f051787707c548133823f1656eb508 +Author: Heiko Schocher +Date: Fri Oct 17 12:13:30 2008 +0200 + + mgcoge: Second Flash on CS5 not on CS1 + + Signed-off-by: Heiko Schocher + +commit 76da19df5b8e186d269f29190696bd31fb6c836b +Author: Kumar Gala +Date: Thu Oct 16 21:52:08 2008 -0500 + + Added arch_lmb_reserve to allow arch specific memory regions protection + + Each architecture has different ways of determine what regions of memory + might not be valid to get overwritten when we boot. This provides a + hook to allow them to reserve any regions they care about. Currently + only ppc, m68k and sparc need/use this. + + Signed-off-by: Kumar Gala + +commit e02d4a9904c8f36395994c0c81469d552b82f5ea +Author: Heiko Schocher +Date: Thu Oct 16 16:32:35 2008 +0200 + + mgcoge: added CONFIG_FIT to support the new u-boot image format + + Signed-off-by: Heiko Schocher + +commit 6d0f6bcf337c5261c08fabe12982178c2c489d76 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Thu Oct 16 15:01:15 2008 +0200 + + rename CFG_ macros to CONFIG_SYS + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 71edc271816ec82cf0550dd6980be2da3cc2ad9e +Author: Kumar Gala +Date: Mon Oct 13 14:12:55 2008 -0500 + + 74xx/7xx/86xx: Rename flush_data_cache to flush_dcache to match 85xx version + + Signed-off-by: Kumar Gala + +commit b799cb4c0eebb0762e91e9653d8b9cc9a98440e3 +Author: Kumar Gala +Date: Tue Sep 23 10:05:02 2008 -0500 + + Expose command table search for sub-commands + + Sub-command can benefit from using the same table and search functions + that top level commands have. Expose this functionality by refactoring + find_cmd() and introducing find_cmd_tbl() that sub-command processing + can call. + + Signed-off-by: Kumar Gala + +commit f7e51b27508446f8cae3927975817137979ad5e8 +Author: Heiko Schocher +Date: Wed Oct 15 09:41:33 2008 +0200 + + mgsuvd, mgcoge: added BOOTCOUNT feature. + + Signed-off-by: Heiko Schocher + +commit 8f64da7f83b553889bc08400c97047998382e9d2 +Author: Heiko Schocher +Date: Wed Oct 15 09:41:00 2008 +0200 + + mgcoge, mgsuvd: added support for the IVM EEprom. + + The EEprom contains some Manufacturerinformation, + which are read from u-boot at boot time, and saved + in same hush shell variables. + + Signed-off-by: Heiko Schocher + +commit 81473f67810c4c9b7efaed8dee258ed6bc4c7983 +Author: Heiko Schocher +Date: Wed Oct 15 09:40:28 2008 +0200 + + hush: add showvar command for hush shell. + + This new command shows the local variables defined in + the hush shell: + + => help showvar + showvar + - print values of all hushshell variables + showvar name ... + - print value of hushshell variable 'name' + + Also make the set_local_var() and unset_local_var () + no longer static, so it is possible to define local + hush shell variables at boot time. If CONFIG_HUSH_INIT_VAR + is defined, u-boot calls hush_init_var (), where + boardspecific code can define local hush shell + variables at boottime. + + Signed-off-by: Heiko Schocher + +commit 67b23a322848d828a5e45c0567b72762bfde7abf +Author: Heiko Schocher +Date: Wed Oct 15 09:39:47 2008 +0200 + + I2C: adding new "i2c bus" Command to the I2C Subsystem. + + With this Command it is possible to add new I2C Busses, + which are behind 1 .. n I2C Muxes. Details see README. + + Signed-off-by: Heiko Schocher + +commit c24853644ddd2dd2e4246b5854a93e6254a14092 +Author: Heiko Schocher +Date: Wed Oct 15 09:39:08 2008 +0200 + + mgcoge, mgsuvd: add board specific I2C deblocking mechanism. + + As documented in doc/I2C_Edge_Conditions, adding a + board specific deblocking mechanism via CFG_I2C_INIT_BOARD + for the mgcoge and mgsuvd board. + + This code was originally written by Keymile in association + with Anatech and Atmel in 1998. The Code toggels the SCL + until the SCA line goes to HIGH (max. 16 times). + And after this, a start condition is sent. + + This is another approach to deblock the I2C Bus. The + soft I2C driver actually sends 9 clocks with SDA High, + and then a stop at the end, to deblock the I2C Bus. + + Maybe we should use the approach from Keymile as + the new standard? + + Signed-off-by: Heiko Schocher + +commit 4ca107effebfbabac1057c39632105dacef95957 +Author: Heiko Schocher +Date: Wed Oct 15 09:38:38 2008 +0200 + + soft_i2c: Add CFG_I2C_INIT_BOARD option + + This patch adds the option for a boardspecific + I2C deblocking mechanism for the soft i2c driver. + + Signed-off-by: Heiko Schocher + +commit e5e4edd9f1f76210a09c34ee835f6cff60fdbbd1 +Author: Heiko Schocher +Date: Wed Oct 15 09:38:07 2008 +0200 + + mgcoge, mgsuvd: add DTT (LM75) support. + + Signed-off-by: Heiko Schocher + +commit 8e442df438ab677057571e3ac01846bff7719bce +Author: Heiko Schocher +Date: Wed Oct 15 09:37:34 2008 +0200 + + lm75: Make the LM75 MULTI_BUS compatible. + + Signed-off-by: Heiko Schocher + +commit 12f1678127c1df2b2878ba93c88948bedc060775 +Author: Heiko Schocher +Date: Wed Oct 15 09:37:04 2008 +0200 + + lm75: fix Codingstyle issues. + + Signed-off-by: Heiko Schocher + +commit f2202450c75ba6934b356024101500ddcde6e2a6 +Author: Heiko Schocher +Date: Wed Oct 15 09:36:33 2008 +0200 + + mgcoge, mgsuvd: added EEprom support. + + Signed-off-by: Heiko Schocher + +commit 9661bf9d120f760238b2a073b84f2baf05010057 +Author: Heiko Schocher +Date: Wed Oct 15 09:36:03 2008 +0200 + + mgcoge, mgsuvd: add I2C support. + + Signed-off-by: Heiko Schocher + +commit 98aed379586a155292efbf3209356836584b601c +Author: Heiko Schocher +Date: Wed Oct 15 09:35:26 2008 +0200 + + soft_i2c: prevent compiler warnings if driver does not use CPU Pins. + + This patch fixes the following warnings, when using + the soft_i2c driver using no CPU pins on MPC82xx or MPC8xx + systems: + + soft_i2c.c: In function 'send_reset': + soft_i2c.c:93: warning: unused variable 'immr' + soft_i2c.c: In function 'send_start': + soft_i2c.c:124: warning: unused variable 'immr' + soft_i2c.c: In function 'send_stop': + soft_i2c.c:146: warning: unused variable 'immr' + soft_i2c.c: In function 'send_ack': + soft_i2c.c:171: warning: unused variable 'immr' + soft_i2c.c: In function 'write_byte': + soft_i2c.c:196: warning: unused variable 'immr' + soft_i2c.c: In function 'read_byte': + soft_i2c.c:244: warning: unused variable 'immr' + + Signed-off-by: Heiko Schocher + +commit 799b784aa00cb03a352847ab9f9acdde79b72d21 +Author: Heiko Schocher +Date: Wed Oct 15 09:34:45 2008 +0200 + + i2c: add CONFIG_I2C_MULTI_BUS for soft_i2c and mpc8260 i2c driver. + + Signed-off-by: Heiko Schocher + +commit 0809ea2f4340ab2047400c7d3d3047f97987d0fd +Author: Heiko Schocher +Date: Wed Oct 15 09:34:05 2008 +0200 + + mgcoge: fix Coding Style issues. + + Signed-off-by: Heiko Schocher + +commit e43a27c49712203fe8848a17714330623edfb2eb +Author: Heiko Schocher +Date: Wed Oct 15 09:33:30 2008 +0200 + + I2C: add new command i2c reset. + + If I2C Bus is blocked (see doc/I2C_Edge_Conditions), + it is not possible to get out of this, until the + complete Hardware gets a reset. This new commando + calls again i2c_init (and that calls i2c_init_board + if defined), which will deblock the I2C Bus. + + Signed-off-by: Heiko Schocher + Signed-off-by: Wolfgang Denk + +commit 86e9cdf8c415c1a9725e9dae5237ba1e7bd9f686 +Author: Heiko Schocher +Date: Wed Oct 15 09:32:25 2008 +0200 + + mgsuvd, mgcoge: move this 2 boards in one dir. + + There are some more extensions, which are for both boards + and some more boards from this manufacturer will follow soon. + + Signed-off-by: Heiko Schocher + Signed-off-by: Wolfgang Denk + +commit 1c6fe6eac75d695fde677af8330c0dbe75fb6a2b +Author: Dirk Eibach +Date: Wed Oct 8 13:44:27 2008 +0200 + + hwmon: Add LM63 support + + This patch adds support for the National LM63 temperature + sensor with integrated fan control. It's used on the GDSys + Neo board (405EP) which will be submitted later. + + Signed-off-by: Dirk Eibach + Acked-by: Stefan Roese + +commit 7ba890bf2f2b92831420243c058951aa831119fd +Author: Kyungmin Park +Date: Wed Oct 8 11:01:17 2008 +0900 + + Add Red Black Tree support + + Now it's used at UBI module. Of course other modules can use it. + If you want to use it, please define CONFIG_RBTREE + + Signed-off-by: Kyungmin Park + +commit fbd85ad65dd9c98f36ed3fb12fe41f381b7d4794 +Author: richardretanubun +Date: Mon Oct 6 16:10:53 2008 -0400 + + CONFIG_EFI_PARTITION: Added support for EFI partition in cmd_ext2fs.c + + Added support for CONFIG_EFI_PARTITION to ext2 commands. + Signed-off-by: Richard Retanubun + +commit 07f3d789b9beb7ce3278c974f4d5c8f51b6ab567 +Author: richardretanubun +Date: Fri Sep 26 11:13:22 2008 -0400 + + Add support for CONFIG_EFI_PARTITION (GUID Partition Table) + + The GUID (Globally Unique Identifier) Partition Table (GPT) is a part + of EFI. See http://en.wikipedia.org/wiki/GUID_Partition_Table + + Based on linux/fs/partitions/efi.[ch] + + Signed-off-by: Richard Retanubun + +commit fbc87dc0546dff709b38f358e2c5d5e39c4ca374 +Author: Bartlomiej Sieka +Date: Wed Oct 1 15:26:32 2008 +0200 + + FIT: output image load address for type 'firmware', fix message while there + + Now that the auto-update feature uses the 'firmware' type for updates, it is + useful to inspect the load address of such images. + + Signed-off-by: Bartlomiej Sieka + +commit 4bae90904b69ce3deb9f7c334ef12ed74e18a275 +Author: Bartlomiej Sieka +Date: Wed Oct 1 15:26:31 2008 +0200 + + Automatic software update from TFTP server + + The auto-update feature allows to automatically download software updates + from a TFTP server and store them in Flash memory during boot. Updates are + contained in a FIT file and protected with SHA-1 checksum. + + More detailed description can be found in doc/README.update. + + Signed-off-by: Rafal Czubak + Signed-off-by: Bartlomiej Sieka + +commit 3f0cf51dabacc2724731c5079a60ea989103bb8f +Author: Bartlomiej Sieka +Date: Wed Oct 1 15:26:27 2008 +0200 + + flash: factor out adjusting of Flash address to the end of sector + + The upcoming automatic update feature needs the ability to adjust an + address within Flash to the end of its respective sector. Factor out + this functionality to a new function flash_sect_roundb(). + + Signed-off-by: Rafal Czubak + Signed-off-by: Bartlomiej Sieka + Signed-off-by: Stefan Roese + +commit e83cc06375ac2bea0830c6ed0f9d8fdc3c1b27d5 +Author: Bartlomiej Sieka +Date: Wed Oct 1 15:26:29 2008 +0200 + + net: Make TFTP server timeout configurable + + There are two aspects of a TFTP transfer involving timeouts: + 1. timeout waiting for initial server reply after sending RRQ + 2. timeouts while transferring actual data from the server + + Since the upcoming auto-update feature attempts a TFTP download during each + boot, it is undesirable to have a long delay when the TFTP server is not + available. Thus, this commit makes the server timeout (1.) configurable by two + global variables: + + TftpRRQTimeoutMSecs + TftpRRQTimeoutCountMax + + TftpRRQTimeoutMSecs overrides default timeout when trying to connect to a TFTP + server, TftpRRQTimeoutCountMax overrides default number of connection retries. + The total delay when trying to download a file from a non-existing TFTP server + is TftpRRQTimeoutMSecs x TftpRRQTimeoutCountMax milliseconds. + + Timeouts during file transfers (2.) are unaffected. + + Signed-off-by: Rafal Czubak + Signed-off-by: Bartlomiej Sieka + Signed-off-by: Ben Warren + +commit 49f3bdbba8071f56d950a9498b6cdb998b35340a +Author: Bartlomiej Sieka +Date: Wed Oct 1 15:26:28 2008 +0200 + + net: express the first argument to NetSetTimeout() in milliseconds + + Enforce millisecond semantics of the first argument to NetSetTimeout() -- + the change is transparent for well-behaving boards (CFG_HZ == 1000 and + get_timer() countiing in milliseconds). + + Rationale for this patch is to enable millisecond granularity for + network-related timeouts, which is needed for the upcoming automatic + software update feature. + + Summary of changes: + - do not scale the first argument to NetSetTimeout() by CFG_HZ + - change timeout values used in the networking code to milliseconds + + Signed-off-by: Rafal Czubak + Signed-off-by: Bartlomiej Sieka + Signed-off-by: Ben Warren + +commit c68a05feeb88de9fcf158e67ff6423c4cc988f88 +Author: richardretanubun +Date: Mon Sep 29 18:28:23 2008 -0400 + + Adds two more ethernet interface to 83xx + + Added as a convenience for other platforms that uses MPC8360 (has 8 UCC). + Six eth interface is chosen because the platform I am using combines + UCC1&2 and UCC3&4 as 1000 Eth and the other four UCCs as 10/100 Eth. + + Signed-off-by: Richard Retanubun + Signed-off-by: Ben Warren + +commit 41410eee472b0f42e03a77f961bbc55ef58f3c01 +Author: Haiying Wang +Date: Wed Sep 24 11:42:12 2008 -0500 + + Change UEC PHY interface to RGMII on MPC8568MDS + + Change UEC phy interface from GMII to RGMII on MPC8568MDS board + + Because on MPC8568MDS, GMII interface is only recommended for 1000Mbps speed, + but RGMII interface can work at 10/100/1000Mbps, and RGMII interface works more stable. + + Now both UEC1 and UEC2 can work properly under u-boot. + + It is also in consistent with the kernel setting for 8568 UEC phy interface. + + Signed-off-by: Haiying Wang + Signed-off-by: Ben Warren + +commit b59b16ca24bc7e77ec113021a6d77b9b32fcf192 +Author: Wolfgang Denk +Date: Sat Oct 18 21:30:31 2008 +0200 + + Prepare v2008.10 release: update CHANGELOG & Makefile + + Signed-off-by: Wolfgang Denk + +commit f7a35a60cf45491871a5c28e9ad24db005487857 +Author: Heiko Schocher +Date: Fri Oct 17 18:24:06 2008 +0200 + + mgcoge: add redundant environment sector + + Signed-off-by: Heiko Schocher + Signed-off-by: Wolfgang Denk + +commit c2537ee85954af9d036b18b644f3e18d837bf4a5 +Author: Heiko Schocher +Date: Fri Oct 17 18:23:27 2008 +0200 + + mgsuvd: update size of environment + + Signed-off-by: Heiko Schocher + +commit fa7b1c07e9371aea8f87ee6d3c2ea5564bd8cc8d +Author: Lepcha Suchit +Date: Thu Oct 16 13:38:00 2008 -0500 + + 83xx NAND boot: wait for LTESR[CC] + + At least some revisions of the 8313, and possibly other chips, do not + wait for all pages of the initial 4K NAND region to be loaded before + beginning execution; thus, we wait for it before branching out of the + first NAND page. + + This fixes warm reset problems when booting from NAND on 8313erdb. + + Signed-off-by: Scott Wood + Acked-by: Kim Phillips + +commit bf29e0ea0af03d593c64614136acc723a7a022a2 +Author: Yuri Tikhonov +Date: Fri Oct 17 12:54:18 2008 +0200 + + ppc4xx: PPC44x MQ initialization + + Set the MQ Read Passing & MCIF Cycle limits to the recommended by AMCC + values. This fixes the occasional 440SPe hard locking issues when the 440SPe's + dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver). + + Previously the appropriate initialization had been made in Linux, by the + ppc440spe ADMA driver, which is wrong because modifying the MQ configuration + registers after normal operation has begun is not supported and could + have unpredictable results. + + Comment from Stefan: This patch doesn't change the resulting value of the + MQ registers. It explicitly sets/clears all bits to the desired state which + better documents the resulting register value instead of relying on pre-set + default values. + + Signed-off-by: Yuri Tikhonov + Signed-off-by: Stefan Roese + +commit ec081c2c190148b374e86a795fb6b1c49caeb549 +Author: Stefan Roese +Date: Fri Oct 17 12:51:46 2008 +0200 + + ppc4xx: PPC44x MQ initialization + + Set the MQ Read Passing & MCIF Cycle limits to the recommended by AMCC + values. This fixes the occasional 440SPe hard locking issues when the 440SPe's + dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver). + + Previously the appropriate initialization had been made in Linux, by the + ppc440spe ADMA driver, which is wrong because modifying the MQ configuration + registers after normal operation has begun is not supported and could + have unpredictable results. + + Comment from Stefan: This patch doesn't change the resulting value of the + MQ registers. It explicitly sets/clears all bits to the desired state which + better documents the resulting register value instead of relying on pre-set + default values. + + Signed-off-by: Yuri Tikhonov + Signed-off-by: Stefan Roese + +commit f7d190b1c0b3ab7fc53074ad2862f7de99de37ff +Author: Kumar Gala +Date: Thu Oct 16 21:58:50 2008 -0500 + + 85xx: Using proper I2C source clock divider for MPC8544 + + The MPC8544 RM incorrect shows the SEC_CFG bit in PORDEVSR2 as being + bit 26, instead it should be bit 28. This caused in incorrect + interpretation of the i2c_clk which is the same as the SEC clk on + MPC8544. The SEC clk is controlled by cfg_sec_freq that is reported + in PORDEVSR2. + + Signed-off-by: Kumar Gala + +commit 42653b826adb319a1df06e24ef26096b2a5d9d2a +Author: Kumar Gala +Date: Thu Oct 16 21:58:49 2008 -0500 + + Revert "85xx: Using proper I2C source clock divider for MPC8544" + + This reverts commit dffd2446fb041f38ef034b0fcf41e51e5e489159. + + The fix introduced by this patch is not correct. The problem is + that the documentation is not correct for the MPC8544 with regards + to which bit in PORDEVSR2 is for the SEC_CFG. + + Signed-off-by: Kumar Gala + +commit 2179c4766bffeece98e5e92040629a96c97e230c +Author: Kumar Gala +Date: Wed Oct 15 10:19:41 2008 -0500 + + 85xx: Fix compile warning + + mpc8536ds.c: In function 'is_sata_supported': + mpc8536ds.c:614: warning: unused variable 'devdisr' + + Signed-off-by: Kumar Gala + +commit 9029b68f3f81b3013044f167ea025e836e6c8c0e +Author: Jason Jin +Date: Wed Oct 15 10:40:24 2008 +0800 + + Fix the function conflict in x86emu when DEBUG is on + + The function parse_line() in common/main.c was exposed globally by commit + 6636b62a6efc7f14e6e788788631ae7a7fca4537, Result in conflict with the same + name funciton in drivers/bios_emulator/x86emu/debug.c when define the DEBUG. + This patch fix this by renaming the function in the debug.c file. + + Signed-off-by: Jason Jin + +commit b4dbacf69a669a17487054552fc2761149dd6767 +Author: Wolfgang Denk +Date: Wed Oct 15 15:50:45 2008 +0200 + + Coding Style cleanup, update CHANGELOG, prepare 2008.10-rc3 + + Signed-off-by: Wolfgang Denk + +commit 374b9038293d01d8744a46af9b7854a6fd99b228 +Author: Heiko Schocher +Date: Wed Oct 15 09:51:19 2008 +0200 + + Fix compiler warning in lib_ppc/board.c + + Fix compiler warning introduced by commit 0f8cbc18 + + Signed-off-by: Heiko Schocher + Signed-off-by: Wolfgang Denk + +commit 9724555755a6f1066636481b41f7094e0ce93a69 +Author: Selvamuthukumar +Date: Thu Oct 9 10:29:14 2008 +0530 + + mpc83xx: wait till UPM completes the write to array + + Reference manual states that MxMR[MAD] increment is the indication + of write to UPM array is complete. Honour that. Also, make the dummy + write explicit. + + also fix the comment. + + Signed-off-by: Selvamuthukumar + Signed-off-by: Kim Phillips + +commit 03e2dbb18e858e2f7a6aaa437f290f3690d02d51 +Author: Selvamuthukumar +Date: Wed Oct 8 18:12:20 2008 -0500 + + Remove unwanted ';' at end of define. + + Currently this is not creating any problem. But it will result + in compilation error when used as below. + + printf("CFG_SDRAM_CFG2 - %08x\n", CFG_SDRAM_CFG2); + + Signed-off-by: Selvamuthukumar + + continuation of the theme based on git grep "^#define CFG_.*;$" include/ + + Signed-off-by: Kim Phillips + +commit b2934a56650e9a6c54432f9ce6dc36757967385e +Author: Hugo Villeneuve +Date: Mon Oct 6 10:53:59 2008 -0400 + + ARM DaVinci: Add maintainer information for SFFSDR board. + + Signed-off-by: Hugo Villeneuve + +commit 12c6670f873ed632c264a6f3e8bf1297d5c3ddbc +Author: Matthias Fuchs +Date: Sat Oct 4 19:26:16 2008 +0200 + + api: fix type mismatch + + This patch fixes a type mismatch and thus removes a compiler + warning when compiling with CONFIG_API on powerpc. + + Signed-off-by: Matthias Fuchs + +commit 9bc2e4eee3bcb8e63847d7a733e0c607807d6141 +Author: Peter Tyser +Date: Wed Oct 1 12:25:04 2008 -0500 + + cmd_i2c: Fix help for CONFIG_I2C_CMD_TREE && !CONFIG_I2C_MULTI_BUS + + Original code displayed: + => help i2c + i2c i2c speed [speed] - show or set I2C bus speed + i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device + ... + + Signed-off-by: Peter Tyser + +commit a0b1b610e980e253d4c2519ee15bd0937c3f8be1 +Author: Wolfgang Denk +Date: Tue Oct 14 22:13:41 2008 +0200 + + Update CHANGELOG + + Signed-off-by: Wolfgang Denk + +commit 0f8cbc1829d9c7d9616fd29b366a99d037facdcd +Author: Jason Jin +Date: Fri Oct 10 11:41:01 2008 +0800 + + Do not init SATA when disabled on 8536DS. + + SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the + driver still try to access the SATA registers, the cpu will hangup. + This patch try to fix this by reading the serdes status before the SATA + initialize. + + Signed-off-by: Jason Jin + Acked-by: Andy Fleming + +commit 9dbc366744960013965fce8851035b6141f3b3ae +Author: Remy Bohmer +Date: Fri Oct 10 10:23:22 2008 +0200 + + The PIPE_INTERRUPT flag is used wrong + + At a lot of places in the code the PIPE_INTERRUPT flags and friends + are used wrong. The wrong bits are compared to this flag resulting + in wrong conditions. Also there are macros that should be used for + PIPE_* flags. + This patch tries to fix them all, however, I was not able to test the + changes, because I do not have any of these boards. + + Review required! + + Signed-off-by: Remy Bohmer + Signed-off-by: Markus Klotzbuecher + +commit 48867208444cb2a82e2af9c3249e90b7ed4a1751 +Author: Remy Bohmer +Date: Fri Oct 10 10:23:21 2008 +0200 + + fix USB initialisation procedure + + The max packet size is encoded as 0,1,2,3 for 8,16,32,64 bytes. + At some places directly 8,16,32,64 was used instead of the encoded + value. Made a enum for the options to make this more clear and to help + preventing similar errors in the future. + + After fixing this bug it became clear that another bug existed where + the 'pipe' is and-ed with PIPE_* flags, where it should have been + 'usb_pipetype(pipe)', or even better usb_pipeint(pipe). + + Also removed the triple 'get_device_descriptor' sequence, it has no use, + and Windows nor Linux behaves that way. + There is also a poll going on with a timeout when usb_control_msg() fails. + However, the poll is useless, because the flag will never be set on a error, + because there is no code that runs in a parallel that can set this flag. + Changed this to something more logical. + + Tested on AT91SAM9261ek and compared the flow on the USB bus to what + Linux is doing. There is no difference anymore in the early initialisation + sequence. + + Signed-off-by: Remy Bohmer + Signed-off-by: Markus Klotzbuecher + +commit ec4d8c1c1d94a790c1473ae8aace282b817c3123 +Author: Nikita V. Youshchenko +Date: Fri Oct 3 00:03:55 2008 +0400 + + fsl_diu: fix alignment error that caused malloc corruption + + When aligning malloc()ed screen_base, invalid offset was added. + This not only caused misaligned result (which did not cause hardware + misbehaviour), but - worse - caused screen_base + smem_len to + be out of malloc()ed space, which in turn caused breakage of + futher malloc()/free() operation. + + This patch fixes screen_base alignment. + + Also this patch makes memset() that cleans framebuffer to be executed + on first initialization of diu, not only on re-initialization. It looks + correct to clean the framebuffer instead of displaying random garbage; + I believe that was disabled only because that memset caused breakage + of malloc/free described above - which no longer happens with the fix + described above. + + Signed-off-by: Nikita V. Youshchenko + +commit 3d0ea3110f3431b6c2aee882784f39f97b20bce9 +Author: Matthias Fuchs +Date: Wed Sep 24 10:29:37 2008 +0200 + + api: Fix building with CONFIG_API + + This patch fixes building with CONFIG_API and CONFIG_USB_STORAGE. + + USB_MAX_STOR_DEV is defined in include/usb.h, but + needed in api/api_storage.c. + + Signed-off-by: Matthias Fuchs + +commit abbb90666d5ef2f500ebbedbb80ff60adc56b043 +Author: Peter Tyser +Date: Tue Sep 23 12:39:40 2008 -0500 + + Remove unused CFG_EEPROM_PAGE_WRITE_ENABLE references + + Signed-off-by: Peter Tyser + +commit 81e612014c40c922ec35488d17c504d4e9286f06 +Author: Peter Tyser +Date: Tue Sep 23 12:38:42 2008 -0500 + + Remove CFG_EEPROM_PAGE* dependencies for temperature sensors + + The checks for CFG_EEPROM_PAGE_WRITE_ENABLE and + CFG_EEPROM_PAGE_WRITE_BITS in various temperature + sensor drivers are not necessary + + Signed-off-by: Peter Tyser + +commit c46980f6d2135ade345dadc1fb1f1f4c8bbf255a +Author: Mike Frysinger +Date: Tue Oct 14 07:04:38 2008 -0400 + + cmd_spi: remove broken signed casting for display + + Since we're working with unsigned data, you can't apply a signed pointer + cast and then attempt to print the result. Otherwise you get wrong output + when the sign bit is set like "0xFF" incorrectly extended to "0xFFFFFFFF". + + Signed-off-by: Mike Frysinger + +commit d5fd0b49210c941de8a1fce3947ace92243ab5ca +Author: Mike Frysinger +Date: Tue Oct 14 07:05:24 2008 -0400 + + strings cmd: drop old CONFIG_CFG_STRINGS define + + We don't need CONFIG_CFG_STRINGS anymore now that we have the define + CONFIG_CMD_STRINGS and Makefile control. + + Signed-off-by: Mike Frysinger + +commit fecb5ade3b37f62981f2b05b621005850173aaa9 +Author: Jason Jin +Date: Fri Sep 19 17:32:49 2008 +0800 + + Fix the NAND size overflow issue. + + When the total size of all NAND devices exceeds 4 GiB, the size will + overflow. This patch tries to fix this. + + Note that we still have a problem when a single NAND device is bigger + than 4 GiB: then the overflow would actually happen earlier, i. e. + when storing the size in nand_info[].size, as nand_info[].size is an + "u_int32_t". + + Signed-off-by: Jason Jin + Signed-off-by: Wolfgang Denk + +commit 30f574717277238b9014b8136c90eea77196490f +Author: Louis Su +Date: Wed Jul 9 11:01:37 2008 +0800 + + AX88180: new gigabit network driver + + Signed-off-by: Louis Su + Signed-off-by: Ben Warren + +commit c9d6b6925344740ca1db2f8a6bab7921ff820de3 +Author: Andre Schwarz +Date: Tue Aug 19 16:07:03 2008 +0200 + + enable 10/100M at VSC8601 at tsec driver + + Currently VSC8601 doesn't link with 10/100M partners if the + EEPROM/Strapping is not set up. + Setting the auto-neg register fixes this. + + Signed-off-by: Andre Schwarz + Signed-off-by: Ben Warren + +commit 702c85b0e876d587c11acdbb55738ee52acd54f4 +Author: Nobuhiro Iwamatsu +Date: Tue Sep 30 15:02:53 2008 +0900 + + net: ne2000: Divided a function of NE2000 driver + + get_prom function was used __attriute__ , but it is not enable. + ax88796.o does not do link besides ne2000.o. When ld is carried + out, get_prom function of ax88796.c is ignored. + This problem is a thing by specifications of ld. + I checked and test this patch on SuperH and MIPS. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Ben Warren + +commit 05c7e9070fe4d751e029fd9524bfbbc93cbb1393 +Author: Nobuhiro Iwamatsu +Date: Tue Oct 14 11:10:59 2008 +0900 + + sh: rsk7203: Add smc911x driver support to board config file + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit cae6f909baf86357b3c0bd01acfc414348c4d175 +Author: Nobuhiro Iwamatsu +Date: Thu Oct 9 13:54:33 2008 +0900 + + sh: Fix cannot execute a stand-alone application + + Address calculated in EXPORT_FUNC in SuperH was wrong, I revised it. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit 6df0efd5c86ca1689deeb2738b46b7d83ce228ef +Author: Ed Swarthout +Date: Wed Oct 8 23:38:00 2008 -0500 + + fsl_pci_init do not scan bus when configured as an end-point + + Signed-off-by: Ed Swarthout + Acked-by: Andy Fleming + +commit 6f099bbac1ba5dfb46ee7ad29dc53713f0501ba5 +Author: Hugo Villeneuve +Date: Tue Sep 16 17:07:53 2008 -0400 + + ARM DaVinci: Remove redundant setting of GD_FLG_RELOC for sffsdr board. + + This is no longer necessary now that the GD_FLG_RELOC flag is set for + all ARM boards. + + Signed-off-by: Hugo Villeneuve + +commit d977a57356657ba241256231efca32828a5822f9 +Author: Luigi 'Comio' Mantellini +Date: Sat Sep 13 10:04:32 2008 +0200 + + Fix lzma uncompress call (image_start wrongly used instead image_len) + + Signed-off-by: Luigi 'Comio' Mantellini + +commit 392438406041415fe64ab8748ec5ab5ad01d1cf7 +Author: Nick Spence +Date: Thu Aug 28 14:09:15 2008 -0700 + + mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache + + This is needed in unlock_ram_in_cache() because it is called from C and + will corrupt the small data area anchor that is kept in R2. + + lock_ram_in_cache() is modified similarly as good coding practice, but + is not called from C. + + Signed-off-by: Nick Spence + +commit 5c7cbcd34d0ee566875a4fd0f2a3e5a62bba921c +Author: Kumar Gala +Date: Tue Aug 19 15:05:34 2008 -0500 + + 86xx: remove redudant code with lib_ppc/interrupts.c + + For some reason we duplicated the majority of code in lib_ppc/interrupts.c + Not know how that happened, but there is no good reason for it. + + Use the interrupt_init_cpu() and timer_interrupt_cpu() since its why + they exist. + + Signed-off-by: Kumar Gala + +commit 0d01f66d235118515b5086b88f82498bc0695d6a +Author: Ed Swarthout +Date: Thu Oct 9 01:26:36 2008 -0500 + + CFI: cfi_flash write fix for AMD legacy + + The flash_unlock_seq requires a sector for AMD_LEGACY. + Fix a retcode check typeo. + + Signed-off-by: Ed Swarthout + Signed-off-by: Stefan Roese + +commit 542b385a620a1783454a00424930e51895f45073 +Author: Matthias Fuchs +Date: Tue Oct 7 13:13:10 2008 +0200 + + ppc4xx: Fix USB 2.0 phy reset sequence + + This patch fixes USB 2.0 communication issues on some DU440 boards. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit df8c1ce11114c2260dedb5547281945f7db8fa5c +Author: Matthias Fuchs +Date: Tue Oct 7 13:13:09 2008 +0200 + + ppc4xx: Add strapping mode for 667MHz CPU frequency on DU440 board + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 6a133d6a00b1fc7b9257cd5925d8cb67f75ecda2 +Author: Matthias Fuchs +Date: Tue Oct 7 13:13:08 2008 +0200 + + ppc4xx: Fix DU440 GPIO configuration + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 35dd025c70fcc4389317db2f2a9d14795172137d +Author: Matthias Fuchs +Date: Tue Oct 7 13:13:07 2008 +0200 + + ppc4xx: Update DU440 config + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit f3bf9273939ffe1a60a32a2eef909097f15df56b +Author: Kumar Gala +Date: Wed Oct 8 15:36:39 2008 -0500 + + MPC8572DS: Fix compile warnings + + Commit 445a7b38308eb05b41de74165b20855db58c7ee5 introduced the following + compile warnings: + + cmd_i2c.c:112: warning: missing braces around initializer + cmd_i2c.c:112: warning: (near initialization for 'i2c_no_probes[0]') + + Signed-off-by: Kumar Gala + +commit dffd2446fb041f38ef034b0fcf41e51e5e489159 +Author: Wolfgang Grandegger +Date: Tue Sep 30 10:55:57 2008 +0200 + + 85xx: Using proper I2C source clock divider for MPC8544 + + Measurements with our MPC8544 board showed that the I2C bus frequency + is wrong by a factor of 1.5. Obviously, the interpretation of the + MPC85xx_PORDEVSR2_SEC_CFG bit of the cfg_sec_freq register is not + correct. There seems to be an error in the 8544 RM. + + Signed-off-by: Wolfgang Grandegger + +commit e46c7bfb8bc3c304cedd20f7a365d6e78d7eaf17 +Author: Rafal Czubak +Date: Wed Oct 8 13:41:30 2008 +0200 + + FSL: Fix get_cpu_board_revision() return value. + + get_cpu_board_revision() returned board revision based on information stored + in global static struct eeprom. It should instead use one from local struct + board_eeprom, to which the data is actually read from EEPROM. The bug led to + system hang after printing L1 cache information on U-Boot startup. The problem + was observed on MPC8555CDS system and possibly affects other Freescale MPC85xx + boards using CFG_I2C_EEPROM_CCID. + + The change has been successfully tested on MPC8555CDS system. + + Signed-off-by: Rafal Czubak + +commit 747f316cca484ed627a97dd3391febabce384186 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Sep 30 20:08:49 2008 +0200 + + update uImage FIT multi documentation + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 77a0355f60b801f232ce0a5bfbe95331fa3b6bc0 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Sep 30 20:08:36 2008 +0200 + + move README.imx31 to doc/ and merge with README.mx31 + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 1ed7a7f0f571b13d46530f8f8b9aff3957f15a96 +Author: Guennadi Liakhovetski +Date: Thu Sep 25 20:54:37 2008 +0200 + + i.MX31: switch to CFG_HZ=1000 + + Switch to the standard CFG_HZ=1000 value, while at it, minor white-space + cleanup, remove CFG_CLKS_IN_HZ from config-headers. Tested on mx31ads, + provides 2% or 0.4% precision depending on the + CONFIG_MX31_TIMER_HIGH_PRECISION flag. Measured with stop-watch on 100s + boot-delay. + + Signed-off-by: Guennadi Liakhovetski + +commit f41b144c11341b571eab7dcef6c4b8e03c92d2b2 +Author: gnusercn +Date: Wed Oct 8 18:58:58 2008 +0200 + + Fix bug: in arch-arm, env_get_char dose not work fine + + due to the arm implementation which supposed that U-Boot is in RAM + when we jump to start_armboot + + Signed-off-by: gnusercn + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit f8a00dea841d5d75de1f8e8107e90ee1beeddf5f +Author: Adam Graham +Date: Mon Oct 6 10:16:13 2008 -0700 + + ppc4xx: Reset and relock memory DLL after SDRAM_CLKTR change + + After changing SDRAM_CLKTR phase value rerun the memory preload + initialization sequence (INITPLR) to reset and relock the memory + DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing + adjustment effects the phase relationship of the internal, to the + PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT. + + Signed-off-by: Adam Graham + Signed-off-by: Victor Gallardo + Signed-off-by: Stefan Roese + +commit 5297246bbaa9943c0da1ec2e717b72e4ab6b830e +Author: Haiying Wang +Date: Fri Oct 3 11:48:03 2008 -0400 + + Remove redundant #define for MPC8536DS + + Signed-off-by: Haiying Wang + +commit 445a7b38308eb05b41de74165b20855db58c7ee5 +Author: Haiying Wang +Date: Fri Oct 3 11:47:30 2008 -0400 + + Add ID EEPROM support for MPC8572DS + + The ID EEPROM on MPC8572DS board locates on I2C bus 1. Its the storage for + system information like mac addresses etc. This patch enables it. + + Signed-off-by: Haiying Wang + +commit 1f3ba317a5c5f3a7aabf580fddc211f4bb5a4540 +Author: Haiying Wang +Date: Fri Oct 3 11:46:59 2008 -0400 + + Minor fixes for I2C address on MPC8572DS + + MPC8572DS has two i2c buses. This patch moves the DDR SPD_EEPROM to i2c bus 1 + according to the board spec, and adds the 2nd i2c bus offset. + + Signed-off-by: Haiying Wang + +commit c0391111c33c22fabeddf8f4ca801ec7645b4f5c +Author: Jason Jin +Date: Sat Sep 27 14:40:57 2008 +0800 + + Fix the incorrect DDR clk freq reporting on 8536DS + + On 8536DS board, When the DDR clk is set async mode(SW3[6:8] != 111), + The display is still sync mode DDR freq. This patch try to fix + this. The display DDR freq is now the actual freq in both + sync and async mode. + + Signed-off-by: Jason Jin + +commit bac6a1d1fa1cd80aa57881fa9c2152b853cd0ed4 +Author: Kumar Gala +Date: Tue Oct 7 10:28:46 2008 -0500 + + 85xx: Remove setting of *cache-line-size in device trees + + ePAPR says if the *cache-block-size is the same as *cache-line-size + than we don't need the *cache-line-size property. + + Signed-off-by: Kumar Gala + +commit cd3cb0d9269d155276b00207e3816a9347fd1c92 +Author: Gerald Van Baren +Date: Sat Oct 4 07:56:06 2008 -0400 + + libfdt: Fix error in documentation for fdt_get_alias_namelen() + + Oops, screwed up the function name in the documenting comment for this + function. Trivial correction in this patch. + + Signed-off-by: David Gibson + Acked-by: Gerald Van Baren + +commit 9a6cf73a88ddab2e1ac39088f2806177982cc62c +Author: David Gibson +Date: Wed Aug 20 16:55:14 2008 +1000 + + libfdt: Add function to explicitly expand aliases + + Kumar has already added alias expansion to fdt_path_offset(). + However, in some circumstances it may be convenient for the user of + libfdt to explicitly get the string expansion of an alias. This patch + adds a function to do this, fdt_get_alias(), and uses it to implement + fdt_path_offset(). + + Signed-off-by: David Gibson + +commit 2215987e100d2a841ae6d48a7cc9bb83fcf22737 +Author: Mike Frysinger +Date: Thu Oct 2 01:55:38 2008 -0400 + + cfi_flash: do not reset flash when probe fails + + The CFI flash driver starts at flash_init() which calls down into + flash_get_size(). This starts by calling flash_detect_cfi(). If said + function fails, flash_get_size() finishes by attempting to reset the + flash. Unfortunately, it does this with an info->portwidth set to 0x10 + which filters down into flash_make_cmd() and that happily smashes the + stack by sticking info->portwidth bytes into a cfiword_t variable that + lives on the stack. On a 64bit system you probably won't notice, but + killing the last 8 bytes on a 32bit system usually leads to a corrupt + return address. Which is what happens on a Blackfin system. + + Signed-off-by: Mike Frysinger + Signed-off-by: Stefan Roese + +commit 3e38577208e4256956bc33bb8bcd0a6b6fab55c3 +Author: Stefan Roese +Date: Fri Sep 26 17:03:26 2008 +0200 + + fdt: Overwrite /chosen node in bootm if it already exists in the dtb + + Set force parameter in fdt_chosen() call in do_bootm_linux() call. + Without this, the chosen node is not overwritten if it already + exists. + + Signed-off-by: Stefan Roese + +commit 741a6d010d09b5bafca8e4cdfb6b2f8a2c07994d +Author: Jon Loeliger +Date: Thu Sep 25 11:02:17 2008 -0500 + + Fix an overflow case in fdt_offset_ptr() detected by GCC 4.3. + + Using Gcc 4.3 detected this problem: + + ../dtc/libfdt/fdt.c: In function 'fdt_next_tag': + ../dtc/libfdt/fdt.c:82: error: assuming signed overflow does not + occur when assuming that (X + c) < X is always false + + To fix the problem, treat the offset as an unsigned int. + + The problem report and proposed fix were provided + by Steve Papacharalambous . + + Signed-off-by: Jon Loeliger + +commit bbdbc7cb3abefda5bd998edbcf0508fe6256327d +Author: David Gibson +Date: Fri Aug 29 14:19:13 2008 +1000 + + libfdt: Fix bugs in fdt_get_path() + + The current implementation of fdt_get_path() has a couple of bugs, + fixed by this patch. + + First, contrary to its documentation, on success it returns the length + of the node's path, rather than 0. The testcase is correspondingly + wrong, and the patch fixes this as well. + + Second, in some circumstances, it will return -FDT_ERR_BADOFFSET + instead of -FDT_ERR_NOSPACE when given insufficient buffer space. + Specifically this happens when there is insufficient space even to + hold the path's second last component. This behaviour is corrected, + and the testcase updated to check it. + + Signed-off-by: David Gibson + +commit 33af3e6656e84660d397b5dd95abab2dccc36f83 +Author: Wolfgang Denk +Date: Wed Oct 1 12:34:58 2008 +0200 + + TQM5200: enable support for ATAPI devices + + Signed-off-by: Wolfgang Denk + +commit d13ff2358ff8c384f52eaf46f5d60258acf96ea6 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Mon Sep 15 05:48:25 2008 +0200 + + Revert "ARM: set GD_FLG_RELOC for boards skipping relocation to RAM" + + we need this due to the arm implementation which supposed that U-Boot + is in RAM when we jump to start_armboot + + This reverts commit f96b44cef897bd372beb86dde1b33637c119d84d. + in order to do it for all arm board + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 7fd0bea2e4a78eab7e6693140940f9f9a0009bc2 +Author: Kim Phillips +Date: Wed Sep 24 08:46:25 2008 -0500 + + mpc83xx: don't disable autoboot + + bootdelay set to -1 'permanently' disables autobooting, even if + bootcmd is specified. Change to a positive value to allow + autobooting when a bootcmd is set. + + Reported-by: Coray Tate + Cc: Scott Wood + Signed-off-by: Kim Phillips + +commit 2fb29c520c42b7bfef33ea3fd1527eba64099164 +Author: Nobuhiro Iwamatsu +Date: Wed Sep 24 10:42:15 2008 +0900 + + mpc83xx: Fix typo in include/mpc83xx.h + + Fixed typo from CONIFG_MPC837X to CONFIG_MPC837X + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Kim Phillips + +commit 162c41c03179727a1d14262f703c9a8bc40231fa +Author: Kim Phillips +Date: Tue Sep 23 09:38:49 2008 -0500 + + mpc83xx: add h/w flash protection to board configs + + the operating system may leave flash in a h/w locked state after writing. + This allows u-boot to continue to write flash by enabling h/w unlocking + by default. + + Signed-off-by: Kim Phillips + +commit d26154c9a692586b66eb6d1f8e1b67c75e40ea70 +Author: Anton Vorontsov +Date: Thu Sep 11 21:35:36 2008 +0400 + + mpc83xx: spd_sdram: fix ddr sdram base address assignment bug + + The spd_dram code shifts the base address, then masks 20 bits, but + forgets to shift the base address back. Fix this by just masking the + base address correctly. + + Found this bug while trying to relocate a DDR memory at the base != 0. + + Signed-off-by: Anton Vorontsov + Signed-off-by: Kim Phillips + +commit 8fd4166c467a46773f80208bda1ec3b4757747bc +Author: Stefan Roese +Date: Mon Sep 22 16:10:43 2008 +0200 + + ppc4xx: Canyonlands: Remove unnecessary FDT warning upon DTB fixup + + Depending on the configuration jumper "SATA SELECT", U-Boot disabled + either one PCIe node or the SATA node in the device tree blob. This + patch removes the unnecessary and even confusing warning, when the node + is not found at all. + + Signed-off-by: Stefan Roese + +commit 6e24a1eb1490aa043770bcf0061ac1fad0864fd9 +Author: Remy Bohmer +Date: Fri Sep 19 13:30:06 2008 +0200 + + Add missing device types to dev_print() in part.c + + Signed-off-by: Remy Bohmer + +commit 5fdc215f0b351b0c36cc3f8a0fa5850f24454bed +Author: Wolfgang Denk +Date: Mon Sep 22 22:23:06 2008 +0200 + + Fix DPRAM memory leak when CFG_ALLOC_DPRAM is defined, which + eventually leads to a machine check. This change assures that DPRAM + is allocated only once in that case. + + Signed-off-by: Gary Jennejohn + Signed-off-by: Wolfgang Denk + +commit a07faf7b9ad5a86763a577c79922c4ff9a70ef23 +Author: Laurent Pinchart +Date: Wed Sep 17 17:57:34 2008 +0200 + + Fix Spartan-3 definitions. + + A few Spartan-3 definitions erroneously use Spartan-3E size + constants. This patch fixes them. + + Signed-off-by: Laurent Pinchart + +commit 28113e1f0da4146b823ffce37680d31d5685a60b +Author: Laurent Pinchart +Date: Wed Sep 17 17:41:58 2008 +0200 + + Remove duplicate Spartan-3E definition. + + Signed-off-by: Laurent Pinchart + Signed-off-by: Wolfgang Denk + +commit 5c65ecf7cd94df250b295621f3b24135cbcfe579 +Author: Anatolij Gustschin +Date: Wed Sep 17 13:46:17 2008 +0200 + + socrates: change default mtest address range + + Running mtest command on socrates without specifying + an address range crashes the board. This patch changes + default mtest address range to prevent this behavior. + + Signed-off-by: Anatolij Gustschin + +commit d666b2d59674b5e002c0821b7ab83ec3ff90d670 +Author: Anatolij Gustschin +Date: Wed Sep 17 12:34:45 2008 +0200 + + socrates: fix crash after relocation + + Currently U-Boot crashes after relocation to RAM. + Changing the CPO value of the DDR SDRAM TIMING_CFG_2 + register to READ_LAT + 1 (to the value it was before + conversion of socrates to new DDR code) fixes the + problem. + + Signed-off-by: Anatolij Gustschin + +commit 562788b0a303f3528b920d81f547f5ca77ba528e +Author: Anatolij Gustschin +Date: Wed Sep 17 11:45:51 2008 +0200 + + socrates: fix SPD EEPROM address + + Commit be0bd8234b9777ecd63c4c686f72af070d886517 + changed SPD EEPROM address to 0x51 and DDR SDRAM + detection stopped working. Change this address + back to 0x50. + + Signed-off-by: Anatolij Gustschin + +commit 023824549a370bd185d7129d9a6c86f9be7b86a8 +Author: Stefan Roese +Date: Mon Sep 22 11:06:50 2008 +0200 + + Revert "ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz (200MHz PLB)" + + This reverts commit 3eec160a3a405b29ce9c06920f6427b9047dd8a8. + + Signed-off-by: Stefan Roese + +commit e58c41e26cf3c8accd60311be579f452e368e97e +Author: Nobuhiro Iwamatsu +Date: Thu Sep 18 20:13:08 2008 +0900 + + usb: Fix compile warning of r8a66597-hcd + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Markus Klotzbuecher + +commit b5d10a13525c07ec6374adf840d7c87553b5f189 +Author: Nobuhiro Iwamatsu +Date: Thu Sep 18 19:34:36 2008 +0900 + + sh: Fix compile warning + + Signed-off-by: Nobuhiro Iwamatsu + +commit 4a065abf926f128beb36d93449defa0d690e7fef +Author: Nobuhiro Iwamatsu +Date: Thu Sep 18 19:04:26 2008 +0900 + + sh: Add support watchdog for SH4A core + + Add support watchdog for SH4A core (SH7763, SH7780 and SH7785). + And fix some compile warning. + + Signed-off-by: Nobuhiro Iwamatsu + +commit a03c09c5fdb8430fe2ae6a03f88a0cf7bcc0aa57 +Author: Nobuhiro Iwamatsu +Date: Wed Sep 17 11:45:26 2008 +0900 + + sh: Fix typo in SH serial driver + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit 6b44a439215ba7c63f666f8099213ea4f05f2b07 +Author: Nobuhiro Iwamatsu +Date: Wed Sep 17 11:08:36 2008 +0900 + + sh: Add support any page size and empty_zero_page to SH Linux uImage + + Old U-Boot supported 4KB page size only. If this version, Linux + kernel can not get command line from U-Boot. + SH Linux kernel can change page size and empty_zero_page. + This patch support this function and fix promlem. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit ce9f99ddb59628f41dc534e892368a7d66dfc774 +Author: Nobuhiro Iwamatsu +Date: Thu Aug 28 13:40:52 2008 +0900 + + sh: rsk7203: Add support pkt_data_pull and pkt_data_push function + + Add function of smc911x, pkt_data_pull and pkt_data_push. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit dd820b03a2f45e86e7960e26729a3b58e3dda44a +Author: Wolfgang Denk +Date: Thu Sep 18 13:57:32 2008 +0200 + + ADS5121: fix typo in "rootpath" default setting + + Signed-off-by: Wolfgang Denk + +commit c9e8436b10cca53fca4904ecbadcd6231ad72c38 +Author: Remy Bohmer +Date: Tue Sep 16 14:55:44 2008 +0200 + + USB layer of U-Boot causes USB protocol errors while using USB memory sticks + + There are several differences between Linux, Windows and U-boot for initialising the + USB devices. While analysing the behaviour of U-boot it turned out that U-boot does + things really different, and some are wrong (compared to the USB standard). + + This patch fixes some errors: + * The NEW_init procedure that was already in the code is good, while the old procedure + is wrong. See code comments for more info. + * On a Control request the data returned by the device can be more than 8 bytes, while + the host limits it to 8 bytes. This caused the host to generate a DataOverrun error. + This results in a lot of USB sticks not being recognised, and the transmission ended + frequently with a CTL:TIMEOUT Error. + * Added a flag CONFIG_LEGACY_USB_INIT_SEQ to allow users to use the old init procedure. + + Signed-off-by: Remy Bohmer + Signed-off-by: Markus Klotzbuecher + +commit 6f5794a6f78b313231256958fd73673c6aacc116 +Author: Remy Bohmer +Date: Tue Sep 16 14:55:43 2008 +0200 + + Refactoring parts of the common USB OHCI code + + This patch refactors some large routines of the USB OHCI code by + making some routines smaller and more readable which helps + debugging and understanding the code. (Makes the code looks + somewhat more like the Linux implementation.) + + Also made entire file compliant to Linux Coding Rules (checkpatch.pl compliant) + + Signed-off-by: Remy Bohmer + Signed-off-by: Markus Klotzbuecher + +commit be19d324edc1a1d7f393d24e10d164cd94c91a00 +Author: Remy Bohmer +Date: Tue Sep 16 14:55:42 2008 +0200 + + Fix for USB sticks not working on ARM while using GCC 4.x compilers + + The GCC-compiler makes an optimisation error while optimising the routine + usb_set_maxpacket(). This should be fixed in the compiler in the first place, + but there lots of compilers out there that makes this error, that it is + probably wiser to workaround it in U-boot itself. + + What happens is that the register r3 is used as loop-counter 'i', but gets + overwritten later on. From there it starts using register r3 for several other + things and the assembler code is becoming a big mess. This is clearly a compiler bug. + + This error occurs on at least several versions of Code Sourcery Lite compilers + for ARM. Like the Edition 2008q1, and 2008q3, It has also been seen on other + compilers, while compiling for armv4t, or armv5te with Os, O1 and O2. + + We work around it by splitting up this routine in 2 parts, and making sure that + the split out part is NOT inlined any longer. This will make GCC spit out assembler + that do not show this problem. Another possibility is to adapt the Makefile to stop + optimisation for the complete file. I think this solution is nicer. + + Signed-off-by: Remy Bohmer + Signed-off-by: Markus Klotzbuecher + +commit 87b4ef560cf2da4ccc9e59711ad1ff7fafe96670 +Author: Wolfgang Denk +Date: Wed Sep 17 10:17:55 2008 +0200 + + Coding style cleanup; update CHANEGLOG + + Signed-off-by: Wolfgang Denk + +commit 3eec160a3a405b29ce9c06920f6427b9047dd8a8 +Author: Victor Gallardo +Date: Tue Sep 16 06:59:13 2008 -0700 + + ppc4xx: Fix DDR2 auto calibration on Kilauea 600MHz (200MHz PLB) + + Signed-off-by: Victor Gallardo + Signed-off-by: Adam Graham + Signed-off-by: Stefan Roese + +commit ce47eb402c5e29a025399dc282246414fc492940 +Author: Peter Tyser +Date: Tue Sep 16 10:04:47 2008 -0500 + + Support for multiple SGMII/TBI interfaces for TSEC ethernet + + Fix TBI PHY accesses to use the proper offset in CPU register space. The + previous code would incorrectly access the TBI PHY by reading/writing to CPU + register space at the same location as would be used to access external PHYs. + + Signed-off-by: Peter Tyser + Acked-by: Andy Fleming + commit 7c803be2eb3cae245dedda438776e08fb122250f Author: Wolfgang Denk Date: Tue Sep 16 18:02:19 2008 +0200