X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=board%2Fesd%2Fpmc405%2Fpmc405.c;h=03143fe487b83bf8bf5e8ce011749f477cefa4f9;hb=3df4f46f3209c067dcadc969ed02d27c97fa3632;hp=6d2432cb3c78d4d6165fd71594020dc33a9bfcfd;hpb=c837dcb1a316745092567bfe4fb266d0941884ff;p=karo-tx-uboot.git diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c index 6d2432cb3c..03143fe487 100644 --- a/board/esd/pmc405/pmc405.c +++ b/board/esd/pmc405/pmc405.c @@ -1,6 +1,9 @@ /* * (C) Copyright 2001-2003 - * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * (C) Copyright 2005-2009 + * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com * * See file CREDITS for list of people who contributed to this * project. @@ -23,17 +26,13 @@ #include #include +#include #include #include +DECLARE_GLOBAL_DATA_PTR; -/* fpga configuration data - not compressed, generated by bin2c */ -const unsigned char fpgadata[] = -{ -#include "fpgadata.c" -}; -int filesize = sizeof(fpgadata); - +extern void lxt971_no_sleep(void); int board_early_init_f (void) { @@ -49,84 +48,111 @@ int board_early_init_f (void) * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive */ - mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ - mtdcr(uicer, 0x00000000); /* disable all ints */ - mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/ - mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */ - mtdcr(uictr, 0x10000000); /* set int trigger levels */ - mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/ - mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ + mtdcr(UIC0ER, 0x00000000); /* disable all ints */ + mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical*/ + mtdcr(UIC0PR, 0xFFFFFF81); /* set int polarities */ + mtdcr(UIC0TR, 0x10000000); /* set int trigger levels */ + mtdcr(UIC0VCR, 0x00000001); /* set vect base=0, INT0 highest priority */ + mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ /* - * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us + * EBC Configuration Register: + * set ready timeout to 512 ebc-clks -> ca. 15 us */ - mtebc (epcr, 0xa8400000); - - return 0; -} + mtebc (EBC0_CFG, 0xa8400000); + /* + * Setup GPIO pins + */ + mtdcr(CPC0_CR0, mfdcr(CPC0_CR0) | ((CONFIG_SYS_FPGA_INIT | + CONFIG_SYS_FPGA_DONE | + CONFIG_SYS_XEREADY | + CONFIG_SYS_NONMONARCH | + CONFIG_SYS_REV1_2) << 5)); + + if (!(in_be32((void *)GPIO0_IR) & CONFIG_SYS_REV1_2)) { + /* rev 1.2 boards */ + mtdcr(CPC0_CR0, mfdcr(CPC0_CR0) | ((CONFIG_SYS_INTA_FAKE | + CONFIG_SYS_SELF_RST) << 5)); + } -/* ------------------------------------------------------------------------- */ + out_be32((void *)GPIO0_OR, CONFIG_SYS_VPEN); + /* setup for output */ + out_be32((void *)GPIO0_TCR, CONFIG_SYS_FPGA_PRG | CONFIG_SYS_FPGA_CLK | + CONFIG_SYS_FPGA_DATA | CONFIG_SYS_XEREADY | CONFIG_SYS_VPEN); -int misc_init_f (void) -{ - return 0; /* dummy implementation */ + /* + * - check if rev1_2 is low, then: + * - set/reset CONFIG_SYS_INTA_FAKE/CONFIG_SYS_SELF_RST + * in TCR to assert INTA# or SELFRST# + */ + return 0; } - int misc_init_r (void) { + /* adjust flash start and offset */ + gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; + gd->bd->bi_flashoffset = 0; + + /* deassert EREADY# */ + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | CONFIG_SYS_XEREADY); return (0); } +ushort pmc405_pci_subsys_deviceid(void) +{ + ulong val; + + val = in_be32((void *)GPIO0_IR); + if (!(val & CONFIG_SYS_REV1_2)) { /* low=rev1.2 */ + /* check monarch# signal */ + if (val & CONFIG_SYS_NONMONARCH) + return CONFIG_SYS_PCI_SUBSYS_DEVICEID_NONMONARCH; + return CONFIG_SYS_PCI_SUBSYS_DEVICEID_MONARCH; + } + return CONFIG_SYS_PCI_SUBSYS_DEVICEID_NONMONARCH; +} /* - * Check Board Identity: + * Check Board Identity */ - int checkboard (void) { - unsigned char str[64]; - int i = getenv_r ("serial#", str, sizeof(str)); + ulong val; + char str[64]; + int i = getenv_f("serial#", str, sizeof(str)); puts ("Board: "); - if (i == -1) { + if (i == -1) puts ("### No HW ID - assuming PMC405"); - } else { + else puts(str); - } + + val = in_be32((void *)GPIO0_IR); + if (!(val & CONFIG_SYS_REV1_2)) { /* low=rev1.2 */ + puts(" rev1.2 ("); + if (val & CONFIG_SYS_NONMONARCH) /* monarch# signal */ + puts("non-"); + puts("monarch)"); + } else + puts(" <=rev1.1"); putc ('\n'); return 0; } -/* ------------------------------------------------------------------------- */ - -long int initdram (int board_type) +void reset_phy(void) { - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); +#ifdef CONFIG_LXT971_NO_SLEEP -#if 0 - printf("\nmb0cf=%x\n", val); /* test-only */ - printf("strap=%x\n", mfdcr(strap)); /* test-only */ + /* + * Disable sleep mode in LXT971 + */ + lxt971_no_sleep(); #endif - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} - -/* ------------------------------------------------------------------------- */ - -int testdram (void) -{ - /* TODO: XXX XXX XXX */ - printf ("test: 16 MB - ok\n"); - - return (0); } - -/* ------------------------------------------------------------------------- */