X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=boards.cfg;h=4bfd9015805a05344248a3df0ed9f22d6fb392ab;hb=fe2cb473433e870d262b6322ad21d047ac570acd;hp=5a5c0e1eb89052d60da3a3400b574eb49ffa9677;hpb=2c8e29b61728104ad1f7d204198dff58dc488e16;p=karo-tx-uboot.git diff --git a/boards.cfg b/boards.cfg index 5a5c0e1eb8..4bfd901580 100644 --- a/boards.cfg +++ b/boards.cfg @@ -270,20 +270,29 @@ mx53smd arm armv7 mx53smd freesca ima3-mx53 arm armv7 ima3-mx53 esg mx5 ima3-mx53:IMX_CONFIG=board/esg/ima3-mx53/imximage.cfg vision2 arm armv7 vision2 ttcontrol mx5 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg cgtqmx6qeval arm armv7 cgtqmx6eval congatec mx6 cgtqmx6eval:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q -tx51-8xx0 arm armv7 tx51 karo mx5 tx51:SYS_CPU_CLK=800,NR_DRAM_BANKS=1,SYS_SDRAM_CLK=166 -tx51-8xx1 arm armv7 tx51 karo mx5 tx51:SYS_CPU_CLK=800,NR_DRAM_BANKS=2,SYS_SDRAM_CLK=200 -tx51-8xx2 arm armv7 tx51 karo mx5 tx51:SYS_CPU_CLK=800,NR_DRAM_BANKS=2,SYS_SDRAM_CLK=166 -tx53-xx30 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=1 -tx53-xx31 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=2 -tx6u-8x10 arm armv7 tx6 karo mx6 tx6:MX6DL -tx6u-8x10_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,MFG -tx6u-8x10_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,ENV_IS_NOWHERE -tx6u-8x11 arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32 -tx6u-8x11_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,MFG -tx6u-8x11_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,ENV_IS_NOWHERE -tx6q-1x10 arm armv7 tx6 karo mx6 tx6:MX6Q -tx6q-1x10_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,MFG -tx6q-1x10_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE +tx51-8xx0 arm armv7 tx51 karo mx5 tx51:SYS_CPU_CLK=800,NR_DRAM_BANKS=1 +tx51-8xx1_2 arm armv7 tx51 karo mx5 tx51:SYS_CPU_CLK=800,NR_DRAM_BANKS=2 +tx53-x030 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=1 +tx53-x130 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=1,SYS_LVDS_IF +tx53-x131 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=2,SYS_LVDS_IF +tx6u-8010 arm armv7 tx6 karo mx6 tx6:MX6DL +tx6u-8010_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,MFG +tx6u-8010_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,ENV_IS_NOWHERE +tx6u-8011 arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32 +tx6u-8011_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,MFG +tx6u-8011_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,ENV_IS_NOWHERE +tx6q-1010 arm armv7 tx6 karo mx6 tx6:MX6Q +tx6q-1010_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,MFG +tx6q-1010_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE +tx6u-8110 arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_LVDS_IF +tx6u-8110_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,MFG,SYS_LVDS_IF +tx6u-8110_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,ENV_IS_NOWHERE,SYS_LVDS_IF +tx6u-8111 arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,SYS_LVDS_IF +tx6u-8111_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,MFG,SYS_LVDS_IF +tx6u-8111_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,ENV_IS_NOWHERE,SYS_LVDS_IF +tx6q-1110 arm armv7 tx6 karo mx6 tx6:MX6Q,SYS_LVDS_IF +tx6q-1110_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,MFG,SYS_LVDS_IF +tx6q-1110_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE,SYS_LVDS_IF mx6qarm2 arm armv7 mx6qarm2 freescale mx6 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg mx6qsabreauto arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q mx6qsabrelite arm armv7 mx6qsabrelite freescale mx6 mx6qsabrelite:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg