X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=doc%2FREADME.mpc85xxads;h=28bbcbe095dfa20b8af64369e47a5b6d667e69b2;hb=df349e8a55f2cd750d1a998901896b8237d5c777;hp=146cff55216803b634cb4f7bee2bda970227b9fe;hpb=9aea95307fdb0ffe0d3a98a17ac73e5040c9756a;p=karo-tx-uboot.git diff --git a/doc/README.mpc85xxads b/doc/README.mpc85xxads index 146cff5521..28bbcbe095 100644 --- a/doc/README.mpc85xxads +++ b/doc/README.mpc85xxads @@ -7,7 +7,7 @@ Updated 13-July-2004 Jon Loeliger 0. Toolchain The Binutils in current ELDK toolchain will not support MPC85xx - chip. You need use the newest binutils-2.14.tar.bz2 from + chip. You need to use binutils-2.14.tar.bz2 (or newer) from http://ftp.gnu.org/gnu/binutils. The 8540/8560 ADS code base is known to compile using: @@ -35,7 +35,7 @@ Updated 13-July-2004 Jon Loeliger "On" == 0 SW18 is switch 18 as silk-screened onto the board. - SW4[8] is the bit labled 8 on Switch 4. + SW4[8] is the bit labeled 8 on Switch 4. SW2[1:6] refers to bits labeled 1 through 6 in order on switch 2 SW3[7:1] refers to bits labeled 7 through 1 in order on switch 3 @@ -100,6 +100,9 @@ Updated 13-July-2004 Jon Loeliger SW7[1:4] = 0101 = 5 => 5 x 66 = 330 CCB Sysclk SW7[5:6] = 01 => 5:2 x 330 = 825 Core clock + In order to use PCI-X (only in the first PCI slot. The one with + the RIO connector), you need to set SW1[4] (config) to 1 (off). + Also, configure the board to run PCI at 66 MHz. 2. MEMORY MAP TO WORK WITH LINUX KERNEL @@ -121,8 +124,8 @@ Updated 13-July-2004 Jon Loeliger kernel's ppcboot.h is consistent with U-Boot's u-boot.h. You can use two default configuration files as your starting points to configure the kernel: - arch/ppc/configs/mpc8540_ads_defconfig - arch/ppc/configs/mpc8560_ads_defconfig + arch/powerpc/configs/mpc8540_ads_defconfig + arch/powerpc/configs/mpc8560_ads_defconfig 3. DEFINITIONS AND COMPILATION @@ -130,11 +133,10 @@ Updated 13-July-2004 Jon Loeliger include/configs/MPC8540ADS.h include/configs/MPC8560ADS.h - CONFIG_BOOKE BOOKE(e.g. Motorola MPC85xx, IBM 440, etc) + CONFIG_BOOKE BOOKE(e.g. Motorola MPC85xx, AMCC 440, etc) CONFIG_E500 BOOKE e500 family(Motorola) CONFIG_MPC85xx MPC8540,MPC8560 and their derivatives CONFIG_MPC8540 MPC8540 specific - CONFIG_MPC8560 MPC8560 specific CONFIG_MPC8540ADS MPC8540ADS board specific CONFIG_MPC8560ADS MPC8560ADS board specific CONFIG_TSEC_ENET Use on-chip 10/100/1000 ethernet for networking @@ -142,8 +144,9 @@ Updated 13-July-2004 Jon Loeliger also manual config the DDR after undef this definition. CONFIG_DDR_ECC only for ECC DDR module - CONFIG_DDR_DLL DLL fix on some ADS boards needed for more - stability. + CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN DLL fix on some ADS boards needed + for more stability. + CONFIG_HAS_FEC If an FEC is on chip, set to 1, else 0. Other than the above definitions, the rest in the config files are straightforward. @@ -191,10 +194,10 @@ straightforward. 4.4 Reflash U-boot Image using U-boot - => tftp 0 u-boot.bin - => protect off fff80000 ffffffff - => erase fff80000 ffffffff - => cp.b 0 fff80000 80000 + tftp 10000 u-boot.bin + protect off fff80000 ffffffff + erase fff80000 ffffffff + cp.b 10000 fff80000 80000 4.5 Reflash U-Boot with a BDI-2000