X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=drivers%2Fblock%2Fdwc_ahsata.c;h=d155be5bf5a1eb2ec533d2a483f7ba6341ac6780;hb=f09d4f4f75c5b179c77679416421552b309b7f97;hp=3569214297a1ab6aec580e744d042ed8146ed371;hpb=c2120fbfbc4d1f6953228f86be8bdbf38bacfdab;p=karo-tx-uboot.git

diff --git a/drivers/block/dwc_ahsata.c b/drivers/block/dwc_ahsata.c
index 3569214297..d155be5bf5 100644
--- a/drivers/block/dwc_ahsata.c
+++ b/drivers/block/dwc_ahsata.c
@@ -17,6 +17,7 @@
 #include <asm/io.h>
 #include <linux/bitops.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
 #include "dwc_ahsata.h"
 
 struct sata_port_regs {
@@ -79,7 +80,7 @@ struct sata_host_regs {
 
 static int is_ready;
 
-static inline u32 ahci_port_base(u32 base, u32 port)
+static inline void __iomem *ahci_port_base(void __iomem *base, u32 port)
 {
 	return base + 0x100 + (port * 0x80);
 }
@@ -166,7 +167,7 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
 
 	for (i = 0; i < probe_ent->n_ports; i++) {
 		probe_ent->port[i].port_mmio =
-			ahci_port_base((u32)host_mmio, i);
+			ahci_port_base(host_mmio, i);
 		port_mmio =
 			(struct sata_port_regs *)probe_ent->port[i].port_mmio;
 
@@ -342,7 +343,7 @@ static int ahci_init_one(int pdev)
 				| ATA_FLAG_PIO_DMA
 				| ATA_FLAG_NO_ATAPI;
 
-	probe_ent->mmio_base = CONFIG_DWC_AHSATA_BASE_ADDR;
+	probe_ent->mmio_base = (void __iomem *)CONFIG_DWC_AHSATA_BASE_ADDR;
 
 	/* initialize adapter */
 	rc = ahci_host_init(probe_ent);
@@ -398,8 +399,11 @@ static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 cmd_slot, u32 opts)
 	memset(cmd_hdr, 0, AHCI_CMD_SLOT_SZ);
 	cmd_hdr->opts = cpu_to_le32(opts);
 	cmd_hdr->status = 0;
-	cmd_hdr->tbl_addr = cpu_to_le32(pp->cmd_tbl & 0xffffffff);
-	cmd_hdr->tbl_addr_hi = 0;
+	pp->cmd_slot->tbl_addr = cpu_to_le32((u32)pp->cmd_tbl & 0xffffffff);
+#ifdef CONFIG_PHYS_64BIT
+	pp->cmd_slot->tbl_addr_hi =
+	    cpu_to_le32((u32)(((pp->cmd_tbl) >> 16) >> 16));
+#endif
 }
 
 #define AHCI_GET_CMD_SLOT(c) ((c) ? ffs(c) : 0)
@@ -519,7 +523,7 @@ static int ahci_port_start(struct ahci_probe_ent *probe_ent,
 	 * and its scatter-gather table
 	 */
 	pp->cmd_tbl = mem;
-	debug("cmd_tbl_dma = 0x%x\n", pp->cmd_tbl);
+	debug("cmd_tbl_dma = 0x%lx\n", pp->cmd_tbl);
 
 	mem += AHCI_CMD_TBL_HDR;
 
@@ -558,6 +562,10 @@ int init_sata(int dev)
 	u32 linkmap;
 	struct ahci_probe_ent *probe_ent = NULL;
 
+#if defined(CONFIG_ARCH_MX6)
+	if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D))
+		return 1;
+#endif
 	if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {
 		printf("The sata index %d is out of ranges\n\r", dev);
 		return -1;
@@ -587,6 +595,29 @@ int init_sata(int dev)
 	return 0;
 }
 
+int reset_sata(int dev)
+{
+	struct ahci_probe_ent *probe_ent;
+	struct sata_host_regs *host_mmio;
+
+	if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {
+		printf("The sata index %d is out of ranges\n\r", dev);
+		return -1;
+	}
+
+	probe_ent = (struct ahci_probe_ent *)sata_dev_desc[dev].priv;
+	if (NULL == probe_ent)
+		/* not initialized, so nothing to reset */
+		return 0;
+
+	host_mmio = (struct sata_host_regs *)probe_ent->mmio_base;
+	setbits_le32(&host_mmio->ghc, SATA_HOST_GHC_HR);
+	while (readl(&host_mmio->ghc) & SATA_HOST_GHC_HR)
+		udelay(100);
+
+	return 0;
+}
+
 static void dwc_ahsata_print_info(int dev)
 {
 	block_dev_desc_t *pdev = &(sata_dev_desc[dev]);
@@ -859,6 +890,23 @@ u32 ata_low_level_rw_lba28(int dev, u32 blknr, lbaint_t blkcnt,
 	return blkcnt;
 }
 
+int sata_port_status(int dev, int port)
+{
+	struct sata_port_regs *port_mmio;
+	struct ahci_probe_ent *probe_ent = NULL;
+
+	if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1))
+		return -EINVAL;
+
+	if (sata_dev_desc[dev].priv == NULL)
+		return -ENODEV;
+
+	probe_ent = (struct ahci_probe_ent *)sata_dev_desc[dev].priv;
+	port_mmio = (struct sata_port_regs *)probe_ent->port[port].port_mmio;
+
+	return readl(&(port_mmio->ssts)) & SATA_PORT_SSTS_DET_MASK;
+}
+
 /*
  * SATA interface between low level driver and command layer
  */