X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=include%2Fconfigs%2FSandpoint8245.h;h=97e8968243a5606d5b4cb04528ad1cfcfdb3b362;hb=19c9eb862853bc7c2bc611fbd485b576d3344fa6;hp=8cb920e0a101aaacad77036386552853ec81e76d;hpb=50bd0057ba8fceeb48533f8b1a652ccd0e170838;p=karo-tx-uboot.git diff --git a/include/configs/Sandpoint8245.h b/include/configs/Sandpoint8245.h index 8cb920e0a1..97e8968243 100644 --- a/include/configs/Sandpoint8245.h +++ b/include/configs/Sandpoint8245.h @@ -2,23 +2,7 @@ * (C) Copyright 2001-2005 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* ------------------------------------------------------------------------- */ @@ -39,6 +23,9 @@ #define CONFIG_MPC8245 1 #define CONFIG_SANDPOINT 1 +#define CONFIG_SYS_TEXT_BASE 0xFFF00000 +#define CONFIG_SYS_LDSCRIPT "board/sandpoint/u-boot.lds" + #if 0 #define USE_DINK32 1 #else @@ -92,9 +79,9 @@ *----------------------------------------------------------------------- */ #define CONFIG_PCI /* include pci support */ +#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #undef CONFIG_PCI_PNP -#define CONFIG_NET_MULTI /* Multi ethernet cards support */ #define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ @@ -122,21 +109,18 @@ #define CONFIG_SYS_MONITOR_BASE 0x00090000 #define CONFIG_SYS_RAMBOOT 1 #define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_INIT_RAM_END 0x10000 -#define CONFIG_SYS_GBL_DATA_SIZE 256 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #else #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_MONITOR_LEN 0x00030000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -/*#define CONFIG_SYS_GBL_DATA_SIZE 256*/ -#define CONFIG_SYS_GBL_DATA_SIZE 128 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_END 0x1000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #endif @@ -172,13 +156,16 @@ * If the software driver is chosen, there are some additional * configuration items that the driver uses to drive the port pins. */ -#define CONFIG_HARD_I2C 1 /* To enable I2C support */ -#undef CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_HARD_I2C 1 /* To enable I2C support */ +#undef CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_I2C_SLAVE 0x7F -#ifdef CONFIG_SOFT_I2C +#ifdef CONFIG_SYS_I2C_SOFT #error "Soft I2C is not configured properly. Please review!" +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_SOFT_SPEED 50000 +#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE #define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */ #define I2C_ACTIVE (iop->pdir |= 0x00010000) #define I2C_TRISTATE (iop->pdir &= ~0x00010000) @@ -188,14 +175,13 @@ #define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \ else iop->pdat &= ~0x00020000 #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */ +#endif /* CONFIG_SYS_I2C_SOFT */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 /* EEPROM IS24C02 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #define CONFIG_SYS_FLASH_BANKS { FLASH_BASE0_PRELIM , FLASH_BASE1_PRELIM } /*----------------------------------------------------------------------- @@ -203,7 +189,7 @@ */ -#define CONFIG_WINBOND_83C553 1 /*has a winbond bridge */ +/* #define CONFIG_WINBOND_83C553 1 / *has a winbond bridge */ #define CONFIG_SYS_USE_WINBOND_IDE 0 /*use winbond 83c553 internal IDE ctrlr */ #define CONFIG_SYS_WINBOND_ISA_CFG_ADDR 0x80005800 /*pci-isa bridge config addr */ #define CONFIG_SYS_WINBOND_IDE_CFG_ADDR 0x80005900 /*ide config addr */ @@ -378,16 +364,6 @@ # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - - /* values according to the manual */ #define CONFIG_DRAM_50MHZ 1