X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=include%2Fconfigs%2Fdavinci_sffsdr.h;h=28304bdcecbbf3e116321b24a07be60a470a50ed;hb=db545367d1fb8c7e0791f8ce338fc382a15ce99e;hp=4d866d0eb207fb76466462182324376e39ac3e30;hpb=17dd883c5b76bdade0f7a48f2eb02d918a5ebef9;p=karo-tx-uboot.git diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 4d866d0eb2..28304bdcec 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -4,20 +4,7 @@ * Copyright (C) 2008 Lyrtech * Copyright (C) 2008 Philip Balister, OpenSDR * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -28,13 +15,9 @@ #define CONFIG_SYS_NAND_LARGEPAGE #define CONFIG_SYS_USE_NAND #define CONFIG_SYS_USE_DSPLINK /* don't power up the DSP. */ -#define CONFIG_DISPLAY_CPUINFO /* SoC Configuration */ -#define CONFIG_ARM926EJS /* arm926ejs CPU core */ #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ -#define CONFIG_SYS_HZ 1000 -#define CONFIG_SOC_DM644X /* EEPROM definitions for Atmel 24LC64 EEPROM chip */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 @@ -45,7 +28,6 @@ #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256*1024) /* regular stack */ #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ #define DDR_4BANKS /* 4-bank DDR2 (128MB) */ @@ -57,23 +39,19 @@ #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ #define CONFIG_BAUDRATE 115200 /* Default baud rate */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* I2C Configuration */ -#define CONFIG_HARD_I2C -#define CONFIG_DRIVER_DAVINCI_I2C -#define CONFIG_SYS_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ -#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_DAVINCI +#define CONFIG_SYS_DAVINCI_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ +#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ /* Network & Ethernet Configuration */ #define CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 1 #define CONFIG_MII -#define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_OVERWRITE_ETHADDR_ONCE -#define CONFIG_NET_MULTI /* Flash & Environment */ #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH @@ -92,7 +70,6 @@ #define CONFIG_SYS_I2C_PCA9543_ADDR_LEN 0 /* Single register. */ #define CONFIG_SYS_I2C_PCA9543_ENABLE_CH0 0x01 /* Enable channel 0. */ /* U-Boot general configuration */ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ #define CONFIG_MISC_INIT_R #define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds. */ #define CONFIG_BOOTFILE "uImage" /* Boot file name */ @@ -108,7 +85,6 @@ #define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, * may be later */ #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP #define CONFIG_CRC32_VERIFY @@ -127,7 +103,6 @@ "nand read 87A00000 100000 300000;" \ "bootelf 87A00000" /* U-Boot commands */ -#include #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP #define CONFIG_CMD_DIAG @@ -138,14 +113,17 @@ #define CONFIG_CMD_NAND #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF /* Needed to load Integrity kernel. */ -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS -/* KGDB support (if any) */ -#ifdef CONFIG_CMD_KGDB -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ + +#ifdef CONFIG_CMD_BDI +#define CONFIG_CLOCKS #endif + +#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */