X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=include%2Fnetdev.h;h=917d8746fb04c7e7175c8faafda30c41748f22b1;hb=bc3442aaed26f16a0b9d1caa55cbe3bd94d16a86;hp=1a542e8e927d5fd962d681c0a4df7f67b497fc68;hpb=1ad98ad66e5bb8a46a186a92f180bb9592d47673;p=karo-tx-uboot.git diff --git a/include/netdev.h b/include/netdev.h index 1a542e8e92..917d8746fb 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -42,40 +42,47 @@ int cpu_eth_init(bd_t *bis); /* Driver initialization prototypes */ int altera_tse_initialize(u8 dev_num, int mac_base, - int sgdma_rx_base, int sgdma_tx_base); -int ax88180_initialize(bd_t *bis); -int au1x00_enet_initialize(bd_t*); + int sgdma_rx_base, int sgdma_tx_base, + u32 sgdma_desc_base, u32 sgdma_desc_size); int at91emac_register(bd_t *bis, unsigned long iobase); +int au1x00_enet_initialize(bd_t*); +int ax88180_initialize(bd_t *bis); int bfin_EMAC_initialize(bd_t *bis); +int calxedaxgmac_initialize(u32 id, ulong base_addr); int cs8900_initialize(u8 dev_num, int base_addr); -int dc21x4x_initialize(bd_t *bis); int davinci_emac_initialize(void); -int designware_initialize(u32 id, ulong base_addr, u32 phy_addr); +int dc21x4x_initialize(bd_t *bis); +int designware_initialize(u32 id, ulong base_addr, u32 phy_addr, u32 interface); +int dm9000_initialize(bd_t *bis); int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr); int e1000_initialize(bd_t *bis); int eepro100_initialize(bd_t *bis); int enc28j60_initialize(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode); int ep93xx_eth_initialize(u8 dev_num, int base_addr); -int ethoc_initialize(u8 dev_num, int base_addr); int eth_3com_initialize (bd_t * bis); +int ethoc_initialize(u8 dev_num, int base_addr); int fec_initialize (bd_t *bis); -int fecmxc_initialize (bd_t *bis); +int fecmxc_initialize(bd_t *bis); +int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr); int ftgmac100_initialize(bd_t *bits); int ftmac100_initialize(bd_t *bits); +int ftmac110_initialize(bd_t *bits); int greth_initialize(bd_t *bis); void gt6426x_eth_initialize(bd_t *bis); int inca_switch_initialize(bd_t *bis); +int ks8695_eth_initialize(void); +int ks8851_mll_initialize(u8 dev_num, int base_addr); int lan91c96_initialize(u8 dev_num, int base_addr); int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); int mcdmafec_initialize(bd_t *bis); int mcffec_initialize(bd_t *bis); int mpc512x_fec_initialize(bd_t *bis); int mpc5xxx_fec_initialize(bd_t *bis); -int mpc8220_fec_initialize(bd_t *bis); int mpc82xx_scc_enet_initialize(bd_t *bis); int mvgbe_initialize(bd_t *bis); int natsemi_initialize(bd_t *bis); +int ne2k_register(void); int npe_initialize(bd_t *bis); int ns8382x_initialize(bd_t *bis); int pcnet_initialize(bd_t *bis); @@ -84,15 +91,31 @@ int ppc_4xx_eth_initialize (bd_t *bis); int rtl8139_initialize(bd_t *bis); int rtl8169_initialize(bd_t *bis); int scc_initialize(bd_t *bis); +int sh_eth_initialize(bd_t *bis); int skge_initialize(bd_t *bis); -int smc911x_initialize(u8 dev_num, int base_addr); int smc91111_initialize(u8 dev_num, int base_addr); +int smc911x_initialize(u8 dev_num, int base_addr); +int sunxi_wemac_initialize(bd_t *bis); int tsi108_eth_initialize(bd_t *bis); int uec_standard_init(bd_t *bis); int uli526x_initialize(bd_t *bis); -int xilinx_emaclite_initialize (bd_t *bis, int base_addr); -int sh_eth_initialize(bd_t *bis); -int dm9000_initialize(bd_t *bis); +int armada100_fec_register(unsigned long base_addr); +int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr, + unsigned long dma_addr); +int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, + int txpp, int rxpp); +int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, + unsigned long ctrl_addr); +int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio); +/* + * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface + * exported by a public hader file, we need a global definition at this point. + */ +#if defined(CONFIG_XILINX_LL_TEMAC) +#define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */ +#define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */ +#define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */ +#endif /* Boards with PCI network controllers can call this from their board_eth_init() * function to initialize whatever's on board. @@ -142,10 +165,9 @@ static inline int pci_eth_init(bd_t *bis) * the stuct and enums here are used to specify switch configuration params */ #if defined(CONFIG_MV88E61XX_SWITCH) -enum mv88e61xx_cfg_vlan { - MV88E61XX_VLANCFG_DEFAULT, - MV88E61XX_VLANCFG_ROUTER -}; + +/* constants for any 88E61xx switch */ +#define MV88E61XX_MAX_PORTS_NUM 6 enum mv88e61xx_cfg_mdip { MV88E61XX_MDIP_NOCHANGE, @@ -171,7 +193,7 @@ enum mv88e61xx_cfg_prtstt { struct mv88e61xx_config { char *name; - enum mv88e61xx_cfg_vlan vlancfg; + u8 vlancfg[MV88E61XX_MAX_PORTS_NUM]; enum mv88e61xx_cfg_rgmiid rgmii_delay; enum mv88e61xx_cfg_prtstt portstate; enum mv88e61xx_cfg_ledinit led_init; @@ -180,7 +202,31 @@ struct mv88e61xx_config { u8 cpuport; }; +/* + * Common mappings for Internal VLANs + * These mappings consider that all ports are useable; the driver + * will mask inexistent/unused ports. + */ + +/* Switch mode : routes any port to any port */ +#define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F } + +/* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */ +#define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F } + int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig); #endif /* CONFIG_MV88E61XX_SWITCH */ +struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id); +#ifdef CONFIG_PHYLIB +struct phy_device; +int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr, + struct mii_dev *bus, struct phy_device *phydev); +#else +/* + * Allow FEC to fine-tune MII configuration on boards which require this. + */ +int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); +#endif + #endif /* _NETDEV_H_ */