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(parent: e66443f) | patch
dm: mips: Fix lb60 WDT control
authorMarek Vasut <marex@denx.de>
Sun, 12 Aug 2012 14:53:35 +0000 (16:53 +0200)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Fri, 17 Aug 2012 18:13:48 +0000 (20:13 +0200)
commit36d0a42b682e4d8493e8c080425bc9fb6f188cd2
tree1018aeebdd189000662df68dfada0e28d92f48b4tree | snapshot
parente66443fdb5355e68cfdbbdd37248c4b7eb4968f5commit | diff
dm: mips: Fix lb60 WDT control

Write the TSCR register via 32bit write instead of 16bit one.
The register is 32bit wide and bit 16 is being set, triggering
gcc overflow error and making the code broken.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel <zpxu@ingenic.cn>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
arch/mips/cpu/xburst/cpu.c diff | blob | history
UBoot for KaRo TX COM modules