drm/tegra: dc - Use proper H/V ref-to-sync values

For HDMI compliance both of these values need to be set to 1.

Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 33e03a69a04066e6a3479f72708a9b0edb8c82c7..b1b1395f06c72c5b73d2e57fbbc1ab96dacff3c1 100644 (file)
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -589,9 +589,8 @@ static bool tegra_crtc_mode_fixup(struct drm_crtc *crtc,
 static int tegra_dc_set_timings(struct tegra_dc *dc,
                                struct drm_display_mode *mode)
 {
-       /* TODO: For HDMI compliance, h & v ref_to_sync should be set to 1 */
-       unsigned int h_ref_to_sync = 0;
-       unsigned int v_ref_to_sync = 0;
+       unsigned int h_ref_to_sync = 1;
+       unsigned int v_ref_to_sync = 1;
        unsigned long value;
 
        tegra_dc_writel(dc, 0x0, DC_DISP_DISP_TIMING_OPTIONS);