drm/amdgpu/gfx9: use hweight for calculating num_rbs

Match what we do for other asics.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 7666add21519d592fea972a80c47b16e9850903e..6139dd079c70427ce18051319b6c4cd093a838e2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1231,7 +1231,7 @@ static u32 gfx_v9_0_get_rb_active_bitmap(struct amdgpu_device *adev)
 static void gfx_v9_0_setup_rb(struct amdgpu_device *adev)
 {
        int i, j;
-       u32 data, tmp, num_rbs = 0;
+       u32 data;
        u32 active_rbs = 0;
        u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se /
                                        adev->gfx.config.max_sh_per_se;
@@ -1249,10 +1249,7 @@ static void gfx_v9_0_setup_rb(struct amdgpu_device *adev)
        mutex_unlock(&adev->grbm_idx_mutex);
 
        adev->gfx.config.backend_enable_mask = active_rbs;
-       tmp = active_rbs;
-       while (tmp >>= 1)
-               num_rbs++;
-       adev->gfx.config.num_rbs = num_rbs;
+       adev->gfx.config.num_rbs = hweight32(active_rbs);
 }
 
 #define DEFAULT_SH_MEM_BASES   (0x6000)