ENGR00329096-02 dts: Enable dcic driver for imx6q/dl

Enable dcic driver for imx6q/dl SabreSD and SabreAI

Signed-off-by: Sandor Yu <R01008@freescale.com>

diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 6a91289a41ebe86b90d47c2ccef118eb996500cd..f4b6cf13d1e46e204466bdcf9a0e8647c08b2dae 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -354,6 +354,18 @@
        };
 };
 
+&dcic1 {
+       dcic_id = <0>;
+       dcic_mux = "dcic-hdmi";
+       status = "okay";
+};
+
+&dcic2 {
+       dcic_id = <1>;
+       dcic_mux = "dcic-lvds0";
+       status = "okay";
+};
+
 &hdmi_audio {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 05c27446ca05b0716ac0c5a0ef57749ecabdaa60..c2e97246ff96d2708abcfba6f7dfe2d035423bfc 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -447,6 +447,18 @@
        };
 };
 
+&dcic1 {
+       dcic_id = <0>;
+       dcic_mux = "dcic-hdmi";
+       status = "okay";
+};
+
+&dcic2 {
+       dcic_id = <1>;
+       dcic_mux = "dcic-lvds1";
+       status = "okay";
+};
+
 &hdmi_audio {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 40fc70d4490f2bdfbdbedba49e16dea873dcb98f..60f1b4591e12002916b3a64c03f1259f396d8824 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -733,13 +733,23 @@
                        };
 
                        dcic1: dcic@020e4000 {
+                               compatible = "fsl,imx6q-dcic";
                                reg = <0x020e4000 0x4000>;
                                interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6QDL_CLK_DCIC1>, <&clks IMX6QDL_CLK_DCIC1>;
+                               clock-names = "dcic", "disp-axi";
+                               gpr = <&gpr>;
+                               status = "disabled";
                        };
 
                        dcic2: dcic@020e8000 {
+                               compatible = "fsl,imx6q-dcic";
                                reg = <0x020e8000 0x4000>;
                                interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6QDL_CLK_DCIC2>, <&clks IMX6QDL_CLK_DCIC2>;
+                               clock-names = "dcic", "disp-axi";
+                               gpr = <&gpr>;
+                               status = "disabled";
                        };
 
                        sdma: sdma@020ec000 {