drm/i915/skl: Unexport skl_pw1_misc_io_init

On Broxton we need to enable/disable power well 1 during the init/unit
display sequence similarly to Skylake/Kabylake. The code for this will
be added in a follow-up patch, but to prepare for that unexport
skl_pw1_misc_io_init(). It's a simple function called only from a single
place and having it inlined in the Skylake display core init/unit
functions will make it easier to compare it with its Broxton
counterpart.

This also flips the order of Misc IO and power well 1 disabling which
matches the enabling order. The specification doesn't prescribe the
disabling order, so this should be fine.

v2:
- Fix incorrect enable vs. disable power well call in
  skl_display_core_uninit() (Patrik)
- Add commit comment about chaning the order of PW1 and Misc IO power
  well disabling (Patrik)

CC: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1459773777-10701-1-git-send-email-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e0fcfa1683cc5359d7d71d351fca82fff4108fa1..93e0141e36d71304bb591bde2d4a4c0cd045db33 100644 (file)
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1462,8 +1462,6 @@ int intel_power_domains_init(struct drm_i915_private *);
 void intel_power_domains_fini(struct drm_i915_private *);
 void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool resume);
 void intel_power_domains_suspend(struct drm_i915_private *dev_priv);
-void skl_pw1_misc_io_init(struct drm_i915_private *dev_priv);
-void skl_pw1_misc_io_fini(struct drm_i915_private *dev_priv);
 void intel_runtime_pm_enable(struct drm_i915_private *dev_priv);
 const char *
 intel_display_power_domain_str(enum intel_display_power_domain domain);

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 989b7747585b7c1a8d7c9f5bba2a80e9eb96331b..7fe2ba970777dbc3b733256c4de30ceb0df4fee2 100644 (file)
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -1936,34 +1936,6 @@ static struct i915_power_well skl_power_wells[] = {
        },
 };
 
-void skl_pw1_misc_io_init(struct drm_i915_private *dev_priv)
-{
-       struct i915_power_well *well;
-
-       if (!(IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)))
-               return;
-
-       well = lookup_power_well(dev_priv, SKL_DISP_PW_1);
-       intel_power_well_enable(dev_priv, well);
-
-       well = lookup_power_well(dev_priv, SKL_DISP_PW_MISC_IO);
-       intel_power_well_enable(dev_priv, well);
-}
-
-void skl_pw1_misc_io_fini(struct drm_i915_private *dev_priv)
-{
-       struct i915_power_well *well;
-
-       if (!(IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)))
-               return;
-
-       well = lookup_power_well(dev_priv, SKL_DISP_PW_1);
-       intel_power_well_disable(dev_priv, well);
-
-       well = lookup_power_well(dev_priv, SKL_DISP_PW_MISC_IO);
-       intel_power_well_disable(dev_priv, well);
-}
-
 static struct i915_power_well bxt_power_wells[] = {
        {
                .name = "always-on",
@@ -2154,9 +2126,10 @@ static void intel_power_domains_sync_hw(struct drm_i915_private *dev_priv)
 }
 
 static void skl_display_core_init(struct drm_i915_private *dev_priv,
-                                 bool resume)
+                                  bool resume)
 {
        struct i915_power_domains *power_domains = &dev_priv->power_domains;
+       struct i915_power_well *well;
        uint32_t val;
 
        gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
@@ -2167,7 +2140,13 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv,
 
        /* enable PG1 and Misc I/O */
        mutex_lock(&power_domains->lock);
-       skl_pw1_misc_io_init(dev_priv);
+
+       well = lookup_power_well(dev_priv, SKL_DISP_PW_1);
+       intel_power_well_enable(dev_priv, well);
+
+       well = lookup_power_well(dev_priv, SKL_DISP_PW_MISC_IO);
+       intel_power_well_enable(dev_priv, well);
+
        mutex_unlock(&power_domains->lock);
 
        if (!resume)
@@ -2182,6 +2161,7 @@ static void skl_display_core_init(struct drm_i915_private *dev_priv,
 static void skl_display_core_uninit(struct drm_i915_private *dev_priv)
 {
        struct i915_power_domains *power_domains = &dev_priv->power_domains;
+       struct i915_power_well *well;
 
        gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
 
@@ -2189,8 +2169,15 @@ static void skl_display_core_uninit(struct drm_i915_private *dev_priv)
 
        /* The spec doesn't call for removing the reset handshake flag */
        /* disable PG1 and Misc I/O */
+
        mutex_lock(&power_domains->lock);
-       skl_pw1_misc_io_fini(dev_priv);
+
+       well = lookup_power_well(dev_priv, SKL_DISP_PW_MISC_IO);
+       intel_power_well_disable(dev_priv, well);
+
+       well = lookup_power_well(dev_priv, SKL_DISP_PW_1);
+       intel_power_well_disable(dev_priv, well);
+
        mutex_unlock(&power_domains->lock);
 }