drm/amdgpu/soc15: drop support for reading some registers

The RB harvest registers are not necessary, the driver already
exposes this info via the info ioctl.  GB_BACKEND_MAP has
been deprecated since SI and is not relevant to the RB mapping.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index c839994d82d03b04a25074f4033f2fb491cd2bac..238fcc3fa78d5a85cd201282e7b0e398a189139f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -300,9 +300,6 @@ static struct amdgpu_allowed_register_entry soc15_allowed_read_registers[] = {
        { SOC15_REG_OFFSET(GC, 0, mmCP_CPC_STALLED_STAT1), false},
        { SOC15_REG_OFFSET(GC, 0, mmCP_CPC_STATUS), false},
        { SOC15_REG_OFFSET(GC, 0, mmGB_ADDR_CONFIG), false},
-       { SOC15_REG_OFFSET(GC, 0, mmCC_RB_BACKEND_DISABLE), false, true},
-       { SOC15_REG_OFFSET(GC, 0, mmGC_USER_RB_BACKEND_DISABLE), false, true},
-       { SOC15_REG_OFFSET(GC, 0, mmGB_BACKEND_MAP), false, false},
 };
 
 static uint32_t soc15_read_indexed_register(struct amdgpu_device *adev, u32 se_num,