arm64: dts: r8a7796: Remove unit-address and reg from integrated cache

The Cortex-A57 cache controller is an integrated controller, and thus
the device node representing it should not have a unit-addresses or reg
property.

Fixes: 1561f20760ec96db ("arm64: dts: r8a7796: Add Renesas R8A7796 SoC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index dbf82bc6ba648d6dc7ea1799f4c6780448b1a636..27f7dd9bd988d3b0793d1e1ae6ee9494592ea1fb 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -47,9 +47,8 @@
                        enable-method = "psci";
                };
 
-               L2_CA57: cache-controller@0 {
+               L2_CA57: cache-controller-0 {
                        compatible = "cache";
-                       reg = <0>;
                        power-domains = <&sysc R8A7796_PD_CA57_SCU>;
                        cache-unified;
                        cache-level = <2>;