xHCI: Clear PLC for USB2 root hub ports

commit 6fd4562178508a0949c9fdecd8558d8b10d671bd upstream.

When the link state changes, xHC will report a port status change event
and set the PORT_PLC bit, for both USB3 and USB2 root hub ports.

The PLC will be cleared by usbcore for USB3 root hub ports, but not for
USB2 ports, because they do not report USB_PORT_STAT_C_LINK_STATE in
wPortChange.

Clear it for USB2 root hub ports in handle_port_status().

Signed-off-by: Andiry Xu <andiry.xu@amd.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index cbf7ed01c72918d8cb52b40acb2cbce6b842115d..b20d2f7221c59d3042b49f5c981954c5b2637a55 100644 (file)
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -1359,6 +1359,10 @@ static void handle_port_status(struct xhci_hcd *xhci,
                }
        }
 
+       if (hcd->speed != HCD_USB3)
+               xhci_test_and_clear_bit(xhci, port_array, faked_port_index,
+                                       PORT_PLC);
+
 cleanup:
        /* Update event ring dequeue pointer before dropping the lock */
        inc_deq(xhci, xhci->event_ring, true);