]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
drm/amdgpu: remove explicit NULL init for parse_cs
authorChristian König <christian.koenig@amd.com>
Wed, 5 Oct 2016 12:23:00 +0000 (14:23 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 25 Oct 2016 18:38:36 +0000 (14:38 -0400)
sed -i "/\.parse_cs = NULL,/d" drivers/gpu/drm/amd/amdgpu/*.c

That's just a leftover from radeon.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
drivers/gpu/drm/amd/amdgpu/si_dma.c
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

index cb952acc71339e31ac613a896fd1c268b0f327dc..34e41590c5c895b9d292169202d96fa210ca5e10 100644 (file)
@@ -1228,7 +1228,6 @@ static const struct amdgpu_ring_funcs cik_sdma_ring_funcs = {
        .get_rptr = cik_sdma_ring_get_rptr,
        .get_wptr = cik_sdma_ring_get_wptr,
        .set_wptr = cik_sdma_ring_set_wptr,
-       .parse_cs = NULL,
        .emit_ib = cik_sdma_ring_emit_ib,
        .emit_fence = cik_sdma_ring_emit_fence,
        .emit_pipeline_sync = cik_sdma_ring_emit_pipeline_sync,
index e3be5bd7ec50e9513e9041ac05b7b4d85504bd1b..4e35e16d131133fd6861c25cb2320137f4a384db 100644 (file)
@@ -3258,7 +3258,6 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = {
        .get_rptr = gfx_v6_0_ring_get_rptr,
        .get_wptr = gfx_v6_0_ring_get_wptr,
        .set_wptr = gfx_v6_0_ring_set_wptr_gfx,
-       .parse_cs = NULL,
        .emit_ib = gfx_v6_0_ring_emit_ib,
        .emit_fence = gfx_v6_0_ring_emit_fence,
        .emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync,
@@ -3277,7 +3276,6 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_compute = {
        .get_rptr = gfx_v6_0_ring_get_rptr,
        .get_wptr = gfx_v6_0_ring_get_wptr,
        .set_wptr = gfx_v6_0_ring_set_wptr_compute,
-       .parse_cs = NULL,
        .emit_ib = gfx_v6_0_ring_emit_ib,
        .emit_fence = gfx_v6_0_ring_emit_fence,
        .emit_pipeline_sync = gfx_v6_0_ring_emit_pipeline_sync,
index e239e1db3ab01902b25e074aa29348742f69315f..9a54ea982b878e828d3d1d5e510ed385cfe22459 100644 (file)
@@ -5147,7 +5147,6 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_gfx = {
        .get_rptr = gfx_v7_0_ring_get_rptr,
        .get_wptr = gfx_v7_0_ring_get_wptr_gfx,
        .set_wptr = gfx_v7_0_ring_set_wptr_gfx,
-       .parse_cs = NULL,
        .emit_ib = gfx_v7_0_ring_emit_ib_gfx,
        .emit_fence = gfx_v7_0_ring_emit_fence_gfx,
        .emit_pipeline_sync = gfx_v7_0_ring_emit_pipeline_sync,
@@ -5168,7 +5167,6 @@ static const struct amdgpu_ring_funcs gfx_v7_0_ring_funcs_compute = {
        .get_rptr = gfx_v7_0_ring_get_rptr,
        .get_wptr = gfx_v7_0_ring_get_wptr_compute,
        .set_wptr = gfx_v7_0_ring_set_wptr_compute,
-       .parse_cs = NULL,
        .emit_ib = gfx_v7_0_ring_emit_ib_compute,
        .emit_fence = gfx_v7_0_ring_emit_fence_compute,
        .emit_pipeline_sync = gfx_v7_0_ring_emit_pipeline_sync,
index bb17538ff109c036448b59c69f1652cea474569d..404c49c45b03f36b33aa2e706bbf99fbe4ef90aa 100644 (file)
@@ -6568,7 +6568,6 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = {
        .get_rptr = gfx_v8_0_ring_get_rptr,
        .get_wptr = gfx_v8_0_ring_get_wptr_gfx,
        .set_wptr = gfx_v8_0_ring_set_wptr_gfx,
-       .parse_cs = NULL,
        .emit_ib = gfx_v8_0_ring_emit_ib_gfx,
        .emit_fence = gfx_v8_0_ring_emit_fence_gfx,
        .emit_pipeline_sync = gfx_v8_0_ring_emit_pipeline_sync,
@@ -6590,7 +6589,6 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = {
        .get_rptr = gfx_v8_0_ring_get_rptr,
        .get_wptr = gfx_v8_0_ring_get_wptr_compute,
        .set_wptr = gfx_v8_0_ring_set_wptr_compute,
-       .parse_cs = NULL,
        .emit_ib = gfx_v8_0_ring_emit_ib_compute,
        .emit_fence = gfx_v8_0_ring_emit_fence_compute,
        .emit_pipeline_sync = gfx_v8_0_ring_emit_pipeline_sync,
index 565dab3c72186704542b3763fbcdcecb9a6e9cf9..16cc1f5d0d4ecbed43aaf9030ea72e7192a2393e 100644 (file)
@@ -1225,7 +1225,6 @@ static const struct amdgpu_ring_funcs sdma_v2_4_ring_funcs = {
        .get_rptr = sdma_v2_4_ring_get_rptr,
        .get_wptr = sdma_v2_4_ring_get_wptr,
        .set_wptr = sdma_v2_4_ring_set_wptr,
-       .parse_cs = NULL,
        .emit_ib = sdma_v2_4_ring_emit_ib,
        .emit_fence = sdma_v2_4_ring_emit_fence,
        .emit_pipeline_sync = sdma_v2_4_ring_emit_pipeline_sync,
index a9d10941fb53d9ab2290fd6bdbe3351d91b0acaa..2c2f24fff64b9fa64f9de485a357ac258360fccd 100644 (file)
@@ -1568,7 +1568,6 @@ static const struct amdgpu_ring_funcs sdma_v3_0_ring_funcs = {
        .get_rptr = sdma_v3_0_ring_get_rptr,
        .get_wptr = sdma_v3_0_ring_get_wptr,
        .set_wptr = sdma_v3_0_ring_set_wptr,
-       .parse_cs = NULL,
        .emit_ib = sdma_v3_0_ring_emit_ib,
        .emit_fence = sdma_v3_0_ring_emit_fence,
        .emit_pipeline_sync = sdma_v3_0_ring_emit_pipeline_sync,
index de358193a8f9d07927cb70f45901fd182f0f94e3..9f11e37920777ff5b0d7ee07a1da1838edeab4ca 100644 (file)
@@ -783,7 +783,6 @@ static const struct amdgpu_ring_funcs si_dma_ring_funcs = {
        .get_rptr = si_dma_ring_get_rptr,
        .get_wptr = si_dma_ring_get_wptr,
        .set_wptr = si_dma_ring_set_wptr,
-       .parse_cs = NULL,
        .emit_ib = si_dma_ring_emit_ib,
        .emit_fence = si_dma_ring_emit_fence,
        .emit_pipeline_sync = si_dma_ring_emit_pipeline_sync,
index ab3df6d756562ee33b97d2c48aaf6f7bfadc6f2a..f74229496cc7f60e183192c190709911ace6b2d6 100644 (file)
@@ -1070,7 +1070,6 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_vm_funcs = {
        .get_rptr = uvd_v6_0_ring_get_rptr,
        .get_wptr = uvd_v6_0_ring_get_wptr,
        .set_wptr = uvd_v6_0_ring_set_wptr,
-       .parse_cs = NULL,
        .emit_ib = uvd_v6_0_ring_emit_ib,
        .emit_fence = uvd_v6_0_ring_emit_fence,
        .emit_vm_flush = uvd_v6_0_ring_emit_vm_flush,
index 8533269ec1606f1ed26714d9655a5eae20b49421..e76bc092becc675c595c92a521f47b0f5bdbf172 100644 (file)
@@ -870,7 +870,6 @@ static const struct amdgpu_ring_funcs vce_v3_0_ring_vm_funcs = {
        .get_rptr = vce_v3_0_ring_get_rptr,
        .get_wptr = vce_v3_0_ring_get_wptr,
        .set_wptr = vce_v3_0_ring_set_wptr,
-       .parse_cs = NULL,
        .emit_ib = vce_v3_0_ring_emit_ib,
        .emit_vm_flush = vce_v3_0_emit_vm_flush,
        .emit_pipeline_sync = vce_v3_0_emit_pipeline_sync,