]> git.kernelconcepts.de Git - karo-tx-linux.git/commitdiff
arm64: tegra: Use symbolic reset identifiers
authorThierry Reding <treding@nvidia.com>
Mon, 21 Nov 2016 09:25:31 +0000 (10:25 +0100)
committerThierry Reding <treding@nvidia.com>
Fri, 27 Jan 2017 09:13:24 +0000 (10:13 +0100)
Now that the corresponding device tree binding include has been merged,
convert the DTS files to use symbolic names instead of numeric ones.

Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra186.dtsi

index 910315f579c4c7f9130cfc05dd0227a561c30a35..62fa85ae02718f214903e0229454af70dc48b8f9 100644 (file)
@@ -2,6 +2,7 @@
 #include <dt-bindings/gpio/tegra186-gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/mailbox/tegra186-hsp.h>
+#include <dt-bindings/reset/tegra186-reset.h>
 
 / {
        compatible = "nvidia,tegra186";
@@ -33,7 +34,7 @@
                interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_UARTA>;
                clock-names = "serial";
-               resets = <&bpmp 47>;
+               resets = <&bpmp TEGRA186_RESET_UARTA>;
                reset-names = "serial";
                status = "disabled";
        };
@@ -45,7 +46,7 @@
                interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_UARTB>;
                clock-names = "serial";
-               resets = <&bpmp 48>;
+               resets = <&bpmp TEGRA186_RESET_UARTB>;
                reset-names = "serial";
                status = "disabled";
        };
@@ -57,7 +58,7 @@
                interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_UARTD>;
                clock-names = "serial";
-               resets = <&bpmp 50>;
+               resets = <&bpmp TEGRA186_RESET_UARTD>;
                reset-names = "serial";
                status = "disabled";
        };
@@ -69,7 +70,7 @@
                interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_UARTE>;
                clock-names = "serial";
-               resets = <&bpmp 132>;
+               resets = <&bpmp TEGRA186_RESET_UARTE>;
                reset-names = "serial";
                status = "disabled";
        };
@@ -81,7 +82,7 @@
                interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_UARTF>;
                clock-names = "serial";
-               resets = <&bpmp 111>;
+               resets = <&bpmp TEGRA186_RESET_UARTF>;
                reset-names = "serial";
                status = "disabled";
        };
@@ -94,7 +95,7 @@
                #size-cells = <0>;
                clocks = <&bpmp TEGRA186_CLK_I2C1>;
                clock-names = "div-clk";
-               resets = <&bpmp 19>;
+               resets = <&bpmp TEGRA186_RESET_I2C1>;
                reset-names = "i2c";
                status = "disabled";
        };
                #size-cells = <0>;
                clocks = <&bpmp TEGRA186_CLK_I2C3>;
                clock-names = "div-clk";
-               resets = <&bpmp 21>;
+               resets = <&bpmp TEGRA186_RESET_I2C3>;
                reset-names = "i2c";
                status = "disabled";
        };
                #size-cells = <0>;
                clocks = <&bpmp TEGRA186_CLK_I2C4>;
                clock-names = "div-clk";
-               resets = <&bpmp 22>;
+               resets = <&bpmp TEGRA186_RESET_I2C4>;
                reset-names = "i2c";
                status = "disabled";
        };
                #size-cells = <0>;
                clocks = <&bpmp TEGRA186_CLK_I2C5>;
                clock-names = "div-clk";
-               resets = <&bpmp 23>;
+               resets = <&bpmp TEGRA186_RESET_I2C5>;
                reset-names = "i2c";
                status = "disabled";
        };
                #size-cells = <0>;
                clocks = <&bpmp TEGRA186_CLK_I2C6>;
                clock-names = "div-clk";
-               resets = <&bpmp 24>;
+               resets = <&bpmp TEGRA186_RESET_I2C6>;
                reset-names = "i2c";
                status = "disabled";
        };
                #size-cells = <0>;
                clocks = <&bpmp TEGRA186_CLK_I2C7>;
                clock-names = "div-clk";
-               resets = <&bpmp 81>;
+               resets = <&bpmp TEGRA186_RESET_I2C7>;
                reset-names = "i2c";
                status = "disabled";
        };
                #size-cells = <0>;
                clocks = <&bpmp TEGRA186_CLK_I2C9>;
                clock-names = "div-clk";
-               resets = <&bpmp 83>;
+               resets = <&bpmp TEGRA186_RESET_I2C9>;
                reset-names = "i2c";
                status = "disabled";
        };
                interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_SDMMC1>;
                clock-names = "sdhci";
-               resets = <&bpmp 33>;
+               resets = <&bpmp TEGRA186_RESET_SDMMC1>;
                reset-names = "sdhci";
                status = "disabled";
        };
                interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_SDMMC2>;
                clock-names = "sdhci";
-               resets = <&bpmp 34>;
+               resets = <&bpmp TEGRA186_RESET_SDMMC2>;
                reset-names = "sdhci";
                status = "disabled";
        };
                interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_SDMMC3>;
                clock-names = "sdhci";
-               resets = <&bpmp 35>;
+               resets = <&bpmp TEGRA186_RESET_SDMMC3>;
                reset-names = "sdhci";
                status = "disabled";
        };
                interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_SDMMC4>;
                clock-names = "sdhci";
-               resets = <&bpmp 36>;
+               resets = <&bpmp TEGRA186_RESET_SDMMC4>;
                reset-names = "sdhci";
                status = "disabled";
        };
                #size-cells = <0>;
                clocks = <&bpmp TEGRA186_CLK_I2C2>;
                clock-names = "div-clk";
-               resets = <&bpmp 20>;
+               resets = <&bpmp TEGRA186_RESET_I2C2>;
                reset-names = "i2c";
                status = "disabled";
        };
                #size-cells = <0>;
                clocks = <&bpmp TEGRA186_CLK_I2C8>;
                clock-names = "div-clk";
-               resets = <&bpmp 82>;
+               resets = <&bpmp TEGRA186_RESET_I2C8>;
                reset-names = "i2c";
                status = "disabled";
        };
                interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_UARTC>;
                clock-names = "serial";
-               resets = <&bpmp 49>;
+               resets = <&bpmp TEGRA186_RESET_UARTC>;
                reset-names = "serial";
                status = "disabled";
        };
                interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&bpmp TEGRA186_CLK_UARTG>;
                clock-names = "serial";
-               resets = <&bpmp 112>;
+               resets = <&bpmp TEGRA186_RESET_UARTG>;
                reset-names = "serial";
                status = "disabled";
        };