MLK-9772-3 ARM: dts: imx6qdl-sabresd: add mipi camera ov564x support

Add mipi camera ov5640 support

Signed-off-by: Robby Cai <r63905@freescale.com>

diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 5d9b38060067e7c08f2c8ec0e3319cfd4b5d7e65..cae9b2d0d2854e953f2bc92407850597e181f520 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -454,6 +454,22 @@
                        };
                };
        };
+
+       ov5640_mipi: ov5640_mipi@3c { /* i2c2 driver */
+               compatible = "ovti,ov5640_mipi";
+               reg = <0x3c>;
+               clocks = <&clks 201>;
+               clock-names = "csi_mclk";
+               DOVDD-supply = <&vgen4_reg>; /* 1.8v */
+               AVDD-supply = <&vgen3_reg>;  /* 2.8v, rev C board is VGEN3
+                                               rev B board is VGEN5 */
+               DVDD-supply = <&vgen2_reg>;  /* 1.5v*/
+               pwn-gpios = <&gpio1 19 1>;   /* active low: SD1_CLK */
+               rst-gpios = <&gpio1 20 0>;   /* active high: SD1_DAT2 */
+               csi_id = <1>;
+               mclk = <24000000>;
+               mclk_source = <0>;
+       };
 };
 
 &i2c3 {
@@ -832,6 +848,14 @@
        };
 };
 
+&mipi_csi {
+       status = "okay";
+       ipu_id = <0>;
+       csi_id = <1>;
+       v_channel = <0>;
+       lanes = <2>;
+};
+
 &mipi_dsi {
        dev_id = <0>;
        disp_id = <1>;

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 7c23cc6a202dd055cae91f4f38ea63cf17549a65..cfe8c68429245634f03a5cfd4e0dd0c686abf34a 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -1029,8 +1029,18 @@
                                status = "disabled";
                        };
 
-                       mipi@021dc000 { /* MIPI-CSI */
+                       mipi_csi: mipi_csi@021dc000 { /* MIPI-CSI */
+                               compatible = "fsl,imx6q-mipi-csi2";
                                reg = <0x021dc000 0x4000>;
+                               interrupts = <0 100 0x04>, <0 101 0x04>;
+                               clocks = <&clks 138>, <&clks 53>, <&clks 204>;
+                               /* Note: clks 138 is hsi_tx, however, the dphy_c
+                                * hsi_tx and pll_refclk use the same clk gate.
+                                * In current clk driver, open/close clk gate do
+                                * use hsi_tx for a temporary debug purpose.
+                                */
+                               clock-names = "dphy_clk", "pixel_clk", "cfg_clk";
+                               status = "disabled";
                        };
 
                        mipi@021e0000 { /* MIPI-DSI */