include NAND pad setup in DCD

diff --git a/board/karo/tx6q/lowlevel_init.S b/board/karo/tx6q/lowlevel_init.S
index 7cb72e185b57a265ba073b3f15bfb98762dc5f09..4785e9dc5ba7b278becd248df42ede8d7ab127fd 100644 (file)
--- a/board/karo/tx6q/lowlevel_init.S
+++ b/board/karo/tx6q/lowlevel_init.S
@@ -339,7 +339,7 @@ dcd_start:
        MXC_DCD_ITEM(0x020e02c0, 0x00000001)    /* UART1 CTS */
        MXC_DCD_ITEM(0x020e02c4, 0x00000001)    /* UART1 RTS */
        MXC_DCD_ITEM(0x020e091c, 0x00000003)    /* UART1 RTS INPUT_SEL */
-#if 0
+
        /* NAND */
        MXC_DCD_ITEM(0x020e02d4, 0x00000000)    /* NANDF_CLE: NANDF_CLE */
        MXC_DCD_ITEM(0x020e02d8, 0x00000000)    /* NANDF_ALE: NANDF_ALE */
@@ -356,7 +356,7 @@ dcd_start:
        MXC_DCD_ITEM(0x020e0310, 0x00000000)    /* NANDF_D5: NANDF_D5 */
        MXC_DCD_ITEM(0x020e0314, 0x00000000)    /* NANDF_D6: NANDF_D6 */
        MXC_DCD_ITEM(0x020e0318, 0x00000000)    /* NANDF_D7: NANDF_D7 */
-#endif
+
        /* ext. mem CS */
        MXC_DCD_ITEM(0x020e02ec, 0x00000000)    /* NANDF_CS2: NANDF_CS2 */
        /* DRAM_DQM[0..7] */