bcm47xx: fix irq assignment for new SoCs.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c
index 325757acd020932670f4bc68ee5b62ee7ad36746..8cf3833b2d293626189b0d1a8f130e6fe726ae37 100644 (file)
--- a/arch/mips/bcm47xx/irq.c
+++ b/arch/mips/bcm47xx/irq.c
@@ -26,6 +26,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <asm/irq_cpu.h>
+#include <bcm47xx.h>
 
 void plat_irq_dispatch(void)
 {
@@ -51,5 +52,16 @@ void plat_irq_dispatch(void)
 
 void __init arch_init_irq(void)
 {
+#ifdef CONFIG_BCM47XX_BCMA
+       if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
+               bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core,
+                            BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31);
+               /*
+                * the kernel reads the timer irq from some register and thinks
+                * it's #5, but we offset it by 2 and route to #7
+                */
+               cp0_compare_irq = 7;
+       }
+#endif
        mips_cpu_irq_init();
 }