EDAC, i5000, i5400: Fix definition of NRECMEMB register

In the i5000 and i5400 drivers, the NRECMEMB register is defined as a
16-bit value, which results in wrong shifts in the code, as reported by
sparse.

In the datasheets ([1], section 3.9.22.20 and [2], section 3.9.22.21),
this register is a 32-bit register. A u32 value for the register fixes
the wrong shifts warnings and matches the datasheet.

Also fix the mask to access to the CAS bits [27:16] in the i5000 driver.

[1]: https://www.intel.com/content/dam/doc/datasheet/5000p-5000v-5000z-chipset-memory-controller-hub-datasheet.pdf
[2]: https://www.intel.se/content/dam/doc/datasheet/5400-chipset-memory-controller-hub-datasheet.pdf

Signed-off-by: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/20170629005729.8478-1-jeremy.lefaure@lse.epita.fr
Signed-off-by: Borislav Petkov <bp@suse.de>

diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
index f683919981b06730090c2a11b98d45a5c0713944..8f5a56e25bd29fb6bd41feb97a7c2e4f4b433cdb 100644 (file)
--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c
@@ -227,7 +227,7 @@
 #define                        NREC_RDWR(x)            (((x)>>11) & 1)
 #define                        NREC_RANK(x)            (((x)>>8) & 0x7)
 #define                NRECMEMB                0xC0
-#define                        NREC_CAS(x)             (((x)>>16) & 0xFFFFFF)
+#define                        NREC_CAS(x)             (((x)>>16) & 0xFFF)
 #define                        NREC_RAS(x)             ((x) & 0x7FFF)
 #define                NRECFGLOG               0xC4
 #define                NREEECFBDA              0xC8
@@ -371,7 +371,7 @@ struct i5000_error_info {
        /* These registers are input ONLY if there was a
         * Non-Recoverable Error */
        u16 nrecmema;           /* Non-Recoverable Mem log A */
-       u16 nrecmemb;           /* Non-Recoverable Mem log B */
+       u32 nrecmemb;           /* Non-Recoverable Mem log B */
 
 };
 
@@ -407,7 +407,7 @@ static void i5000_get_error_info(struct mem_ctl_info *mci,
                                NERR_FAT_FBD, &info->nerr_fat_fbd);
                pci_read_config_word(pvt->branchmap_werrors,
                                NRECMEMA, &info->nrecmema);
-               pci_read_config_word(pvt->branchmap_werrors,
+               pci_read_config_dword(pvt->branchmap_werrors,
                                NRECMEMB, &info->nrecmemb);
 
                /* Clear the error bits, by writing them back */

diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c
index 37a9ba71da449bab30c12438325ecc419d9fa3e8..cd889edc851665fcf4870e78eec7082ec85dc097 100644 (file)
--- a/drivers/edac/i5400_edac.c
+++ b/drivers/edac/i5400_edac.c
@@ -368,7 +368,7 @@ struct i5400_error_info {
 
        /* These registers are input ONLY if there was a Non-Rec Error */
        u16 nrecmema;           /* Non-Recoverable Mem log A */
-       u16 nrecmemb;           /* Non-Recoverable Mem log B */
+       u32 nrecmemb;           /* Non-Recoverable Mem log B */
 
 };
 
@@ -458,7 +458,7 @@ static void i5400_get_error_info(struct mem_ctl_info *mci,
                                NERR_FAT_FBD, &info->nerr_fat_fbd);
                pci_read_config_word(pvt->branchmap_werrors,
                                NRECMEMA, &info->nrecmema);
-               pci_read_config_word(pvt->branchmap_werrors,
+               pci_read_config_dword(pvt->branchmap_werrors,
                                NRECMEMB, &info->nrecmemb);
 
                /* Clear the error bits, by writing them back */