ARC: [dts] Add clk feeding into timers to DTs

This allows us to introduce timers in DT in next commit

The core clk frequency hack in AXS103 platform is also extended,
where the core clk feeding into timers is updated in-place in FDT.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi
index e7a83d19c5a37d0ecf0344a8ae5905b782e6605d..40bcecfc368706dfb600f7f82636ed4d0fd43d92 100644 (file)
--- a/arch/arc/boot/dts/axc001.dtsi
+++ b/arch/arc/boot/dts/axc001.dtsi
@@ -26,6 +26,12 @@
 
                ranges = <0x00000000 0xf0000000 0x10000000>;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <750000000>;
+               };
+
                core_intc: arc700-intc@cpu {
                        compatible = "snps,arc700-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index b0e3ccdf8fc79608b04707529b87797188835ebe..cabe0deeb2d880d3fab56d419d95f9592b3536a2 100644 (file)
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -25,6 +25,12 @@
 
                ranges = <0x00000000 0xf0000000 0x10000000>;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <90000000>;
+               };
+
                core_intc: archs-intc@cpu {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
index f87ae409c8ed2b0660e815117dc4a2bd4b49e0cf..8955881db794e32f875f06749a23fa39d66e646d 100644 (file)
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -25,6 +25,12 @@
 
                ranges = <0x00000000 0xf0000000 0x10000000>;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <90000000>;
+               };
+
                core_intc: archs-intc@cpu {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/nsim_700.dts b/arch/arc/boot/dts/nsim_700.dts
index 987921f711c1791fb5d4855fe53c6ffe064181ab..5d5e373e0ebc579c7f734d42212965c8187fa003 100644 (file)
--- a/arch/arc/boot/dts/nsim_700.dts
+++ b/arch/arc/boot/dts/nsim_700.dts
@@ -32,6 +32,12 @@
                /* child and parent address space 1:1 mapped */
                ranges;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <80000000>;
+               };
+
                core_intc: interrupt-controller {
                        compatible = "snps,arc700-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/nsim_hs.dts b/arch/arc/boot/dts/nsim_hs.dts
index d2f60f826bd2fe38806e07885f02bf4a6d1ac0ae..bf05fe5f67b07f41c2fd98e0956ed73c64e41d55 100644 (file)
--- a/arch/arc/boot/dts/nsim_hs.dts
+++ b/arch/arc/boot/dts/nsim_hs.dts
@@ -39,6 +39,12 @@
                         bus addr,   parent bus addr, size */
                ranges = <0x80000000 0x0 0x80000000 0x80000000>;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <80000000>;
+               };
+
                core_intc: core-interrupt-controller {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/nsim_hs_idu.dts b/arch/arc/boot/dts/nsim_hs_idu.dts
index cc82781727a1ef17e68dc8342b18d348c061aaec..99eabe1a2bf6f05216b1841e27492eaaad001bfc 100644 (file)
--- a/arch/arc/boot/dts/nsim_hs_idu.dts
+++ b/arch/arc/boot/dts/nsim_hs_idu.dts
@@ -29,6 +29,12 @@
                /* child and parent address space 1:1 mapped */
                ranges;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <80000000>;
+               };
+
                core_intc: core-interrupt-controller {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/nsimosci.dts b/arch/arc/boot/dts/nsimosci.dts
index d5a6dd9084a81f3c230e7f4ae58bd45be7c1973f..b5b060adce8a60dbde7778f0765720bd4617e724 100644 (file)
--- a/arch/arc/boot/dts/nsimosci.dts
+++ b/arch/arc/boot/dts/nsimosci.dts
@@ -35,6 +35,12 @@
                /* child and parent address space 1:1 mapped */
                ranges;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <20000000>;
+               };
+
                core_intc: interrupt-controller {
                        compatible = "snps,arc700-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/nsimosci_hs.dts b/arch/arc/boot/dts/nsimosci_hs.dts
index 983f6915d4aee49fe763b09a0ed541e895e4dd69..325e73090a18157ca286a2916c8950d760abaf8e 100644 (file)
--- a/arch/arc/boot/dts/nsimosci_hs.dts
+++ b/arch/arc/boot/dts/nsimosci_hs.dts
@@ -35,6 +35,12 @@
                /* child and parent address space 1:1 mapped */
                ranges;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <20000000>;
+               };
+
                core_intc: core-interrupt-controller {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/nsimosci_hs_idu.dts b/arch/arc/boot/dts/nsimosci_hs_idu.dts
index fd675303f79236bfb348c1761e6764160dddabdc..ee03d71265816db05c43841d8a0e0981c6ca62c4 100644 (file)
--- a/arch/arc/boot/dts/nsimosci_hs_idu.dts
+++ b/arch/arc/boot/dts/nsimosci_hs_idu.dts
@@ -33,6 +33,12 @@
                /* child and parent address space 1:1 mapped */
                ranges;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <5000000>;
+               };
+
                core_intc: core-interrupt-controller {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/vdk_axc003.dtsi b/arch/arc/boot/dts/vdk_axc003.dtsi
index 035759ee62a51530c902e7ea16842b610f11d47e..ad4ee43bd2ac7700ee93d1c05ee7c84e474c4829 100644 (file)
--- a/arch/arc/boot/dts/vdk_axc003.dtsi
+++ b/arch/arc/boot/dts/vdk_axc003.dtsi
@@ -25,6 +25,12 @@
 
                ranges = <0x00000000 0xf0000000 0x10000000>;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <50000000>;
+               };
+
                core_intc: archs-intc@cpu {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/boot/dts/vdk_axc003_idu.dtsi b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
index 90e18f4048890bbf8746f3459ad32d54abf405c8..a3cb6263c581ea8a030bad036ec1ddebfc2b25f9 100644 (file)
--- a/arch/arc/boot/dts/vdk_axc003_idu.dtsi
+++ b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
@@ -26,6 +26,12 @@
 
                ranges = <0x00000000 0xf0000000 0x10000000>;
 
+               core_clk: core_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <50000000>;
+               };
+
                core_intc: archs-intc@cpu {
                        compatible = "snps,archs-intc";
                        interrupt-controller;

diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
index 8e7f50a8b85771f2153c29016082ae22947b260a..f90fac271d166c8c3c6b5415b84df827cfc60961 100644 (file)
--- a/arch/arc/plat-axs10x/axs10x.c
+++ b/arch/arc/plat-axs10x/axs10x.c
@@ -14,7 +14,9 @@
  *
  */
 
+#include <linux/of_fdt.h>
 #include <linux/of_platform.h>
+#include <linux/libfdt.h>
 
 #include <asm/asm-offsets.h>
 #include <asm/clk.h>
@@ -389,7 +391,12 @@ axs103_set_freq(unsigned int id, unsigned int fd, unsigned int od)
 
 static void __init axs103_early_init(void)
 {
-       u32 freq = arc_get_core_freq(), orig = freq;
+       int offset = fdt_path_offset(initial_boot_params, "/cpu_card/core_clk");
+       const struct fdt_property *prop = fdt_get_property(initial_boot_params,
+                                                          offset,
+                                                          "clock-frequency",
+                                                          NULL);
+       u32 freq = be32_to_cpu(*(u32*)(prop->data)) / 1000000, orig = freq;
 
        /*
         * AXS103 configurations for SMP/QUAD configurations share device tree
@@ -438,8 +445,13 @@ static void __init axs103_early_init(void)
        }
 
        pr_info("Freq is %dMHz\n", freq);
+
+       /* Patching .dtb in-place with new core clock value */
        if (freq != orig ) {
                arc_set_core_freq(freq * 1000000);
+               freq = cpu_to_be32(freq * 1000000);
+               fdt_setprop_inplace(initial_boot_params, offset,
+                                   "clock-frequency", &freq, sizeof(freq));
        }
 
        /* Memory maps already config in pre-bootloader */