ARM: DRA7: hwmod: Add data for DES IP

DRA7 SoC contains DES crypto hardware accelerator. Add hwmod data for
this IP so that it can be utilized by crypto frameworks.

Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 1ab7096af8e23c239c247f4bca8a39d66b955a9f..e89a7ecdc5677076572b125079ad5a1e1b545119 100644 (file)
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -2541,6 +2541,34 @@ static struct omap_hwmod dra7xx_uart10_hwmod = {
        },
 };
 
+/* DES (the 'P' (public) device) */
+static struct omap_hwmod_class_sysconfig dra7xx_des_sysc = {
+       .rev_offs       = 0x0030,
+       .sysc_offs      = 0x0034,
+       .syss_offs      = 0x0038,
+       .sysc_flags     = SYSS_HAS_RESET_STATUS,
+};
+
+static struct omap_hwmod_class dra7xx_des_hwmod_class = {
+       .name   = "des",
+       .sysc   = &dra7xx_des_sysc,
+};
+
+/* DES */
+static struct omap_hwmod dra7xx_des_hwmod = {
+       .name           = "des",
+       .class          = &dra7xx_des_hwmod_class,
+       .clkdm_name     = "l4sec_clkdm",
+       .main_clk       = "l3_iclk_div",
+       .prcm = {
+               .omap4 = {
+                       .clkctrl_offs = DRA7XX_CM_L4SEC_DES3DES_CLKCTRL_OFFSET,
+                       .context_offs = DRA7XX_RM_L4SEC_DES3DES_CONTEXT_OFFSET,
+                       .modulemode   = MODULEMODE_HWCTRL,
+               },
+       },
+};
+
 /*
  * 'usb_otg_ss' class
  *
@@ -3642,6 +3670,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart7 = {
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_per1 -> des */
+static struct omap_hwmod_ocp_if dra7xx_l4_per1__des = {
+       .master         = &dra7xx_l4_per1_hwmod,
+       .slave          = &dra7xx_des_hwmod,
+       .clk            = "l3_iclk_div",
+       .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* l4_per2 -> uart8 */
 static struct omap_hwmod_ocp_if dra7xx_l4_per2__uart8 = {
        .master         = &dra7xx_l4_per2_hwmod,
@@ -3875,6 +3911,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
        &dra7xx_l4_per2__uart8,
        &dra7xx_l4_per2__uart9,
        &dra7xx_l4_wkup__uart10,
+       &dra7xx_l4_per1__des,
        &dra7xx_l4_per3__usb_otg_ss1,
        &dra7xx_l4_per3__usb_otg_ss2,
        &dra7xx_l4_per3__usb_otg_ss3,