From: Hauke Mehrtens Date: Wed, 28 Oct 2015 22:37:41 +0000 (+0100) Subject: MIPS: Lantiq: Add 1e103100.deu clock X-Git-Tag: v4.4-rc1~6^2~39 X-Git-Url: https://git.kernelconcepts.de/?a=commitdiff_plain;h=e71f6d356dccce4ba49a402bf7e9cb44671787cb;p=karo-tx-linux.git MIPS: Lantiq: Add 1e103100.deu clock Signed-off-by: Hauke Mehrtens Acked-by: John Crispin Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11392/ Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c index 9abb76b5722e..d77bb3ba6219 100644 --- a/arch/mips/lantiq/xway/sysctrl.c +++ b/arch/mips/lantiq/xway/sysctrl.c @@ -107,6 +107,7 @@ static u32 pmu_clk_cr_b[] = { #define PMU_ASC1 BIT(17) #define PMU_PPE_QSB BIT(18) #define PMU_PPE_SLL01 BIT(19) +#define PMU_DEU BIT(20) #define PMU_PPE_TC BIT(21) #define PMU_PPE_EMA BIT(22) #define PMU_PPE_DPLUM BIT(23) @@ -508,6 +509,7 @@ void __init ltq_soc_init(void) clkdev_add_pmu("1a800000.pcie", "ctl", 1, 1, PMU1_PCIE2_CTL); clkdev_add_pmu("1e108000.eth", NULL, 1, 0, PMU_SWITCH | PMU_PPE_DP); clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF); + clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); } else if (of_machine_is_compatible("lantiq,ar10")) { clkdev_add_static(ltq_ar10_cpu_hz(), ltq_ar10_fpi_hz(), ltq_ar10_fpi_hz(), ltq_ar10_pp32_hz()); @@ -517,6 +519,7 @@ void __init ltq_soc_init(void) PMU_PPE_DP | PMU_PPE_TC); clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF); clkdev_add_pmu("1f203000.rcu", "gphy", 1, 0, PMU_GPHY); + clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); clkdev_add_pmu("1e116000.mei", "afe", 1, 2, PMU_ANALOG_DSL_AFE); clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE); } else if (of_machine_is_compatible("lantiq,vr9")) { @@ -540,6 +543,7 @@ void __init ltq_soc_init(void) PMU_PPE_QSB | PMU_PPE_TOP); clkdev_add_pmu("1f203000.rcu", "gphy", 1, 0, PMU_GPHY); clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); + clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE); } else if (of_machine_is_compatible("lantiq,ar9")) { clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(), @@ -550,6 +554,7 @@ void __init ltq_soc_init(void) clkdev_add_pmu("1e106000.usb", "phy", 1, 0, PMU_USB1_P); clkdev_add_pmu("1e180000.etop", "switch", 1, 0, PMU_SWITCH); clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); + clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE); } else { clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(), @@ -557,6 +562,7 @@ void __init ltq_soc_init(void) clkdev_add_pmu("1e101000.usb", "ctl", 1, 0, PMU_USB0); clkdev_add_pmu("1e101000.usb", "phy", 1, 0, PMU_USB0_P); clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); + clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE); } }