ENGR00220496 MX6SL:Add low power IDLE mode optimizations.
Add support for DDR freq change code in IRAM.
Change PLL2 to bypass mode so that DDR is running off 24MHz OSC
directly.
ARM is now sourced from PLL1 (running at 800MHz) in this mode.
This is required for the next step in IDLE mode optmization
where all PLLs will be disabled when ARM enters WFI.
make shi [Thu, 16 Aug 2012 07:44:11 +0000 (15:44 +0800)]
ENGR00220440 Mx6:USB device: clear OWIE before phy out of low power mode
There is a limitation on mx6 phy low power flow. During phy enter low power mode
and out of low power mode with OWIE bit active,there will be abnormal usb wakeup
interrupt happen. So we should clear OWIE bit before phy out of low power mode.
Chen Liangjun [Thu, 16 Aug 2012 11:31:49 +0000 (19:31 +0800)]
ENGR00219926-2 ASRC: use PAIR B for ASRC ideal ratio convert
When use ASRC ideal ratio mode for convert, PAIR C can't work properly.
However, when use PAIR C for internal ratio mode or non ratio mode
convert, it can work properly.
In this patch, Use PAIR B for 6 channel convert as a workaround.
Chen Liangjun [Thu, 16 Aug 2012 11:20:51 +0000 (19:20 +0800)]
ENGR00219926-1 ESAI ASRC: use ideal ratio for ASRC P2P playback
When use no ideal-ratio mode for ESAI playback, CPU should provide
accurate clock for input clock, which means input clock should be
divided by input sample rate. However, all our clock is from 24M crystal
and if the input sample rate equal to 44.1k or so, CPU can't provide
these clock.
In this patch, use ideal ratio mode thus CPU need not provide accurate
clock which can be divided by 44.1k.
Chen Liangjun [Thu, 16 Aug 2012 13:11:46 +0000 (21:11 +0800)]
ENGR00220595 ESAI ASRC: add support for 'aplay *'
When play audio in the way of aplay *, shutdown function would not be
called and ASRC configuration would not be reconfigured. In this case,
playback would sound noise.
In this patch, put ASRC release operation into hw_free().
Gary Zhang [Thu, 16 Aug 2012 07:36:36 +0000 (15:36 +0800)]
ENGR00220027-1 IOMUX: add api for special pad bits configuration
Original pad configuration does not provide enough bitfield width
to config some bits, such as LVE bit and DDR_SEL bits.
like gpr configuration, add a api to implement these special
bits pad configuration, and user may call this api in board file.
1. To avoid ASRC underflow error, ASRC driver would prefill ASRC input
FIFO with 160 samples. However, 160 can't be divided by 6. In this case,
channel data miss alignment. In this patch, prefill ASRC input
FIFO with 120, which can be divided by 2,4,6,8.
2. While start P2P playback, ESAI driver would first start SDMA, then
ASRC, and last ESAI. While start ESAI, the data is not ready, thus ESAI
underrun would happens and channel data miss alignment. In this patch,
delay 1 ms between ASRC's start and ESAI's start.
Peter Chen [Tue, 14 Aug 2012 07:35:32 +0000 (15:35 +0800)]
ENGR00220341-2 usb: add spin_lock_irqsave protect for pdata->lowpower
pdata->lowpower may be accessed at two drivers together, assumed
the situation that host/device set phy to low power mode but
still not set the flag lowpower, at this time the wakeup occurs, as
the flag lowpower is still not set, the interrupt will be infinite loop
as no one will serve it.
This commit is for driver code and add protect at driver.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Peter Chen [Tue, 14 Aug 2012 07:16:49 +0000 (15:16 +0800)]
ENGR00220341-1 usb: add spin_lock_irqsave protect for pdata->lowpower
pdata->lowpower may be accessed at two drivers together, assumed
the situation that host/device set phy to low power mode but
still not set the flag lowpower, at this time the wakeup occurs, as
the flag lowpower is still not set, the interrupt will be infinite loop
as no one will serve it.
This commit is for MSL code and add protect at wakeup interrupt.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Robby Cai [Thu, 16 Aug 2012 07:14:19 +0000 (15:14 +0800)]
ENGR00220512-2: mx6sl evk: keep NVCC_1V8 and NVCC_1.2V always on
Keep the corresponding rail of pfuze: VGEN4 and VGEN1 "always on".
It's required for any IO pad configured as this voltage.
It has to be always on, even in DSM mode.
Anson Huang [Wed, 15 Aug 2012 18:45:11 +0000 (02:45 +0800)]
ENGR00220388 [MX6]Adjust SOC/PU voltage according to datasheet
SOC/PU voltage need to following some rules according to latest
datasheet:
1. SOC/PU CAP voltage must be 1.15V <= SOC/PU <= 1.3V;
2. SOC and PU must be same as they don't have level shift;
3. Adjust previous wrong voltage setting.
If SOC/PU voltage is too low, may cause system crash on some
chips, we have a board that easily crash with GPU working and
doing some tar operation, with this voltage adjust, this issue
fixed.
Liu Ying [Tue, 14 Aug 2012 10:36:38 +0000 (18:36 +0800)]
ENGR00219872-2 MX6Q SabreSD:Disable LVDS CABC function
This patch sets CABC_EN0/1 to low to disable LVDS panel
CABC function so that LVDS backlight will not be turned
by the LVDS panel automatically so that we may avoid
annoying unstable backlight issue.
Signed-off-by: Rong Dian <b38775@freescale.com> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit a169940fb39216e644018304e3a3bdaca61ea88a)
Robby Cai [Mon, 13 Aug 2012 08:12:31 +0000 (16:12 +0800)]
ENGR00220161: imx6sl: Add EVK board Support
- Copied the board file from ARM2, and consolidated the pinmux setting.
- Added a new pmic file for EVK.
- Added a new mach type.
- Added board_is_mx6sl_evk() API for late use if needed.
- Updated the defconfig
Liu Ying [Fri, 10 Aug 2012 10:08:42 +0000 (18:08 +0800)]
ENGR00219859 MXC V4L2 capture:Pwr down/on opened cam
Currently, we support 2 cameras, which are relevant to
2 video devices respectively. This patch checks if video
device is opened to determine whether we need to power
down/on relevant camera when doing suspend/resume.
Also, this patch protects capture resources with busy
lock semaphore.
Xinyu Chen [Wed, 15 Aug 2012 05:36:24 +0000 (13:36 +0800)]
ENGR00219856-2 mxc pwm: do pwm software reset after disable
When android doing suspend/resume, we may meet the issue of
backlight is not on (pwm pin no signal) after system wakeup.
The root cause is PWM sample can not be set into the PWMSAR
register after pwm being used and disabled for a while.
The value read back after write is 0 when this issue happens.
Do a software reset after pwm disable can resolve this
issue, this makes sure the next sample update is correct.
Xinyu Chen [Wed, 15 Aug 2012 05:32:06 +0000 (13:32 +0800)]
ENGR00219856-1 mx6q sabresd: add debounce to gpio key
Add a 1ms debounce to the gpio key to avoid
unexpected gpio status read from gpio_key driver's
workqueue. This issue happens on android's resume stage,
sometimes the framework get more than one up key even
user press the power key once.
Sandor Yu [Tue, 14 Aug 2012 12:14:17 +0000 (20:14 +0800)]
ENGR00180117 HDMI: No audio output in 1080P on some TV
Some TV support specific video mode that different with
CEA standard, and it's pixel clock not comply CEA standard.
But audio configuration paramter N and CTS should follow CEA standard.
So audio may not work in these specific video mode.
Filter video mode get from EDID, only keep standard CEA video mode
in the modelist.
Nancy Chen [Tue, 14 Aug 2012 14:49:05 +0000 (09:49 -0500)]
ENGR00220297 [MX6SL]: Fix AHB clock not correct after kernel boot
1. Fix AHB_CLK is not right after system up. ahb_clk is 49.5MHz
after system up. It should be 132MHz.
2. Remove the voltage changes for VDDSOC_CAP since there are vddarm
voltage changed in CPUFREQ and vddsoc voltage and vddarm voltage
should meet the constraint condition: VDDSOC > VDDARM - 50mV. Therefore
VDDSOC voltage changes will be implemented in CPUFREQ.
Robin Gong [Tue, 14 Aug 2012 07:27:27 +0000 (15:27 +0800)]
ENGR00220340 mx6sl pfuze: keep NVCC_1V8 and NVCC_1.2V always on
1. Keep the corresponding rail of pfuze:VGEN4 and VGEN1 "always on".
2. mx6sl enable LDO bypass default, which can't including adjust soc
and pu regulator. To support old LDO bypass code, need check soc_regulator
and pu_regulator, otherwise, system will crash.
Add on-demand governor's threshold for FEC to improves performance.
i.mx6q TO1.1 tx throughput only is 64Mbps in 100Mbps mode on sabresd
platform, after the change, the throughput can reach to 95Mbps for tx.
Yuxi Sun [Fri, 10 Aug 2012 05:52:32 +0000 (13:52 +0800)]
ENGR00219173 V42L overlay Add back ground overlay support
Add back ground overlay support based on ipu device driver.
Default using this driver instead of prp_vf driver for back
ground overlay. when want using prp_vf back ground overlay,
unselect ipu deviece overlay drivers and choose to build
related driver as build-in.
Chen Liangjun [Sun, 12 Aug 2012 15:03:01 +0000 (23:03 +0800)]
ENGR00220172 ESAI ASRC: put all asrc pair release operation to shutdown()
When use ASRC for ESAI P2P playback, ESAI driver would release ASRC pair
resource immediately after ASRC function's error return.It may
introduce risk that in ESAI machine driver's shutdown(), ASRC resource
release operation may be double called. In this case, system hang
happens due to ASRC register's operation with no clock.
In this patch, let all ASRC resource release operation in ESAI machine
driver's shutdown().
Chen Liangjun [Sat, 11 Aug 2012 07:36:20 +0000 (15:36 +0800)]
ENGR00220181-2 HDMI SDMA: workround for HDMI SDMA audio no sound issue
Issue: When playback HDMI audio in SDMA stress test, HDMI audio may stop
caused by SDMA channel's failing to work. While checking the SDMA register
and HDMI module stauts, we found that SDMA fall to an unknown error state.
The issue is detected both in RIGEL TO1.1 and ARIK TO1.2.
This patch introduces a workround for this issue: For the memory passed
to SDMA core, HDMI driver would allocate it with the attribute of C=0,
B=0 instead of C=0, B=1. This patch have be tested in RIGEL TO1.1 for
about 60 hours, no issue happens.
Robin Gong [Sat, 11 Aug 2012 09:41:52 +0000 (17:41 +0800)]
ENGR00220154 GPT mx6: move mx6_timer_rate to clock.c
System will report oops as below. To fix it we will move mx6_timer_rate to
clock.c, so that we can avoid use clk_get_sys which cause schedule after
spin_lock.
oops log:
BUG: scheduling while atomic: kinteractiveup/1403/0x00000002
Modules linked in:
(unwind_backtrace+0x0/0xfc) from [<804f05f0>] (__schedule+0x4b8/0x6b0)
(__schedule+0x4b8/0x6b0) from [<804f12ac>] (__mutex_lock_slowpath+0x138/0x208)
(__mutex_lock_slowpath+0x138/0x208) from [<804f13b4>] (mutex_lock+0x38/0x3c)
mutex_lock+0x38/0x3c) from [<803b9134>] (clk_get_sys+0x1c/0xec)
(clk_get_sys+0x1c/0xec) from [<8005f814>] (mx6_timer_rate+0x14/0x7c)
(mx6_timer_rate+0x14/0x7c) from [<80056a20>] (_clk_gpt_get_rate+0x18/0x2c)
(_clk_gpt_get_rate+0x18/0x2c) from [<8005e89c>] (clk_get_rate+0x34/0x40)
(clk_get_rate+0x34/0x40) from [<80055f3c>] (_clk_pll_enable+0xa8/0x1ec)
(_clk_pll_enable+0xa8/0x1ec) from [<80056088>] (_clk_pll1_enable+0x8/0x20)
(_clk_pll1_enable+0x8/0x20) from [<80056998>] (_clk_arm_set_rate+0x278/0x2e8)
(_clk_arm_set_rate+0x278/0x2e8) from [<8005e824>] (clk_set_rate+0x54/0x68)
(clk_set_rate+0x54/0x68) from [<80061660>] (set_cpu_freq+0xb8/0x160)
(set_cpu_freq+0xb8/0x160) from [<800618b4>] (mxc_set_target+0xf0/0x20c)
(mxc_set_target+0xf0/0x20c) from [<80372388>](__cpufreq_driver_target+0x54/0x60) Signed-off-by: Robin Gong <b38343@freescale.com>
Robin Gong [Sat, 11 Aug 2012 08:36:35 +0000 (16:36 +0800)]
ENGR00220153 cpufreq mx6: new cpu set point and add VDDSOC/PU adjust
1.add new cpu setpoint: replace 498Mhz with 672Mhz,and remove 198Mhz.
but now 498Mhz seems not stable enough, comment now, test enough to
add it. Rigel kept unchange now.
2.support adjusting VDDSOC/VDDPU when cpu frequency change.
Steve Cornelius [Thu, 9 Aug 2012 22:26:33 +0000 (15:26 -0700)]
ENGR00216259 caam: improve RNG4 initialization process
Early versions of this driver used a set of entropy generation parameters
inherited from QorIQ devices. Those parameters were a hardcoded set
based upon internally-suggested values, and worked well on QorIQ. However,
for certain mx6 devices, oscillator values were found to be exceeding
the upper limit, and so RNG instantiation was failing in those cases.
This code improves initialization by (a) making sure the oscillator
divider is set to a known value, and (b) converting the parameter selection
to a symbolic compiler-generated form, instead of using embedded
magic number constants.
The calculation is now based on the definition of RNG4_ENT_CLOCKS_SAMPLE,
which defaults to 1600 unless overridden by something. The lower limit
is then set as /4, and the upper limit set to *8.
Tested-by: Minnick Michael-B21710 <b21710@freescale.com> Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com>
Anson Huang [Thu, 9 Aug 2012 16:35:59 +0000 (00:35 +0800)]
ENGR00220022 [MX6]Add necessary protection to bus freq variables and function
All bus freq related variables and function calls need to be protected by
mutex, or these variables may be wrong and result in triggering bus freq
change by mistake, it will impact many modules function.
Anson Huang [Thu, 9 Aug 2012 12:49:36 +0000 (20:49 +0800)]
ENGR00219870 [MX6]Add interrupt check to idle to minish SMP impact
CPUs may be waked up by SMP broadcast, and for this scenario, CPUs
can enter idle again directly to avoid run a long way to re-enter
idle, adding this interrupt check can minish SMP impact on peripheral
devices' performance.
Fugang Duan [Thu, 9 Aug 2012 09:59:44 +0000 (17:59 +0800)]
ENGR00180288 - FEC : Fix kernel dump about eth0
Kernel dump when do wifi stress test with suspend and resume as below:
eth0: tx queue full!.
remove wake up source irq 103
PM: resume of devices complete after 348.934 msecs
Restarting tasks ... done.
------------[ cut here ]------------
WARNING: at net/sched/sch_generic.c:255 dev_watchdog+0x284/0x2a8()
NETDEV WATCHDOG: eth0 (fec): transmit queue 0 timed out
Modules linked in: ar6000
[<8004482c>] (unwind_backtrace+0x0/0xf8) from
[<80068cd0>] (warn_slowpath_common+0x4c/0x64)
[<80068cd0>] (warn_slowpath_common+0x4c/0x64)from
[<80068d7c>] (warn_slowpath_fmt+0x30/0x40)
[<80068d7c>] (warn_slowpath_fmt+0x30/0x40) from
[<803f0c50>] (dev_watchdog+0x284/0x2a8)
[<803f0c50>] (dev_watchdog+0x284/0x2a8) from
[<80074430>] (run_timer_softirq+0xec/0x214)
[<80074430>] (run_timer_softirq+0xec/0x214) from
[<8006e524>] (__do_softirq+0xac/0x140)
[<8006e524>] (__do_softirq+0xac/0x140) from
[<8006ea60>] (irq_exit+0x94/0x9c)
[<8006ea60>] (irq_exit+0x94/0x9c) from
[<80039240>] (do_local_timer+0x54/0x70)
[<80039240>] (do_local_timer+0x54/0x70) from
[<8003ea0c>] (__irq_svc+0x4c/0xe8)
Exception stack(0x80a2bf68 to 0x80a2bfb0)
bf60: 0000001f80a3babc80a2bfb00000000080a2a00080a7b8e4
bf80: 804befcc80a3ee7c1000406a412fc09a000000000000000080a8144080a2bfb0
bfa0: 8003fa648003fa6860000013ffffffff
[<8003ea0c>] (__irq_svc+0x4c/0xe8) from [<8003fa68>] (default_idle+0x24/0x28)
[<8003fa68>] (default_idle+0x24/0x28) from [<8003fc60>] (cpu_idle+0xbc/0xfc)
[<8003fc60>] (cpu_idle+0xbc/0xfc) from [<80008878>] (start_kernel+0x258/0x29c)
[<80008878>] (start_kernel+0x258/0x29c) from [<10008040>] (0x10008040)
---[ end trace 30671ac42e272c2d ]---
But ethernet and system still be alive. In sometime,the issue
will cause system hang like "nfs: server 10.192.242.179 not
responding, still trying".
The root cause is tx buffer descriptors are not cleaned when
ethernet resume back.
Wayne Zou [Tue, 7 Aug 2012 11:23:13 +0000 (19:23 +0800)]
ENGR00220011-1 Revert ENGR00212529 show video to fb0, the color space incorrect
Revert ENGR00212529 MX6x show video to fb0 when bootup,
the color space incorrect.
Update IPU DP CSC setting should not change the DP FG window's position setting,
it can be update when enabling IPU DP channel.
Otherwise, it will appear NFB4EOF_ERR and flip irq timeout errors.
the original low memory killer only take care of system memory accounting,
but for so large shared memory occupy by GPU, and each process memory
killer account become unfair, very large 3D game will not killed firstly
if it going to background.
Add this account to let real large memory user get killed if going to background
eg, the "angry bird Space" will acquire 68,215,360 GPU memory for 1-6 toll-gate.
The test show it can quicker recovery from memory shortage situation,
since it's very like to be killed after add so much GPU memory for such 3D game.
Yuxi Sun [Mon, 6 Aug 2012 06:30:41 +0000 (14:30 +0800)]
ENGR00219397-1 v4l2 overlay: Add foreground overlay support based on ipu device
Replace CSI_PRP_VF_MEM channel with CSI_MEM, then using ipu device
to do the processing or directly send to framebuffer if no processing
need to be perform.
Add the foreground overlay driver file name ipu_fg_overlay_sdc.c correspondding
to the former ipu_prp_vf_sdc.c
Discard the cam->vf_rotation parametter when uing the ipu device for processing
in the overlay, share the cam->rotation parametter with pp.
Chen Liangjun [Wed, 8 Aug 2012 12:54:19 +0000 (20:54 +0800)]
ENGR00219837-1 HDMI: Add HDMI_SDMA support for RIGEL TO1.1
In RIGEL TO1.1, the same HDMI_SDMA fix is introduced as ARIK TO1.2. Add
support for RIGEL TO1.1 for HDMI_SDMA functionality.
In this patch:
1.Add hdmi_SDMA_check() interface to judge whether MX6 chip
support HDMI_SDMA.
2.Replace mx6q_version() check with hdmi_SDMA_check() to support
both ARIK To1.2 and RIGEL TO1.1.
Hongzhang Yang [Thu, 9 Aug 2012 03:00:56 +0000 (11:00 +0800)]
ENGR00217946 VPU kernel driver: fix suspend/resume i.MX6DL hang issue
Bug: VPU easily hang during suspend/resume standby mode i.MX6Q/i.MX6DL
Fix: standby mode doesn't power off/on PU but changes voltage instead, thus
VPU requires a reset cause there's always chance some cell is on
unstable state after voltage change
suspend/resume DSM is OK because it power off/on PU and probably there is a
power-on-reset sequence embedded in SOC
Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
Fugang Duan [Mon, 6 Aug 2012 08:34:17 +0000 (16:34 +0800)]
ENGR00219501 - FEC : Enable puase frame flow
ENET pause frame has two issues (ticket TKT116501):
1. RX status fifo full.
2. XOFF has higher priority than XON when both XOFF and
XON have pending request.
Both of the issues can cause RX FIFO overruns when RX bandwidth
is over 120Mbps.
The issue has been fixed on Rigel TO1.1 and Arik TO1.2. Pause
frame has been enabled to avoid the overrun issue.
Anson Huang [Fri, 3 Aug 2012 11:28:33 +0000 (19:28 +0800)]
ENGR00219024 [EPDC]Fix EPDC resume failure.
Need to enable both axi and pix clock before doing EPDC reset,
or the hardware reset will fail, which will result in dead loop
of EPDC resume function, and block system resume.
Dong Aisheng [Fri, 3 Aug 2012 14:33:08 +0000 (22:33 +0800)]
ENGR00217318-3 flexcan: only enter stop mode when device is up
The flexcan is still in disable mode during suspend if it's still
not up. We do not need to enter stop mode if find the device is not
up since the stop mode does not work well in disable mode(remote wakeup
does not work).
Simon Glass [Thu, 19 Jan 2012 19:28:56 +0000 (11:28 -0800)]
serial: Fix wakeup init logic to speed up startup
The synchronize_rcu() call resulting from making every serial driver
wake-up capable (commit b3b708fa) slows boot down on my Tegra2x system
(with CONFIG_PREEMPT disabled).
But this is avoidable since it is the device_set_wakeup_enable() and then
subsequence disable which causes the delay. We might as well just make
the device wakeup capable but not actually enable it for wakeup until
needed.
Before this change my boot log says:
[ 0.227062] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
[ 0.702928] serial8250.0: ttyS0 at MMIO 0x70006040 (irq = 69) is a Tegra
after:
[ 0.227264] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
[ 0.227983] serial8250.0: ttyS0 at MMIO 0x70006040 (irq = 69) is a Tegra
for saving of 450ms.
Suggested-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Huang Shijie <b32955@freescale.com>
Chen Liangjun [Thu, 2 Aug 2012 07:59:35 +0000 (15:59 +0800)]
ENGR00219184 HDMI AUDIO: set HDMI audio's SDMA priority to high
HDMI use SDMA for buffer switch. Set HDMI audio's SDMA priority to the
same level as other audio device. This adjust can avoid noise due to
SDMA cpu race failing.
Anson Huang [Thu, 2 Aug 2012 15:17:43 +0000 (23:17 +0800)]
ENGR00219178 [MX6]Need to avoid using GPIO_1 on latest B4 sabresd board
For the latest B4 sabresd board, GPIO_1 is connected to PRO_B, we
use this pin as battery charge_done led control, need to avoid using
this pin as GPIO for B4 board, or system will reboot when this pin's
level is changed.
Chen Liangjun [Thu, 2 Aug 2012 04:34:30 +0000 (12:34 +0800)]
ENGR00219160 SDMA: replace SDMA LOOP/NORMAL type with enum struct
For common DMA enguine, only slave_sg mode and cyclic mode is support.
However, SDMA can meet more kinds of DMA operation mode requirement. The
origin flags NORMAL and LOOP can no longer satisfy SDMA user's need.
In this patch,
1 Construct a new enum sdma_mode to declare more kind of SDMA
modes. This new variable would replace the old flags.
2 Init sdma_mode to unvalid every time allocating a SDMA channel
to avoid last SDMA channel configuration's impact.
Sandor Yu [Thu, 2 Aug 2012 03:11:31 +0000 (11:11 +0800)]
ENGR00219153 HDMI: Remove enable/disable_pins in blank/unblank function
HDMI enable/disable_pins setting HDMI DDC enable, but the pins confilct
with I2C2 bus on board design, so only HDCP function is enable
the function can been called.
Remove enable/disable_pins in blank/unblank function to make sure
I2C2 bus can work when HDCP disable.
ENGR00218810-2 [Thermal]Add thermal alarm function
1. Current thermal framework use delayed work to update
temperature, but delayed work may be blocked if system is
busy with the high priority task, which will cause the thermal
protect function not working in time, so we need to add alarm
function, when temperature reach the critical point, the alarm
function will generate an interrupt to reboot system.
2. No need to read 5 times of sensor value, read once is enough.
Chen Liangjun [Wed, 1 Aug 2012 02:42:44 +0000 (10:42 +0800)]
ENGR00218958 ESAI ASRC: fix system hang cause by accessing ASRC with no clock
In ESAI_ASRC, to use ASRC for p2p playback, ESAI driver would maintain
an variable to keep track of ASRC pair number allocated. So every time
ESAI driver want to use ASRC, he would first init the variable to a value
(0 in ESAI driver)stand for unvalid pair number and then request an valid
pair number. At last, open the ASRC clock for ASRC register access.
However, ASRC driver treat 0 as an valid pair number. Thus, if an ESAI ASRC
playback is failed, ESAI driver would check whether the pair number is valid.
If the pair number is valid, ESAI driver would access ASRC register to do some
clean work. Thus, the init 0 value would be treat as an valid pair number and
ASRC register would be access without ASRC clock. In the case, an system
hang happens.
In this patch, init pair number variable to -1 after its allocation.
ENGR00218747 - MX6Q/MX6DL: WAIT mode support for MX6QTO1.2/MX6DLTO1.1
Add the new WAIT mode workaround added for MX6Q1.2 and MX6DLTO1.1.
A new bit is added to CCM_CGPR (bit 17). This bit needs to be
enabled for the WAIT mode fix to be active and needs to be disabled
before the system enters STOP mode with power gating enabled.
Fix WAIT mode bug when system is in low power IDLE mode:
In low power IDLE mode (AHB @ 24MHz), switch ARM to run from 24MHz
on MX6QTO1.1 and MX6DLTO1.0 chips when ARM core enters WAIT mode.
We still need to use the ARM:IPG_CLK ratio of 12:5. Since IPG_CLK
is at 12MHz, we need to run ARM below 28.8MHz.
Robin Gong [Mon, 30 Jul 2012 11:21:18 +0000 (19:21 +0800)]
ENGR00218824 VPU: revert ENGR00217123 about VPU regulator
Two reason:
1. VPU regulator is not enough stable,sometimes will cause system hang
2. GPU regulator is not ready, because GPU/VPU share PU LDO, so revert
the patch firstly.
ENGR00218807 ESAI: fix bootup issue cause by accessing unexist address
To support p2p playback, ESAI driver would copy platform data to
esai_asrc struct. The platform data only exist on boards that supports
ESAI. However, for ARM2 board, it supports ESAI but not necessary
get the codec CS42888. Thus the probe() in ESAI driver would also try to
copy the platform data from board init file.
The p2p playback now only support ARD board, so the ESAI probe() for
ARM2 would access unexisted address and cause an kernel dump.
In the patch, check the platform data address before copy.
make shi [Mon, 30 Jul 2012 07:35:11 +0000 (15:35 +0800)]
ENGR00218771 mx6 USB:USB disconnect issue verification on MX6QTO1.2/MX6DLTO1.1
- for Rigel1.1/Arik1.2, bit 17 of HW_USBPHY_IP will be set, it will fix the
issue that no wakeup between SUSP/PHCD. And the usb_platform_rh_suspend/
usb_platform_rh_resume do not need do complex software workaround, only
need set/clear the workaround bit.
- for Megrez , bit 17 and bit 18 of HW_USBPHY_IP will be set, it will fix the
issue that no wakeup between SUSP/PHCD and disconnect after resume. No need
do any software workaround.
ENGR00218421-2 ESAI_ASRC:Add support for p2p virtual device playback
In the origin code, ESAI driver supoprt audio p2p playback by setting
input PCM data's sample rate thought amixer interface.It is ugly and
request user application call amixer control interface everytime before
and playback.
In this patch, user can call the audio p2p playback by writing data to
an special virtual device. Driver would automatically get the params of
input PCM. At the same time, driver would get the output sample rate and
word data. With the data abover, driver can set ASRC properly and audio
p2p palyback is support.
This patch mainly focus on:
1 clean old p2p playback way for ESAI.
2 Setup the output sample rate and word width to virtual
device's substream_runtime's private data. Everytime the virtual
device is called, the data abover is used for config ASRC, ESAI,
and codec.
ENGR00218421-1 ESAI: Setup virtual device under ESAI sound card
For ESAI sound card, ESAI driver setup device 0 for raw ESAI playback
and capture.
In this patch, add ESAI virtual device 1 under ESAI sound card. Device 1
is for ESAI audio p2p playback. Every time user use device 1 for
playback, ASRC would be called defaultly. Thus for device 1, it can
support all sample rate between 8k ~ 192k.
ENGR00218013-5 HDMI: Add SDMA to help HDMI audio support multi buffer
For chip version easily than TO1.1, HDMI use internel DMA enginue for
audio tranfer. Due to capability of HDMI module, FIFO underrun is
unavoidable.
For chip TO 1.2, introducing SDMA to help HDMI audio DMA. With the help
of SDMA, HDMI audio can use ping-pong buffer mechanism and FIFO underrun
can be avoid.
In this path: Add SDMA support for i.MX6Q later than TO1.2.
ENGR00218013-4 MX6Q ARM2: Set HDMI event as event 2 of SDMA event
Select external SDMA request as SDMA event 2 for MX6Q ARM2 board.
SDMA event 2 can be configured HDMI or IPU. Signed-off-by: Chen Liangjun <b36089@freescale.com>
ENGR00218624 ASRC: set dma_data to 0 before config SDMA
To allocate an SDMA channel, imx_dma_data struct is need. However,
if the member dma_request_p2p is not set to 0 before configuration,
SDMA driver would treat the channel as p2p(periphal to periphal) DMA and
set SDMA channel context in p2p way. In the worst case, SDMA would
access some unexisted address cause of mis configuration above and thus
cause kernel panic or hang.
In this patch, set imx_dma_data struct to 0 once it is allocated from
stack.
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