fs: jffs2: make jffs2 work zero oobavail
mtd: nand: hack ONFI for non-power-of-2 dimensions Some bright specification writers decided to write this in the ONFI spec (from ONFI 3.0, Section 3.1): "The number of blocks and number of pages per block is not required to be a power of two. In the case where one of these values is not a power of two, the corresponding address shall be rounded to an integral number of bits such that it addresses a range up to the subsequent power of two value. The host shall not access upper addresses in a range that is shown as not supported." This breaks every assumption MTD makes about NAND block/chip-size dimensions -- they *must* be a power of two! And of course, an enterprising manufacturer has made use of this lovely freedom. Exhibit A: Micron MT29F32G08CBADAWP "- Plane size: 2 planes x 1064 blocks per plane - Device size: 32Gb: 2128 blockss [sic]" This quickly hits a BUG() in nand_base.c, since the extra dimensions overflow so we think it's a second chip (on my single-chip setup): ONFI param page 0 valid ONFI flash detected NAND device: Manufacturer ID: 0x2c, Chip ID: 0x44 (Micron MT29F32G08CBADAWP), 4256MiB, page size: 8192, OOB size: 744 ------------[ cut here ]------------ kernel BUG at drivers/mtd/nand/nand_base.c:203! Internal error: Oops - BUG: 0 [#1] SMP ARM [... trim ...] [<c02cf3e4>] (nand_select_chip+0x18/0x2c) from [<c02d25c0>] (nand_do_read_ops+0x90/0x424) [<c02d25c0>] (nand_do_read_ops+0x90/0x424) from [<c02d2dd8>] (nand_read+0x54/0x78) [<c02d2dd8>] (nand_read+0x54/0x78) from [<c02ad2c8>] (mtd_read+0x84/0xbc) [<c02ad2c8>] (mtd_read+0x84/0xbc) from [<c02d4b28>] (scan_read.clone.4+0x4c/0x64) [<c02d4b28>] (scan_read.clone.4+0x4c/0x64) from [<c02d4c88>] (search_bbt+0x148/0x290) [<c02d4c88>] (search_bbt+0x148/0x290) from [<c02d4ea4>] (nand_scan_bbt+0xd4/0x5c0) [... trim ...] ---[ end trace 0c9363860d865ff2 ]--- So to fix this, just truncate these dimensions down to the greatest power-of-2 dimension that is less than or equal to the specified dimension. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: <stable@vger.kernel.org>
mtd: nand: fix the wrong mtd->type for nand chip Current code sets the mtd->type with MTD_NANDFLASH for both SLC and MLC. So the jffs2 may supports the MLC nand, but in actually, the jffs2 should not support the MLC. This patch uses the nand_is_slc() to check the nand cell type, and set the mtd->type with the right nand type. After this patch, the jffs2 only supports the SLC nand. The side-effect of this patch: Before this patch, the ioctl(MEMGETINFO) can only return with the MTD_NANDFLASH; but after this patch, the ioctl(MEMGETINFO) will return with the MTD_NANDFLASH for SLC, and MTD_MLCNANDFLASH for MLC. So the user applictions(such as mtd-utils) should also changes a little for this. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
mtd: nand: print out the cell information for nand chip Print out the cell information for nand chip. (Since the message is too long, this patch also splits the log with two separate pr_info()) Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
mtd: nand: set the cell information for ONFI nand The current code does not set the SLC/MLC information for onfi nand. (This makes that the kernel treats all the onfi nand as SLC nand.) This patch fills the cell information for ONFI nands. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
mtd: nand: add the "bits per cell" info for legacy ID NAND The legacy ID NAND are all SLC. This patch sets 1 to the @bits_per_cell for the legacy ID NAND, which means they are all SLC. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
mtd: nand: rename the cellinfo to bits_per_cell The @cellinfo fields contains unused information, such as write caching, internal chip numbering, etc. But we only use it to check the SLC or MLC. This patch tries to make it more clear and simple, renames the @cellinfo to @bits_per_cell. In order to avoiding the bisect issue, this patch also does the following changes: (0) add a macro NAND_CI_CELLTYPE_SHIFT to avoid the hardcode. (1) add a helper to parse out the cell type : nand_get_bits_per_cell() (2) parse out the cell type for extended-ID chips and the full-id nand chips. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
mtd: nand: add a helper to check the SLC/MLC nand chip Add a helper to check if a nand chip is SLC or MLC. This helper makes the code more readable. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
mtd: nand: correct extemded param page error handling If the ONFI extended parameter page gives codeword_size == 0, the extended ECC information is corrupt and should not be used. Currently, we (correctly) avoid using the information, but we don't report the error to the caller, so the caller doesn't know that we didn't initialize ecc_strength_ds and ecc_step_ds. Now the caller can warn the user that it does not have sufficient information. This also removes the false and useless "ONFI extended param page detected" debug message (it was printed even on the aforementioned corruption, and for the success case, we don't really want a print). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Huang Shijie <b32955@freescale.com>
mtd: nand: cleanup ONFI printed errors, warnings The ONFI detection routine is too verbose in some cases and not verbose enough in others. This patch refactors it to print only when there are significant warnings/errors. Probing in 16-bit mode: It is unnecessary to print until after the READID (address 20h) command. READID *has* to work properly in whatever bus width configuration we are in, or else no identification mode works. So we can silence some useless warnings on systems which come up in 16-bit mode and do not even respond with an O-N-F-I string. Valid parameter page: Nobody needs to see this. Do we inform the user every time other hardware responds properly? Instead, add an error message if *no* uncorrupted parameter pages are found. ONFI ECC: Most drivers don't yet use the reported minimum ECC values, so it shouldn't yet be a fatal condition if the extended parameter page is incorrect. But we should at least give a warning for the corner cases that we don't expect. ONFI flash detected: Nobody needs to see this. This is the expected case, that we detect ONFI properly, or else it wasn't ONFI-compliant and is detected by some other routine. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Huang Shijie <b32955@freescale.com> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
mtd: nand: fix memory leak in ONFI extended parameter page This fixes a memory leak in the ONFI support code for detecting the required ECC levels from this commit: commit 6dcbe0cdd83fb5f77be4f44c9e06c535281c375a Author: Huang Shijie <b32955@freescale.com> Date: Wed May 22 10:28:27 2013 +0800 mtd: get the ECC info from the Extended Parameter Page In the success case, we never freed the 'ep' buffer. Also, this fixes an oversight in the same commit where we (harmlessly) freed the NULL pointer. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
mtd: nand: fixup kerneldoc, rename parameter First, the function argument is 'offset' not 'column'. Second, the 'data_buf' name is inconsistent with the rest of this file. Just use 'buf'. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Gupta, Pekon <pekon@ti.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
mtd: set ONFI nand's default hooks in nand_set_defaults() We may do some ONFI get/set features operations before we call the nand_scan_tail(). So move the default ONFI nand hooks into nand_set_defaults(). Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
mtd: set the ecc step size for master/slave mtd_info Set the ecc step size for master/slave mtd_info{}. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
mtd: nand: silence some shift wrap warnings There are static checkers which complain when we declare variables as 64 bit bitfields but only use the lower 32 bits because of shift wrapping. In this case "len" is declared as u64 as opposed to unsigned long or something which might be 32 bits. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
mtd: parse out the ECC info for the full-id nand chips Parse out the ECC information for the full-id nand chips. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
mtd: replace the hardcode with the onfi_feature() The current code uses the hardcode to detect the 16-bit bus width. Use the onfi_feature() to replace it. Signed-off-by: Huang Shijie <b32955@freescale.com> [Brian: small fixup] Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
mtd: get the ECC info from the Extended Parameter Page Since the ONFI 2.1, the onfi spec adds the Extended Parameter Page to store the ECC info. The onfi spec tells us that if the nand chip's recommended ECC codeword size is not 512 bytes, then the @ecc_bits is 0xff. The host _SHOULD_ then read the Extended ECC information that is part of the extended parameter page to retrieve the ECC requirements for this device. This patch implement the reading of the Extended Parameter Page, and parses the sections for ECC type, and get the ECC info from the ECC section. Tested this patch with Micron MT29F64G08CBABAWP. Acked-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Huang Shijie <b32955@freescale.com> Reviewed-and-tested-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
mtd: get the ECC info from the parameter page for ONFI nand From the ONFI spec, we can just get the ECC info from the @ecc_bits field of the parameter page. Signed-off-by: Huang Shijie <b32955@freescale.com> Reviewed-and-tested-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
mtd: nand: hide in-memory BBT implementation details nand_base.c shouldn't have to know the implementation details of nand_bbt's in-memory BBT. Specifically, nand_base shouldn't perform the bit masking and shifting to isolate a BBT entry. Instead, just move some of the BBT code into a new nand_markbad_bbt() interface. This interface allows external users (i.e., nand_base) to mark a single block as bad in the BBT. Then nand_bbt will take care of modifying the in-memory BBT and updating the flash-based BBT (if applicable). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>