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[karo-tx-linux.git] / Documentation / devicetree / bindings / iio / adc / amlogic,meson-saradc.txt
1 * Amlogic Meson SAR (Successive Approximation Register) A/D converter
2
3 Required properties:
4 - compatible:   depending on the SoC this should be one of:
5                         - "amlogic,meson8-saradc" for Meson8
6                         - "amlogic,meson8b-saradc" for Meson8b
7                         - "amlogic,meson-gxbb-saradc" for GXBB
8                         - "amlogic,meson-gxl-saradc" for GXL
9                         - "amlogic,meson-gxm-saradc" for GXM
10                 along with the generic "amlogic,meson-saradc"
11 - reg:          the physical base address and length of the registers
12 - interrupts:   the interrupt indicating end of sampling
13 - clocks:       phandle and clock identifier (see clock-names)
14 - clock-names:  mandatory clocks:
15                         - "clkin" for the reference clock (typically XTAL)
16                         - "core" for the SAR ADC core clock
17                 optional clocks:
18                         - "sana" for the analog clock
19                         - "adc_clk" for the ADC (sampling) clock
20                         - "adc_sel" for the ADC (sampling) clock mux
21 - vref-supply:  the regulator supply for the ADC reference voltage
22 - #io-channel-cells: must be 1, see ../iio-bindings.txt
23
24 Example:
25         saradc: adc@8680 {
26                 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
27                 #io-channel-cells = <1>;
28                 reg = <0x0 0x8680 0x0 0x34>;
29                 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
30                 clocks = <&xtal>,
31                          <&clkc CLKID_SAR_ADC>,
32                          <&clkc CLKID_SANA>,
33                          <&clkc CLKID_SAR_ADC_CLK>,
34                          <&clkc CLKID_SAR_ADC_SEL>;
35                 clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
36         };