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1 The Exynos display port interface should be configured based on
2 the type of panel connected to it.
3
4 We use two nodes:
5         -dp-controller node
6         -dptx-phy node(defined inside dp-controller node)
7
8 For the DP-PHY initialization, we use the dptx-phy node.
9 Required properties for dptx-phy: deprecated, use phys and phy-names
10         -reg: deprecated
11                 Base address of DP PHY register.
12         -samsung,enable-mask: deprecated
13                 The bit-mask used to enable/disable DP PHY.
14
15 For the Panel initialization, we read data from dp-controller node.
16 Required properties for dp-controller:
17         -compatible:
18                 should be "samsung,exynos5-dp".
19         -reg:
20                 physical base address of the controller and length
21                 of memory mapped region.
22         -interrupts:
23                 interrupt combiner values.
24         -clocks:
25                 from common clock binding: handle to dp clock.
26         -clock-names:
27                 from common clock binding: Shall be "dp".
28         -interrupt-parent:
29                 phandle to Interrupt combiner node.
30         -phys:
31                 from general PHY binding: the phandle for the PHY device.
32         -phy-names:
33                 from general PHY binding: Should be "dp".
34         -samsung,color-space:
35                 input video data format.
36                         COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2
37         -samsung,dynamic-range:
38                 dynamic range for input video data.
39                         VESA = 0, CEA = 1
40         -samsung,ycbcr-coeff:
41                 YCbCr co-efficients for input video.
42                         COLOR_YCBCR601 = 0, COLOR_YCBCR709 = 1
43         -samsung,color-depth:
44                 number of bits per colour component.
45                         COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12 = 3
46         -samsung,link-rate:
47                 link rate supported by the panel.
48                         LINK_RATE_1_62GBPS = 0x6, LINK_RATE_2_70GBPS = 0x0A
49         -samsung,lane-count:
50                 number of lanes supported by the panel.
51                         LANE_COUNT1 = 1, LANE_COUNT2 = 2, LANE_COUNT4 = 4
52         - display-timings: timings for the connected panel as described by
53                 Documentation/devicetree/bindings/video/display-timing.txt
54
55 Optional properties for dp-controller:
56         -interlaced:
57                 interlace scan mode.
58                         Progressive if defined, Interlaced if not defined
59         -vsync-active-high:
60                 VSYNC polarity configuration.
61                         High if defined, Low if not defined
62         -hsync-active-high:
63                 HSYNC polarity configuration.
64                         High if defined, Low if not defined
65         -samsung,hpd-gpio:
66                 Hotplug detect GPIO.
67                         Indicates which GPIO should be used for hotplug
68                         detection
69         -video interfaces: Device node can contain video interface port
70                             nodes according to [1].
71
72 [1]: Documentation/devicetree/bindings/media/video-interfaces.txt
73
74 Example:
75
76 SOC specific portion:
77         dp-controller {
78                 compatible = "samsung,exynos5-dp";
79                 reg = <0x145b0000 0x10000>;
80                 interrupts = <10 3>;
81                 interrupt-parent = <&combiner>;
82                 clocks = <&clock 342>;
83                 clock-names = "dp";
84
85                 phys = <&dp_phy>;
86                 phy-names = "dp";
87         };
88
89 Board Specific portion:
90         dp-controller {
91                 samsung,color-space = <0>;
92                 samsung,dynamic-range = <0>;
93                 samsung,ycbcr-coeff = <0>;
94                 samsung,color-depth = <1>;
95                 samsung,link-rate = <0x0a>;
96                 samsung,lane-count = <4>;
97
98                 display-timings {
99                         native-mode = <&lcd_timing>;
100                         lcd_timing: 1366x768 {
101                                 clock-frequency = <70589280>;
102                                 hactive = <1366>;
103                                 vactive = <768>;
104                                 hfront-porch = <40>;
105                                 hback-porch = <40>;
106                                 hsync-len = <32>;
107                                 vback-porch = <10>;
108                                 vfront-porch = <12>;
109                                 vsync-len = <6>;
110                         };
111                 };
112
113                 ports {
114                         port@0 {
115                                 dp_out: endpoint {
116                                         remote-endpoint = <&bridge_in>;
117                                 };
118                         };
119                 };
120         };