arch/arm/boot/dts/at91sam9n12.dtsi

   1 /*
   2  * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
   3  *
   4  *  Copyright (C) 2012 Atmel,
   5  *                2012 Hong Xu <hong.xu@atmel.com>
   6  *
   7  * Licensed under GPLv2 or later.
   8  */
   9
  10 #include "skeleton.dtsi"
  11 #include <dt-bindings/dma/at91.h>
  12 #include <dt-bindings/pinctrl/at91.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include <dt-bindings/clock/at91.h>
  16
  17 / {
  18         model = "Atmel AT91SAM9N12 SoC";
  19         compatible = "atmel,at91sam9n12";
  20         interrupt-parent = <&aic>;
  21
  22         aliases {
  23                 serial0 = &dbgu;
  24                 serial1 = &usart0;
  25                 serial2 = &usart1;
  26                 serial3 = &usart2;
  27                 serial4 = &usart3;
  28                 gpio0 = &pioA;
  29                 gpio1 = &pioB;
  30                 gpio2 = &pioC;
  31                 gpio3 = &pioD;
  32                 tcb0 = &tcb0;
  33                 tcb1 = &tcb1;
  34                 i2c0 = &i2c0;
  35                 i2c1 = &i2c1;
  36                 ssc0 = &ssc0;
  37                 pwm0 = &pwm0;
  38         };
  39         cpus {
  40                 #address-cells = <0>;
  41                 #size-cells = <0>;
  42
  43                 cpu {
  44                         compatible = "arm,arm926ej-s";
  45                         device_type = "cpu";
  46                 };
  47         };
  48
  49         memory {
  50                 reg = <0x20000000 0x10000000>;
  51         };
  52
  53         clocks {
  54                 slow_xtal: slow_xtal {
  55                         compatible = "fixed-clock";
  56                         #clock-cells = <0>;
  57                         clock-frequency = <0>;
  58                 };
  59
  60                 main_xtal: main_xtal {
  61                         compatible = "fixed-clock";
  62                         #clock-cells = <0>;
  63                         clock-frequency = <0>;
  64                 };
  65         };
  66
  67         sram: sram@00300000 {
  68                 compatible = "mmio-sram";
  69                 reg = <0x00300000 0x8000>;
  70         };
  71
  72         ahb {
  73                 compatible = "simple-bus";
  74                 #address-cells = <1>;
  75                 #size-cells = <1>;
  76                 ranges;
  77
  78                 apb {
  79                         compatible = "simple-bus";
  80                         #address-cells = <1>;
  81                         #size-cells = <1>;
  82                         ranges;
  83
  84                         aic: interrupt-controller@fffff000 {
  85                                 #interrupt-cells = <3>;
  86                                 compatible = "atmel,at91rm9200-aic";
  87                                 interrupt-controller;
  88                                 reg = <0xfffff000 0x200>;
  89                                 atmel,external-irqs = <31>;
  90                         };
  91
  92                         ramc0: ramc@ffffe800 {
  93                                 compatible = "atmel,at91sam9g45-ddramc";
  94                                 reg = <0xffffe800 0x200>;
  95                                 clocks = <&ddrck>;
  96                                 clock-names = "ddrck";
  97                         };
  98
  99                         pmc: pmc@fffffc00 {
 100                                 compatible = "atmel,at91sam9n12-pmc", "syscon";
 101                                 reg = <0xfffffc00 0x200>;
 102                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 103                                 interrupt-controller;
 104                                 #address-cells = <1>;
 105                                 #size-cells = <0>;
 106                                 #interrupt-cells = <1>;
 107
 108                                 main_rc_osc: main_rc_osc {
 109                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
 110                                         #clock-cells = <0>;
 111                                         interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
 112                                         clock-frequency = <12000000>;
 113                                         clock-accuracy = <50000000>;
 114                                 };
 115
 116                                 main_osc: main_osc {
 117                                         compatible = "atmel,at91rm9200-clk-main-osc";
 118                                         #clock-cells = <0>;
 119                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 120                                         clocks = <&main_xtal>;
 121                                 };
 122
 123                                 main: mainck {
 124                                         compatible = "atmel,at91sam9x5-clk-main";
 125                                         #clock-cells = <0>;
 126                                         interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
 127                                         clocks = <&main_rc_osc>, <&main_osc>;
 128                                 };
 129
 130                                 plla: pllack {
 131                                         compatible = "atmel,at91rm9200-clk-pll";
 132                                         #clock-cells = <0>;
 133                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 134                                         clocks = <&main>;
 135                                         reg = <0>;
 136                                         atmel,clk-input-range = <2000000 32000000>;
 137                                         #atmel,pll-clk-output-range-cells = <4>;
 138                                         atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
 139                                                                       <695000000 750000000 1 0>,
 140                                                                       <645000000 700000000 2 0>,
 141                                                                       <595000000 650000000 3 0>,
 142                                                                       <545000000 600000000 0 1>,
 143                                                                       <495000000 555000000 1 1>,
 144                                                                       <445000000 500000000 2 1>,
 145                                                                       <400000000 450000000 3 1>;
 146                                 };
 147
 148                                 plladiv: plladivck {
 149                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 150                                         #clock-cells = <0>;
 151                                         clocks = <&plla>;
 152                                 };
 153
 154                                 pllb: pllbck {
 155                                         compatible = "atmel,at91rm9200-clk-pll";
 156                                         #clock-cells = <0>;
 157                                         interrupts-extended = <&pmc AT91_PMC_LOCKB>;
 158                                         clocks = <&main>;
 159                                         reg = <1>;
 160                                         atmel,clk-input-range = <2000000 32000000>;
 161                                         #atmel,pll-clk-output-range-cells = <3>;
 162                                         atmel,pll-clk-output-ranges = <30000000 100000000 0>;
 163                                 };
 164
 165                                 mck: masterck {
 166                                         compatible = "atmel,at91sam9x5-clk-master";
 167                                         #clock-cells = <0>;
 168                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 169                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>;
 170                                         atmel,clk-output-range = <0 133333333>;
 171                                         atmel,clk-divisors = <1 2 4 3>;
 172                                         atmel,master-clk-have-div3-pres;
 173                                 };
 174
 175                                 usb: usbck {
 176                                         compatible = "atmel,at91sam9n12-clk-usb";
 177                                         #clock-cells = <0>;
 178                                         clocks = <&pllb>;
 179                                 };
 180
 181                                 prog: progck {
 182                                         compatible = "atmel,at91sam9x5-clk-programmable";
 183                                         #address-cells = <1>;
 184                                         #size-cells = <0>;
 185                                         interrupt-parent = <&pmc>;
 186                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>;
 187
 188                                         prog0: prog0 {
 189                                                 #clock-cells = <0>;
 190                                                 reg = <0>;
 191                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 192                                         };
 193
 194                                         prog1: prog1 {
 195                                                 #clock-cells = <0>;
 196                                                 reg = <1>;
 197                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 198                                         };
 199                                 };
 200
 201                                 systemck {
 202                                         compatible = "atmel,at91rm9200-clk-system";
 203                                         #address-cells = <1>;
 204                                         #size-cells = <0>;
 205
 206                                         ddrck: ddrck {
 207                                                 #clock-cells = <0>;
 208                                                 reg = <2>;
 209                                                 clocks = <&mck>;
 210                                         };
 211
 212                                         lcdck: lcdck {
 213                                                 #clock-cells = <0>;
 214                                                 reg = <3>;
 215                                                 clocks = <&mck>;
 216                                         };
 217
 218                                         uhpck: uhpck {
 219                                                 #clock-cells = <0>;
 220                                                 reg = <6>;
 221                                                 clocks = <&usb>;
 222                                         };
 223
 224                                         udpck: udpck {
 225                                                 #clock-cells = <0>;
 226                                                 reg = <7>;
 227                                                 clocks = <&usb>;
 228                                         };
 229
 230                                         pck0: pck0 {
 231                                                 #clock-cells = <0>;
 232                                                 reg = <8>;
 233                                                 clocks = <&prog0>;
 234                                         };
 235
 236                                         pck1: pck1 {
 237                                                 #clock-cells = <0>;
 238                                                 reg = <9>;
 239                                                 clocks = <&prog1>;
 240                                         };
 241                                 };
 242
 243                                 periphck {
 244                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 245                                         #address-cells = <1>;
 246                                         #size-cells = <0>;
 247                                         clocks = <&mck>;
 248
 249                                         pioAB_clk: pioAB_clk {
 250                                                 #clock-cells = <0>;
 251                                                 reg = <2>;
 252                                         };
 253
 254                                         pioCD_clk: pioCD_clk {
 255                                                 #clock-cells = <0>;
 256                                                 reg = <3>;
 257                                         };
 258
 259                                         fuse_clk: fuse_clk {
 260                                                 #clock-cells = <0>;
 261                                                 reg = <4>;
 262                                         };
 263
 264                                         usart0_clk: usart0_clk {
 265                                                 #clock-cells = <0>;
 266                                                 reg = <5>;
 267                                         };
 268
 269                                         usart1_clk: usart1_clk {
 270                                                 #clock-cells = <0>;
 271                                                 reg = <6>;
 272                                         };
 273
 274                                         usart2_clk: usart2_clk {
 275                                                 #clock-cells = <0>;
 276                                                 reg = <7>;
 277                                         };
 278
 279                                         usart3_clk: usart3_clk {
 280                                                 #clock-cells = <0>;
 281                                                 reg = <8>;
 282                                         };
 283
 284                                         twi0_clk: twi0_clk {
 285                                                 reg = <9>;
 286                                                 #clock-cells = <0>;
 287                                         };
 288
 289                                         twi1_clk: twi1_clk {
 290                                                 #clock-cells = <0>;
 291                                                 reg = <10>;
 292                                         };
 293
 294                                         mci0_clk: mci0_clk {
 295                                                 #clock-cells = <0>;
 296                                                 reg = <12>;
 297                                         };
 298
 299                                         spi0_clk: spi0_clk {
 300                                                 #clock-cells = <0>;
 301                                                 reg = <13>;
 302                                         };
 303
 304                                         spi1_clk: spi1_clk {
 305                                                 #clock-cells = <0>;
 306                                                 reg = <14>;
 307                                         };
 308
 309                                         uart0_clk: uart0_clk {
 310                                                 #clock-cells = <0>;
 311                                                 reg = <15>;
 312                                         };
 313
 314                                         uart1_clk: uart1_clk {
 315                                                 #clock-cells = <0>;
 316                                                 reg = <16>;
 317                                         };
 318
 319                                         tcb_clk: tcb_clk {
 320                                                 #clock-cells = <0>;
 321                                                 reg = <17>;
 322                                         };
 323
 324                                         pwm_clk: pwm_clk {
 325                                                 #clock-cells = <0>;
 326                                                 reg = <18>;
 327                                         };
 328
 329                                         adc_clk: adc_clk {
 330                                                 #clock-cells = <0>;
 331                                                 reg = <19>;
 332                                         };
 333
 334                                         dma0_clk: dma0_clk {
 335                                                 #clock-cells = <0>;
 336                                                 reg = <20>;
 337                                         };
 338
 339                                         uhphs_clk: uhphs_clk {
 340                                                 #clock-cells = <0>;
 341                                                 reg = <22>;
 342                                         };
 343
 344                                         udphs_clk: udphs_clk {
 345                                                 #clock-cells = <0>;
 346                                                 reg = <23>;
 347                                         };
 348
 349                                         lcdc_clk: lcdc_clk {
 350                                                 #clock-cells = <0>;
 351                                                 reg = <25>;
 352                                         };
 353
 354                                         sha_clk: sha_clk {
 355                                                 #clock-cells = <0>;
 356                                                 reg = <27>;
 357                                         };
 358
 359                                         ssc0_clk: ssc0_clk {
 360                                                 #clock-cells = <0>;
 361                                                 reg = <28>;
 362                                         };
 363
 364                                         aes_clk: aes_clk {
 365                                                 #clock-cells = <0>;
 366                                                 reg = <29>;
 367                                         };
 368
 369                                         trng_clk: trng_clk {
 370                                                 #clock-cells = <0>;
 371                                                 reg = <30>;
 372                                         };
 373                                 };
 374                         };
 375
 376                         rstc@fffffe00 {
 377                                 compatible = "atmel,at91sam9g45-rstc";
 378                                 reg = <0xfffffe00 0x10>;
 379                                 clocks = <&clk32k>;
 380                         };
 381
 382                         pit: timer@fffffe30 {
 383                                 compatible = "atmel,at91sam9260-pit";
 384                                 reg = <0xfffffe30 0xf>;
 385                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 386                                 clocks = <&mck>;
 387                         };
 388
 389                         shdwc@fffffe10 {
 390                                 compatible = "atmel,at91sam9x5-shdwc";
 391                                 reg = <0xfffffe10 0x10>;
 392                                 clocks = <&clk32k>;
 393                         };
 394
 395                         sckc@fffffe50 {
 396                                 compatible = "atmel,at91sam9x5-sckc";
 397                                 reg = <0xfffffe50 0x4>;
 398
 399                                 slow_osc: slow_osc {
 400                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
 401                                         #clock-cells = <0>;
 402                                         clocks = <&slow_xtal>;
 403                                 };
 404
 405                                 slow_rc_osc: slow_rc_osc {
 406                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
 407                                         #clock-cells = <0>;
 408                                         clock-frequency = <32768>;
 409                                         clock-accuracy = <50000000>;
 410                                 };
 411
 412                                 clk32k: slck {
 413                                         compatible = "atmel,at91sam9x5-clk-slow";
 414                                         #clock-cells = <0>;
 415                                         clocks = <&slow_rc_osc>, <&slow_osc>;
 416                                 };
 417                         };
 418
 419                         mmc0: mmc@f0008000 {
 420                                 compatible = "atmel,hsmci";
 421                                 reg = <0xf0008000 0x600>;
 422                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
 423                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
 424                                 dma-names = "rxtx";
 425                                 clocks = <&mci0_clk>;
 426                                 clock-names = "mci_clk";
 427                                 #address-cells = <1>;
 428                                 #size-cells = <0>;
 429                                 status = "disabled";
 430                         };
 431
 432                         tcb0: timer@f8008000 {
 433                                 compatible = "atmel,at91sam9x5-tcb";
 434                                 reg = <0xf8008000 0x100>;
 435                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 436                                 clocks = <&tcb_clk>, <&clk32k>;
 437                                 clock-names = "t0_clk", "slow_clk";
 438                         };
 439
 440                         tcb1: timer@f800c000 {
 441                                 compatible = "atmel,at91sam9x5-tcb";
 442                                 reg = <0xf800c000 0x100>;
 443                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 444                                 clocks = <&tcb_clk>, <&clk32k>;
 445                                 clock-names = "t0_clk", "slow_clk";
 446                         };
 447
 448                         hlcdc: hlcdc@f8038000 {
 449                                 compatible = "atmel,at91sam9n12-hlcdc";
 450                                 reg = <0xf8038000 0x2000>;
 451                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
 452                                 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
 453                                 clock-names = "periph_clk", "sys_clk", "slow_clk";
 454                                 status = "disabled";
 455
 456                                 hlcdc-display-controller {
 457                                         compatible = "atmel,hlcdc-display-controller";
 458                                         #address-cells = <1>;
 459                                         #size-cells = <0>;
 460
 461                                         port@0 {
 462                                                 #address-cells = <1>;
 463                                                 #size-cells = <0>;
 464                                                 reg = <0>;
 465                                         };
 466                                 };
 467
 468                                 hlcdc_pwm: hlcdc-pwm {
 469                                         compatible = "atmel,hlcdc-pwm";
 470                                         pinctrl-names = "default";
 471                                         pinctrl-0 = <&pinctrl_lcd_pwm>;
 472                                         #pwm-cells = <3>;
 473                                 };
 474                         };
 475
 476                         dma: dma-controller@ffffec00 {
 477                                 compatible = "atmel,at91sam9g45-dma";
 478                                 reg = <0xffffec00 0x200>;
 479                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
 480                                 #dma-cells = <2>;
 481                                 clocks = <&dma0_clk>;
 482                                 clock-names = "dma_clk";
 483                         };
 484
 485                         pinctrl@fffff400 {
 486                                 #address-cells = <1>;
 487                                 #size-cells = <1>;
 488                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 489                                 ranges = <0xfffff400 0xfffff400 0x800>;
 490
 491                                 atmel,mux-mask = <
 492                                       /*    A         B          C     */
 493                                        0xffffffff 0xffe07983 0x00000000  /* pioA */
 494                                        0x00040000 0x00047e0f 0x00000000  /* pioB */
 495                                        0xfdffffff 0x07c00000 0xb83fffff  /* pioC */
 496                                        0x003fffff 0x003f8000 0x00000000  /* pioD */
 497                                       >;
 498
 499                                 /* shared pinctrl settings */
 500                                 dbgu {
 501                                         pinctrl_dbgu: dbgu-0 {
 502                                                 atmel,pins =
 503                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA9 periph A */
 504                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA10 periph with pullup */
 505                                         };
 506                                 };
 507
 508                                 lcd {
 509                                         pinctrl_lcd_base: lcd-base-0 {
 510                                                 atmel,pins =
 511                                                         <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDVSYNC */
 512                                                          AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDHSYNC */
 513                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDDISP */
 514                                                          AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDDEN */
 515                                                          AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
 516                                         };
 517
 518                                         pinctrl_lcd_pwm: lcd-pwm-0 {
 519                                                 atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;    /* LCDPWM */
 520                                         };
 521
 522                                         pinctrl_lcd_rgb888: lcd-rgb-3 {
 523                                                 atmel,pins =
 524                                                         <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD0 pin */
 525                                                          AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
 526                                                          AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
 527                                                          AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
 528                                                          AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
 529                                                          AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
 530                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
 531                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
 532                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD8 pin */
 533                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
 534                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
 535                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
 536                                                          AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
 537                                                          AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
 538                                                          AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
 539                                                          AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD15 pin */
 540                                                          AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD16 pin */
 541                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD17 pin */
 542                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD18 pin */
 543                                                          AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD19 pin */
 544                                                          AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD20 pin */
 545                                                          AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD21 pin */
 546                                                          AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD22 pin */
 547                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
 548                                         };
 549                                 };
 550
 551                                 usart0 {
 552                                         pinctrl_usart0: usart0-0 {
 553                                                 atmel,pins =
 554                                                         <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
 555                                                          AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA0 periph A */
 556                                         };
 557
 558                                         pinctrl_usart0_rts: usart0_rts-0 {
 559                                                 atmel,pins =
 560                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A */
 561                                         };
 562
 563                                         pinctrl_usart0_cts: usart0_cts-0 {
 564                                                 atmel,pins =
 565                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA3 periph A */
 566                                         };
 567                                 };
 568
 569                                 usart1 {
 570                                         pinctrl_usart1: usart1-0 {
 571                                                 atmel,pins =
 572                                                         <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
 573                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA5 periph A */
 574                                         };
 575                                 };
 576
 577                                 usart2 {
 578                                         pinctrl_usart2: usart2-0 {
 579                                                 atmel,pins =
 580                                                         <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
 581                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA7 periph A */
 582                                         };
 583
 584                                         pinctrl_usart2_rts: usart2_rts-0 {
 585                                                 atmel,pins =
 586                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB0 periph B */
 587                                         };
 588
 589                                         pinctrl_usart2_cts: usart2_cts-0 {
 590                                                 atmel,pins =
 591                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB1 periph B */
 592                                         };
 593                                 };
 594
 595                                 usart3 {
 596                                         pinctrl_usart3: usart3-0 {
 597                                                 atmel,pins =
 598                                                         <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PC23 periph B with pullup */
 599                                                          AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
 600                                         };
 601
 602                                         pinctrl_usart3_rts: usart3_rts-0 {
 603                                                 atmel,pins =
 604                                                         <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
 605                                         };
 606
 607                                         pinctrl_usart3_cts: usart3_cts-0 {
 608                                                 atmel,pins =
 609                                                         <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
 610                                         };
 611                                 };
 612
 613                                 uart0 {
 614                                         pinctrl_uart0: uart0-0 {
 615                                                 atmel,pins =
 616                                                         <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
 617                                                          AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* PC8 periph C */
 618                                         };
 619                                 };
 620
 621                                 uart1 {
 622                                         pinctrl_uart1: uart1-0 {
 623                                                 atmel,pins =
 624                                                         <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* PC17 periph C with pullup */
 625                                                          AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */
 626                                         };
 627                                 };
 628
 629                                 nand {
 630                                         pinctrl_nand: nand-0 {
 631                                                 atmel,pins =
 632                                                         <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PD5 gpio RDY pin pull_up*/
 633                                                          AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;    /* PD4 gpio enable pin pull_up */
 634                                         };
 635                                 };
 636
 637                                 mmc0 {
 638                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 639                                                 atmel,pins =
 640                                                         <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 641                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA16 periph A with pullup */
 642                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA15 periph A with pullup */
 643                                         };
 644
 645                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 646                                                 atmel,pins =
 647                                                         <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA18 periph A with pullup */
 648                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA19 periph A with pullup */
 649                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA20 periph A with pullup */
 650                                         };
 651
 652                                         pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
 653                                                 atmel,pins =
 654                                                         <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA11 periph B with pullup */
 655                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA12 periph B with pullup */
 656                                                          AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA13 periph B with pullup */
 657                                                          AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PA14 periph B with pullup */
 658                                         };
 659                                 };
 660
 661                                 ssc0 {
 662                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 663                                                 atmel,pins =
 664                                                         <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA24 periph B */
 665                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
 666                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
 667                                         };
 668
 669                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 670                                                 atmel,pins =
 671                                                         <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 672                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 673                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
 674                                         };
 675                                 };
 676
 677                                 spi0 {
 678                                         pinctrl_spi0: spi0-0 {
 679                                                 atmel,pins =
 680                                                         <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A SPI0_MISO pin */
 681                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A SPI0_MOSI pin */
 682                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
 683                                         };
 684                                 };
 685
 686                                 spi1 {
 687                                         pinctrl_spi1: spi1-0 {
 688                                                 atmel,pins =
 689                                                         <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA21 periph B SPI1_MISO pin */
 690                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B SPI1_MOSI pin */
 691                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
 692                                         };
 693                                 };
 694
 695                                 i2c0 {
 696                                         pinctrl_i2c0: i2c0-0 {
 697                                                 atmel,pins =
 698                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
 699                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 700                                         };
 701                                 };
 702
 703                                 i2c1 {
 704                                         pinctrl_i2c1: i2c1-0 {
 705                                                 atmel,pins =
 706                                                         <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
 707                                                          AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 708                                         };
 709                                 };
 710
 711                                 tcb0 {
 712                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 713                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 714                                         };
 715
 716                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 717                                                 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 718                                         };
 719
 720                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 721                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 722                                         };
 723
 724                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 725                                                 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 726                                         };
 727
 728                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 729                                                 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 730                                         };
 731
 732                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 733                                                 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 734                                         };
 735
 736                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 737                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 738                                         };
 739
 740                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 741                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 742                                         };
 743
 744                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 745                                                 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 746                                         };
 747                                 };
 748
 749                                 tcb1 {
 750                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 751                                                 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 752                                         };
 753
 754                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 755                                                 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 756                                         };
 757
 758                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 759                                                 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 760                                         };
 761
 762                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 763                                                 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 764                                         };
 765
 766                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 767                                                 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 768                                         };
 769
 770                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 771                                                 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 772                                         };
 773
 774                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 775                                                 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 776                                         };
 777
 778                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 779                                                 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 780                                         };
 781
 782                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 783                                                 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 784                                         };
 785                                 };
 786
 787                                 pioA: gpio@fffff400 {
 788                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 789                                         reg = <0xfffff400 0x200>;
 790                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 791                                         #gpio-cells = <2>;
 792                                         gpio-controller;
 793                                         interrupt-controller;
 794                                         #interrupt-cells = <2>;
 795                                         clocks = <&pioAB_clk>;
 796                                 };
 797
 798                                 pioB: gpio@fffff600 {
 799                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 800                                         reg = <0xfffff600 0x200>;
 801                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 802                                         #gpio-cells = <2>;
 803                                         gpio-controller;
 804                                         interrupt-controller;
 805                                         #interrupt-cells = <2>;
 806                                         clocks = <&pioAB_clk>;
 807                                 };
 808
 809                                 pioC: gpio@fffff800 {
 810                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 811                                         reg = <0xfffff800 0x200>;
 812                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 813                                         #gpio-cells = <2>;
 814                                         gpio-controller;
 815                                         interrupt-controller;
 816                                         #interrupt-cells = <2>;
 817                                         clocks = <&pioCD_clk>;
 818                                 };
 819
 820                                 pioD: gpio@fffffa00 {
 821                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 822                                         reg = <0xfffffa00 0x200>;
 823                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 824                                         #gpio-cells = <2>;
 825                                         gpio-controller;
 826                                         interrupt-controller;
 827                                         #interrupt-cells = <2>;
 828                                         clocks = <&pioCD_clk>;
 829                                 };
 830                         };
 831
 832                         dbgu: serial@fffff200 {
 833                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 834                                 reg = <0xfffff200 0x200>;
 835                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 836                                 pinctrl-names = "default";
 837                                 pinctrl-0 = <&pinctrl_dbgu>;
 838                                 clocks = <&mck>;
 839                                 clock-names = "usart";
 840                                 status = "disabled";
 841                         };
 842
 843                         ssc0: ssc@f0010000 {
 844                                 compatible = "atmel,at91sam9g45-ssc";
 845                                 reg = <0xf0010000 0x4000>;
 846                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
 847                                 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
 848                                        <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
 849                                 dma-names = "tx", "rx";
 850                                 pinctrl-names = "default";
 851                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 852                                 clocks = <&ssc0_clk>;
 853                                 clock-names = "pclk";
 854                                 status = "disabled";
 855                         };
 856
 857                         usart0: serial@f801c000 {
 858                                 compatible = "atmel,at91sam9260-usart";
 859                                 reg = <0xf801c000 0x4000>;
 860                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
 861                                 pinctrl-names = "default";
 862                                 pinctrl-0 = <&pinctrl_usart0>;
 863                                 clocks = <&usart0_clk>;
 864                                 clock-names = "usart";
 865                                 status = "disabled";
 866                         };
 867
 868                         usart1: serial@f8020000 {
 869                                 compatible = "atmel,at91sam9260-usart";
 870                                 reg = <0xf8020000 0x4000>;
 871                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 872                                 pinctrl-names = "default";
 873                                 pinctrl-0 = <&pinctrl_usart1>;
 874                                 clocks = <&usart1_clk>;
 875                                 clock-names = "usart";
 876                                 status = "disabled";
 877                         };
 878
 879                         usart2: serial@f8024000 {
 880                                 compatible = "atmel,at91sam9260-usart";
 881                                 reg = <0xf8024000 0x4000>;
 882                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 883                                 pinctrl-names = "default";
 884                                 pinctrl-0 = <&pinctrl_usart2>;
 885                                 clocks = <&usart2_clk>;
 886                                 clock-names = "usart";
 887                                 status = "disabled";
 888                         };
 889
 890                         usart3: serial@f8028000 {
 891                                 compatible = "atmel,at91sam9260-usart";
 892                                 reg = <0xf8028000 0x4000>;
 893                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 894                                 pinctrl-names = "default";
 895                                 pinctrl-0 = <&pinctrl_usart3>;
 896                                 clocks = <&usart3_clk>;
 897                                 clock-names = "usart";
 898                                 status = "disabled";
 899                         };
 900
 901                         i2c0: i2c@f8010000 {
 902                                 compatible = "atmel,at91sam9x5-i2c";
 903                                 reg = <0xf8010000 0x100>;
 904                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
 905                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
 906                                        <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
 907                                 dma-names = "tx", "rx";
 908                                 #address-cells = <1>;
 909                                 #size-cells = <0>;
 910                                 pinctrl-names = "default";
 911                                 pinctrl-0 = <&pinctrl_i2c0>;
 912                                 clocks = <&twi0_clk>;
 913                                 status = "disabled";
 914                         };
 915
 916                         i2c1: i2c@f8014000 {
 917                                 compatible = "atmel,at91sam9x5-i2c";
 918                                 reg = <0xf8014000 0x100>;
 919                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
 920                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
 921                                        <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
 922                                 dma-names = "tx", "rx";
 923                                 #address-cells = <1>;
 924                                 #size-cells = <0>;
 925                                 pinctrl-names = "default";
 926                                 pinctrl-0 = <&pinctrl_i2c1>;
 927                                 clocks = <&twi1_clk>;
 928                                 status = "disabled";
 929                         };
 930
 931                         spi0: spi@f0000000 {
 932                                 #address-cells = <1>;
 933                                 #size-cells = <0>;
 934                                 compatible = "atmel,at91rm9200-spi";
 935                                 reg = <0xf0000000 0x100>;
 936                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
 937                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
 938                                        <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
 939                                 dma-names = "tx", "rx";
 940                                 pinctrl-names = "default";
 941                                 pinctrl-0 = <&pinctrl_spi0>;
 942                                 clocks = <&spi0_clk>;
 943                                 clock-names = "spi_clk";
 944                                 status = "disabled";
 945                         };
 946
 947                         spi1: spi@f0004000 {
 948                                 #address-cells = <1>;
 949                                 #size-cells = <0>;
 950                                 compatible = "atmel,at91rm9200-spi";
 951                                 reg = <0xf0004000 0x100>;
 952                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
 953                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
 954                                        <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
 955                                 dma-names = "tx", "rx";
 956                                 pinctrl-names = "default";
 957                                 pinctrl-0 = <&pinctrl_spi1>;
 958                                 clocks = <&spi1_clk>;
 959                                 clock-names = "spi_clk";
 960                                 status = "disabled";
 961                         };
 962
 963                         watchdog@fffffe40 {
 964                                 compatible = "atmel,at91sam9260-wdt";
 965                                 reg = <0xfffffe40 0x10>;
 966                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 967                                 clocks = <&clk32k>;
 968                                 atmel,watchdog-type = "hardware";
 969                                 atmel,reset-type = "all";
 970                                 atmel,dbg-halt;
 971                                 status = "disabled";
 972                         };
 973
 974                         rtc@fffffeb0 {
 975                                 compatible = "atmel,at91rm9200-rtc";
 976                                 reg = <0xfffffeb0 0x40>;
 977                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 978                                 clocks = <&clk32k>;
 979                                 status = "disabled";
 980                         };
 981
 982                         pwm0: pwm@f8034000 {
 983                                 compatible = "atmel,at91sam9rl-pwm";
 984                                 reg = <0xf8034000 0x300>;
 985                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
 986                                 #pwm-cells = <3>;
 987                                 clocks = <&pwm_clk>;
 988                                 status = "disabled";
 989                         };
 990
 991                         usb1: gadget@f803c000 {
 992                                 compatible = "atmel,at91sam9260-udc";
 993                                 reg = <0xf803c000 0x4000>;
 994                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
 995                                 clocks = <&udphs_clk>, <&udpck>;
 996                                 clock-names = "pclk", "hclk";
 997                                 status = "disabled";
 998                         };
 999                 };
1000
1001                 nand0: nand@40000000 {
1002                         compatible = "atmel,at91rm9200-nand";
1003                         #address-cells = <1>;
1004                         #size-cells = <1>;
1005                         reg = < 0x40000000 0x10000000
1006                                 0xffffe000 0x00000600
1007                                 0xffffe600 0x00000200
1008                                 0x00108000 0x00018000
1009                                >;
1010                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1011                         atmel,nand-addr-offset = <21>;
1012                         atmel,nand-cmd-offset = <22>;
1013                         atmel,nand-has-dma;
1014                         pinctrl-names = "default";
1015                         pinctrl-0 = <&pinctrl_nand>;
1016                         gpios = <&pioD 5 GPIO_ACTIVE_HIGH
1017                                  &pioD 4 GPIO_ACTIVE_HIGH
1018                                  0
1019                                 >;
1020                         status = "disabled";
1021                 };
1022
1023                 usb0: ohci@00500000 {
1024                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1025                         reg = <0x00500000 0x00100000>;
1026                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1027                         clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1028                         clock-names = "ohci_clk", "hclk", "uhpck";
1029                         status = "disabled";
1030                 };
1031         };
1032
1033         i2c@0 {
1034                 compatible = "i2c-gpio";
1035                 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1036                          &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1037                         >;
1038                 i2c-gpio,sda-open-drain;
1039                 i2c-gpio,scl-open-drain;
1040                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1041                 #address-cells = <1>;
1042                 #size-cells = <0>;
1043                 status = "disabled";
1044         };
1045 };