arch/arm/boot/dts/bcm-cygnus.dtsi

   1 /*
   2  *  BSD LICENSE
   3  *
   4  *  Copyright(c) 2014 Broadcom Corporation.  All rights reserved.
   5  *
   6  *  Redistribution and use in source and binary forms, with or without
   7  *  modification, are permitted provided that the following conditions
   8  *  are met:
   9  *
  10  *    * Redistributions of source code must retain the above copyright
  11  *      notice, this list of conditions and the following disclaimer.
  12  *    * Redistributions in binary form must reproduce the above copyright
  13  *      notice, this list of conditions and the following disclaimer in
  14  *      the documentation and/or other materials provided with the
  15  *      distribution.
  16  *    * Neither the name of Broadcom Corporation nor the names of its
  17  *      contributors may be used to endorse or promote products derived
  18  *      from this software without specific prior written permission.
  19  *
  20  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #include <dt-bindings/interrupt-controller/arm-gic.h>
  34 #include <dt-bindings/interrupt-controller/irq.h>
  35 #include <dt-bindings/clock/bcm-cygnus.h>
  36
  37 #include "skeleton.dtsi"
  38
  39 / {
  40         compatible = "brcm,cygnus";
  41         model = "Broadcom Cygnus SoC";
  42         interrupt-parent = <&gic>;
  43
  44         cpus {
  45                 #address-cells = <1>;
  46                 #size-cells = <0>;
  47
  48                 cpu@0 {
  49                         device_type = "cpu";
  50                         compatible = "arm,cortex-a9";
  51                         next-level-cache = <&L2>;
  52                         reg = <0x0>;
  53                 };
  54         };
  55
  56         /include/ "bcm-cygnus-clock.dtsi"
  57
  58         core {
  59                 compatible = "simple-bus";
  60                 ranges = <0x00000000 0x19000000 0x1000000>;
  61                 #address-cells = <1>;
  62                 #size-cells = <1>;
  63
  64                 timer@20200 {
  65                         compatible = "arm,cortex-a9-global-timer";
  66                         reg = <0x20200 0x100>;
  67                         interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
  68                         clocks = <&periph_clk>;
  69                 };
  70
  71                 gic: interrupt-controller@21000 {
  72                         compatible = "arm,cortex-a9-gic";
  73                         #interrupt-cells = <3>;
  74                         #address-cells = <0>;
  75                         interrupt-controller;
  76                         reg = <0x21000 0x1000>,
  77                               <0x20100 0x100>;
  78                 };
  79
  80                 L2: l2-cache {
  81                         compatible = "arm,pl310-cache";
  82                         reg = <0x22000 0x1000>;
  83                         cache-unified;
  84                         cache-level = <2>;
  85                 };
  86         };
  87
  88         axi {
  89                 compatible = "simple-bus";
  90                 ranges;
  91                 #address-cells = <1>;
  92                 #size-cells = <1>;
  93
  94                 otp: otp@0301c800 {
  95                         compatible = "brcm,ocotp";
  96                         reg = <0x0301c800 0x2c>;
  97                         brcm,ocotp-size = <2048>;
  98                         status = "disabled";
  99                 };
 100
 101                 pcie_phy: phy@0301d0a0 {
 102                         compatible = "brcm,cygnus-pcie-phy";
 103                         reg = <0x0301d0a0 0x14>;
 104                         #address-cells = <1>;
 105                         #size-cells = <0>;
 106
 107                         pcie0_phy: phy@0 {
 108                                 reg = <0>;
 109                                 #phy-cells = <0>;
 110                         };
 111
 112                         pcie1_phy: phy@1 {
 113                                 reg = <1>;
 114                                 #phy-cells = <0>;
 115                         };
 116                 };
 117
 118                 pinctrl: pinctrl@0301d0c8 {
 119                         compatible = "brcm,cygnus-pinmux";
 120                         reg = <0x0301d0c8 0x30>,
 121                               <0x0301d24c 0x2c>;
 122                 };
 123
 124                 mailbox: mailbox@03024024 {
 125                         compatible = "brcm,iproc-mailbox";
 126                         reg = <0x03024024 0x40>;
 127                         interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 128                         #interrupt-cells = <1>;
 129                         interrupt-controller;
 130                         #mbox-cells = <1>;
 131                 };
 132
 133                 gpio_crmu: gpio@03024800 {
 134                         compatible = "brcm,cygnus-crmu-gpio";
 135                         reg = <0x03024800 0x50>,
 136                               <0x03024008 0x18>;
 137                         ngpios = <6>;
 138                         #gpio-cells = <2>;
 139                         gpio-controller;
 140                         interrupt-controller;
 141                         interrupt-parent = <&mailbox>;
 142                         interrupts = <0>;
 143                 };
 144
 145                 mdio: mdio@18002000 {
 146                         compatible = "brcm,iproc-mdio";
 147                         reg = <0x18002000 0x8>;
 148                         #size-cells = <1>;
 149                         #address-cells = <0>;
 150                         status = "disabled";
 151
 152                         gphy0: ethernet-phy@0 {
 153                                 reg = <0>;
 154                         };
 155
 156                         gphy1: ethernet-phy@1 {
 157                                 reg = <1>;
 158                         };
 159                 };
 160
 161                 switch: switch@18007000 {
 162                         compatible = "brcm,bcm11360-srab", "brcm,cygnus-srab";
 163                         reg = <0x18007000 0x1000>;
 164                         status = "disabled";
 165
 166                         ports {
 167                                 #address-cells = <1>;
 168                                 #size-cells = <0>;
 169
 170                                 port@0 {
 171                                         reg = <0>;
 172                                         phy-handle = <&gphy0>;
 173                                         phy-mode = "rgmii";
 174                                 };
 175
 176                                 port@1 {
 177                                         reg = <1>;
 178                                         phy-handle = <&gphy1>;
 179                                         phy-mode = "rgmii";
 180                                 };
 181
 182                                 port@8 {
 183                                         reg = <8>;
 184                                         label = "cpu";
 185                                         ethernet = <&eth0>;
 186                                         fixed-link {
 187                                                 speed = <1000>;
 188                                                 full-duplex;
 189                                         };
 190                                 };
 191                         };
 192                 };
 193
 194                 i2c0: i2c@18008000 {
 195                         compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
 196                         reg = <0x18008000 0x100>;
 197                         #address-cells = <1>;
 198                         #size-cells = <0>;
 199                         interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
 200                         clock-frequency = <100000>;
 201                         status = "disabled";
 202                 };
 203
 204                 wdt0: wdt@18009000 {
 205                         compatible = "arm,sp805" , "arm,primecell";
 206                         reg = <0x18009000 0x1000>;
 207                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 208                         clocks = <&axi81_clk>;
 209                         clock-names = "apb_pclk";
 210                 };
 211
 212                 gpio_ccm: gpio@1800a000 {
 213                         compatible = "brcm,cygnus-ccm-gpio";
 214                         reg = <0x1800a000 0x50>,
 215                               <0x0301d164 0x20>;
 216                         ngpios = <24>;
 217                         #gpio-cells = <2>;
 218                         gpio-controller;
 219                         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 220                         interrupt-controller;
 221                 };
 222
 223                 i2c1: i2c@1800b000 {
 224                         compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
 225                         reg = <0x1800b000 0x100>;
 226                         #address-cells = <1>;
 227                         #size-cells = <0>;
 228                         interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
 229                         clock-frequency = <100000>;
 230                         status = "disabled";
 231                 };
 232
 233                 pcie0: pcie@18012000 {
 234                         compatible = "brcm,iproc-pcie";
 235                         reg = <0x18012000 0x1000>;
 236
 237                         #interrupt-cells = <1>;
 238                         interrupt-map-mask = <0 0 0 0>;
 239                         interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
 240
 241                         linux,pci-domain = <0>;
 242
 243                         bus-range = <0x00 0xff>;
 244
 245                         #address-cells = <3>;
 246                         #size-cells = <2>;
 247                         device_type = "pci";
 248                         ranges = <0x81000000 0 0          0x28000000 0 0x00010000
 249                                   0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
 250
 251                         phys = <&pcie0_phy>;
 252                         phy-names = "pcie-phy";
 253
 254                         status = "disabled";
 255
 256                         msi-parent = <&msi0>;
 257                         msi0: msi-controller {
 258                                 compatible = "brcm,iproc-msi";
 259                                 msi-controller;
 260                                 interrupt-parent = <&gic>;
 261                                 interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
 262                                              <GIC_SPI 97 IRQ_TYPE_NONE>,
 263                                              <GIC_SPI 98 IRQ_TYPE_NONE>,
 264                                              <GIC_SPI 99 IRQ_TYPE_NONE>;
 265                         };
 266                 };
 267
 268                 pcie1: pcie@18013000 {
 269                         compatible = "brcm,iproc-pcie";
 270                         reg = <0x18013000 0x1000>;
 271
 272                         #interrupt-cells = <1>;
 273                         interrupt-map-mask = <0 0 0 0>;
 274                         interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
 275
 276                         linux,pci-domain = <1>;
 277
 278                         bus-range = <0x00 0xff>;
 279
 280                         #address-cells = <3>;
 281                         #size-cells = <2>;
 282                         device_type = "pci";
 283                         ranges = <0x81000000 0 0          0x48000000 0 0x00010000
 284                                   0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
 285
 286                         phys = <&pcie1_phy>;
 287                         phy-names = "pcie-phy";
 288
 289                         status = "disabled";
 290
 291                         msi-parent = <&msi1>;
 292                         msi1: msi-controller {
 293                                 compatible = "brcm,iproc-msi";
 294                                 msi-controller;
 295                                 interrupt-parent = <&gic>;
 296                                 interrupts = <GIC_SPI 102 IRQ_TYPE_NONE>,
 297                                              <GIC_SPI 103 IRQ_TYPE_NONE>,
 298                                              <GIC_SPI 104 IRQ_TYPE_NONE>,
 299                                              <GIC_SPI 105 IRQ_TYPE_NONE>;
 300                         };
 301                 };
 302
 303                 uart0: serial@18020000 {
 304                         compatible = "snps,dw-apb-uart";
 305                         reg = <0x18020000 0x100>;
 306                         reg-shift = <2>;
 307                         reg-io-width = <4>;
 308                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 309                         clocks = <&axi81_clk>;
 310                         clock-frequency = <100000000>;
 311                         status = "disabled";
 312                 };
 313
 314                 uart1: serial@18021000 {
 315                         compatible = "snps,dw-apb-uart";
 316                         reg = <0x18021000 0x100>;
 317                         reg-shift = <2>;
 318                         reg-io-width = <4>;
 319                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 320                         clocks = <&axi81_clk>;
 321                         clock-frequency = <100000000>;
 322                         status = "disabled";
 323                 };
 324
 325                 uart2: serial@18022000 {
 326                         compatible = "snps,dw-apb-uart";
 327                         reg = <0x18020000 0x100>;
 328                         reg-shift = <2>;
 329                         reg-io-width = <4>;
 330                         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 331                         clocks = <&axi81_clk>;
 332                         clock-frequency = <100000000>;
 333                         status = "disabled";
 334                 };
 335
 336                 uart3: serial@18023000 {
 337                         compatible = "snps,dw-apb-uart";
 338                         reg = <0x18023000 0x100>;
 339                         reg-shift = <2>;
 340                         reg-io-width = <4>;
 341                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 342                         clocks = <&axi81_clk>;
 343                         clock-frequency = <100000000>;
 344                         status = "disabled";
 345                 };
 346
 347                 eth0: ethernet@18042000 {
 348                         compatible = "brcm,amac";
 349                         reg = <0x18042000 0x1000>,
 350                               <0x18110000 0x1000>;
 351                         reg-names = "amac_base", "idm_base";
 352                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 353                         status = "disabled";
 354                 };
 355
 356                 nand: nand@18046000 {
 357                         compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
 358                         reg = <0x18046000 0x600>, <0xf8105408 0x600>,
 359                               <0x18046f00 0x20>;
 360                         reg-names = "nand", "iproc-idm", "iproc-ext";
 361                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 362
 363                         #address-cells = <1>;
 364                         #size-cells = <0>;
 365
 366                         brcm,nand-has-wp;
 367                 };
 368
 369                 gpio_asiu: gpio@180a5000 {
 370                         compatible = "brcm,cygnus-asiu-gpio";
 371                         reg = <0x180a5000 0x668>;
 372                         ngpios = <146>;
 373                         #gpio-cells = <2>;
 374                         gpio-controller;
 375
 376                         interrupt-controller;
 377                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 378                         gpio-ranges = <&pinctrl 0 42 1>,
 379                                         <&pinctrl 1 44 3>,
 380                                         <&pinctrl 4 48 1>,
 381                                         <&pinctrl 5 50 3>,
 382                                         <&pinctrl 8 126 1>,
 383                                         <&pinctrl 9 155 1>,
 384                                         <&pinctrl 10 152 1>,
 385                                         <&pinctrl 11 154 1>,
 386                                         <&pinctrl 12 153 1>,
 387                                         <&pinctrl 13 127 3>,
 388                                         <&pinctrl 16 140 1>,
 389                                         <&pinctrl 17 145 7>,
 390                                         <&pinctrl 24 130 10>,
 391                                         <&pinctrl 34 141 4>,
 392                                         <&pinctrl 38 54 1>,
 393                                         <&pinctrl 39 56 3>,
 394                                         <&pinctrl 42 60 3>,
 395                                         <&pinctrl 45 64 3>,
 396                                         <&pinctrl 48 68 2>,
 397                                         <&pinctrl 50 84 6>,
 398                                         <&pinctrl 56 94 6>,
 399                                         <&pinctrl 62 72 1>,
 400                                         <&pinctrl 63 70 1>,
 401                                         <&pinctrl 64 80 1>,
 402                                         <&pinctrl 65 74 3>,
 403                                         <&pinctrl 68 78 1>,
 404                                         <&pinctrl 69 82 1>,
 405                                         <&pinctrl 70 156 17>,
 406                                         <&pinctrl 87 104 12>,
 407                                         <&pinctrl 99 102 2>,
 408                                         <&pinctrl 101 90 4>,
 409                                         <&pinctrl 105 116 6>,
 410                                         <&pinctrl 111 100 2>,
 411                                         <&pinctrl 113 122 4>,
 412                                         <&pinctrl 123 11 1>,
 413                                         <&pinctrl 124 38 4>,
 414                                         <&pinctrl 128 43 1>,
 415                                         <&pinctrl 129 47 1>,
 416                                         <&pinctrl 130 49 1>,
 417                                         <&pinctrl 131 53 1>,
 418                                         <&pinctrl 132 55 1>,
 419                                         <&pinctrl 133 59 1>,
 420                                         <&pinctrl 134 63 1>,
 421                                         <&pinctrl 135 67 1>,
 422                                         <&pinctrl 136 71 1>,
 423                                         <&pinctrl 137 73 1>,
 424                                         <&pinctrl 138 77 1>,
 425                                         <&pinctrl 139 79 1>,
 426                                         <&pinctrl 140 81 1>,
 427                                         <&pinctrl 141 83 1>,
 428                                         <&pinctrl 142 10 1>;
 429                 };
 430
 431                 ts_adc_syscon: ts_adc_syscon@180a6000 {
 432                         compatible = "brcm,iproc-ts-adc-syscon", "syscon";
 433                         reg = <0x180a6000 0xc30>;
 434                 };
 435
 436                 touchscreen: touchscreen@180a6000 {
 437                         compatible = "brcm,iproc-touchscreen";
 438                         #address-cells = <1>;
 439                         #size-cells = <1>;
 440                         ts_syscon = <&ts_adc_syscon>;
 441                         clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>;
 442                         clock-names = "tsc_clk";
 443                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 444                         status = "disabled";
 445                 };
 446
 447                 v3d: v3d@180a2000 {
 448                         compatible = "brcm,cygnus-v3d";
 449                         reg = <0x180a2000 0x1000>;
 450                         clocks = <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>;
 451                         clock-names = "v3d_clk";
 452                         interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
 453                         status = "disabled";
 454                 };
 455
 456                 vc4: gpu {
 457                         compatible = "brcm,cygnus-vc4";
 458                 };
 459
 460                 adc: adc@180a6000 {
 461                         compatible = "brcm,iproc-static-adc";
 462                         #io-channel-cells = <1>;
 463                         io-channel-ranges;
 464                         adc-syscon = <&ts_adc_syscon>;
 465                         clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>;
 466                         clock-names = "tsc_clk";
 467                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 468                         status = "disabled";
 469                 };
 470         };
 471 };