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ARM: dts: imx6: add more Ka-Ro TX6 board variants
[karo-tx-linux.git] / arch / arm / boot / dts / imx6q-tx6q-11x0-mb7.dts
1 /*
2  * Copyright 2014 Lothar Waßmann <LW@KARO-electronics.de>
3  *
4  * The code contained herein is licensed under the GNU General Public
5  * License. You may obtain a copy of the GNU General Public License
6  * Version 2 at the following locations:
7  *
8  * http://www.opensource.org/licenses/gpl-license.html
9  * http://www.gnu.org/copyleft/gpl.html
10  */
11
12 /dts-v1/;
13 #include "imx6q.dtsi"
14 #include "imx6qdl-tx6.dtsi"
15
16 / {
17         model = "Ka-Ro electronics TX6Q-1110/-1130 Module";
18         compatible = "karo,imx6q-tx6q", "fsl,imx6q";
19
20         aliases {
21                 display = &lvds0;
22                 ipu1 = &ipu2;
23                 lvds0 = &lvds0;
24                 lvds1 = &lvds1;
25                 mxcfb0 = &lvds0;
26                 mxcfb1 = &lvds1;
27         };
28
29         backlight0: backlight0 {
30                 compatible = "pwm-backlight";
31                 pwms = <&pwm2 0 500000 PWM_POLARITY_INVERTED>;
32                 power-supply = <&reg_lcd0_pwr>;
33                 /*
34                  * a poor man's way to create a 1:1 relationship between
35                  * the PWM value and the actual duty cycle
36                  */
37                 brightness-levels = < 0  1  2  3  4  5  6  7  8  9
38                                      10 11 12 13 14 15 16 17 18 19
39                                      20 21 22 23 24 25 26 27 28 29
40                                      30 31 32 33 34 35 36 37 38 39
41                                      40 41 42 43 44 45 46 47 48 49
42                                      50 51 52 53 54 55 56 57 58 59
43                                      60 61 62 63 64 65 66 67 68 69
44                                      70 71 72 73 74 75 76 77 78 79
45                                      80 81 82 83 84 85 86 87 88 89
46                                      90 91 92 93 94 95 96 97 98 99
47                                     100>;
48                 default-brightness-level = <50>;
49         };
50
51         backlight1: backlight1 {
52                 compatible = "pwm-backlight";
53                 pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>;
54                 power-supply = <&reg_lcd1_pwr>;
55                 /*
56                  * a poor man's way to create a 1:1 relationship between
57                  * the PWM value and the actual duty cycle
58                  */
59                 brightness-levels = < 0  1  2  3  4  5  6  7  8  9
60                                      10 11 12 13 14 15 16 17 18 19
61                                      20 21 22 23 24 25 26 27 28 29
62                                      30 31 32 33 34 35 36 37 38 39
63                                      40 41 42 43 44 45 46 47 48 49
64                                      50 51 52 53 54 55 56 57 58 59
65                                      60 61 62 63 64 65 66 67 68 69
66                                      70 71 72 73 74 75 76 77 78 79
67                                      80 81 82 83 84 85 86 87 88 89
68                                      90 91 92 93 94 95 96 97 98 99
69                                     100>;
70                 default-brightness-level = <50>;
71         };
72
73         lvds0: fb@0 {
74                 compatible = "fsl,mxc_sdc_fb";
75                 disp_dev = "ldb";
76                 interface_pix_fmt = "RGB666";
77                 mode_str = "LDB-VGA";
78                 default_bpp = <32>;
79                 int_clk = <0>;
80                 late_init = <0>;
81                 fsl,data-mapping = "spwg";
82                 fsl,data-width = <18>;
83                 status = "okay";
84
85                 display-timings {
86                         native-mode = <&lvds0_timing1>;
87
88                         lvds0_timing0: hsd100pxn1 {
89                                 clock-frequency = <65000000>;
90                                 hactive = <1024>;
91                                 vactive = <768>;
92                                 hback-porch = <220>;
93                                 hfront-porch = <40>;
94                                 vback-porch = <21>;
95                                 vfront-porch = <7>;
96                                 hsync-len = <60>;
97                                 vsync-len = <10>;
98                                 hsync-active = <0>;
99                                 vsync-active = <0>;
100                                 de-active = <1>;
101                                 pixelclk-active = <1>;
102                         };
103
104                         lvds0_timing1: VGA {
105                                 clock-frequency = <25200000>;
106                                 hactive = <640>;
107                                 vactive = <480>;
108                                 hback-porch = <48>;
109                                 hfront-porch = <16>;
110                                 vback-porch = <31>;
111                                 vfront-porch = <12>;
112                                 hsync-len = <96>;
113                                 vsync-len = <2>;
114                                 hsync-active = <0>;
115                                 vsync-active = <0>;
116                                 de-active = <1>;
117                                 pixelclk-active = <0>;
118                         };
119
120                         lvds0_timing2: nl12880bc20 {
121                                 clock-frequency = <71000000>;
122                                 hactive = <1280>;
123                                 vactive = <800>;
124                                 hback-porch = <50>;
125                                 hfront-porch = <50>;
126                                 vback-porch = <5>;
127                                 vfront-porch = <5>;
128                                 hsync-len = <60>;
129                                 vsync-len = <13>;
130                                 hsync-active = <0>;
131                                 vsync-active = <0>;
132                                 de-active = <1>;
133                                 pixelclk-active = <1>;
134                         };
135                 };
136         };
137
138         lvds1: fb@1 {
139                 compatible = "fsl,mxc_sdc_fb";
140                 disp_dev = "ldb";
141                 interface_pix_fmt = "RGB24";
142                 mode_str = "LDB-NL12880BC20";
143                 default_bpp = <32>;
144                 int_clk = <0>;
145                 late_init = <0>;
146                 fsl,data-mapping = "spwg";
147                 fsl,data-width = <18>;
148                 status = "okay";
149
150                 display-timings {
151                         native-mode = <&lvds1_timing2>;
152
153                         lvds1_timing0: hsd100pxn1 {
154                                 clock-frequency = <65000000>;
155                                 hactive = <1024>;
156                                 vactive = <768>;
157                                 hback-porch = <220>;
158                                 hfront-porch = <40>;
159                                 vback-porch = <21>;
160                                 vfront-porch = <7>;
161                                 hsync-len = <60>;
162                                 vsync-len = <10>;
163                                 hsync-active = <0>;
164                                 vsync-active = <0>;
165                                 de-active = <1>;
166                                 pixelclk-active = <1>;
167                         };
168
169                         lvds1_timing1: VGA {
170                                 clock-frequency = <25200000>;
171                                 hactive = <640>;
172                                 vactive = <480>;
173                                 hback-porch = <48>;
174                                 hfront-porch = <16>;
175                                 vback-porch = <31>;
176                                 vfront-porch = <12>;
177                                 hsync-len = <96>;
178                                 vsync-len = <2>;
179                                 hsync-active = <0>;
180                                 vsync-active = <0>;
181                                 de-active = <1>;
182                                 pixelclk-active = <0>;
183                         };
184
185                         lvds1_timing2: nl12880bc20 {
186                                 clock-frequency = <71000000>;
187                                 hactive = <1280>;
188                                 vactive = <800>;
189                                 hback-porch = <50>;
190                                 hfront-porch = <50>;
191                                 vback-porch = <5>;
192                                 vfront-porch = <5>;
193                                 hsync-len = <60>;
194                                 vsync-len = <13>;
195                                 hsync-active = <0>;
196                                 vsync-active = <0>;
197                                 de-active = <1>;
198                                 pixelclk-active = <1>;
199                         };
200                 };
201         };
202 };
203
204 &can1 {
205         status = "disabled";
206 };
207
208 &can2 {
209         xceiver-supply = <&reg_3v3>;
210 };
211
212 &i2c3 {
213         polytouch1: eeti@04 {
214                 compatible = "eeti,egalax_ts";
215                 reg = <0x04>;
216                 pinctrl-names = "default";
217                 pinctrl-0 = <&pinctrl_eeti>;
218                 interrupt-parent = <&gpio3>;
219                 interrupts = <22 0>;
220                 wakeup-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
221                 linux,wakeup;
222         };
223 };
224
225 &iomuxc {
226         imx6q-tx6q-11x0 {
227                 pinctrl_eeti: eetigrp {
228                         fsl,pins = <
229                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b1 /* Interrupt */
230                         >;
231                 };
232         };
233 };
234
235 &ipu2 {
236         status = "disabled";
237 };
238
239 &kpp {
240         status = "disabled"; /* pads partially clash with backlight1 PWM */
241 };
242
243 &ldb {
244         ipu_id = <0>;
245         disp_id = <0>;
246         ext_ref = <0>;
247         mode = "sep0";
248         sec_ipu_id = <0>;
249         sec_disp_id = <1>;
250         status = "okay";
251 };
252
253 &pwm1 {
254         status = "okay";
255 };
256
257 &reg_lcd0_pwr {
258         status = "okay";
259 };
260
261 &reg_lcd1_pwr {
262         status = "okay";
263 };
264
265 &sata {
266         status = "okay";
267 };