arm: dts: tx6: remove bootargs from dts
[karo-tx-linux.git] / arch / arm / boot / dts / imx6qdl-tx6.dtsi
1 /*
2  * Copyright 2013 Lothar WaƟmann <LW@KARO-electronics.de>
3  *
4  * The code contained herein is licensed under the GNU General Public
5  * License. You may obtain a copy of the GNU General Public License
6  * Version 2 at the following locations:
7  *
8  * http://www.opensource.org/licenses/gpl-license.html
9  * http://www.gnu.org/copyleft/gpl.html
10  */
11
12 #include <dt-bindings/gpio/gpio.h>
13
14 / {
15         aliases {
16                 can1 = &can1;
17                 display = &display;
18                 ethernet0 = &fec;
19                 lcdif_23bit_pins_a = &tx6_pinctrl_disp0_1;
20                 lcdif_24bit_pins_a = &tx6_pinctrl_disp0_2;
21                 lvds0 = &lvds0;
22                 lvds1 = &lvds1;
23                 stk5led = &user_led;
24                 usbotg = &usbotg;
25         };
26
27         memory {
28                 reg = <0 0>; /* will be filled by U-Boot */
29         };
30
31         clocks {
32                 #address-cells = <1>;
33                 #size-cells = <0>;
34                 mclk: codec_clock {
35                         compatible = "fixed-clock";
36                         reg = <0>;
37                         #clock-cells = <0>;
38                         clock-frequency = <27000000>;
39                 };
40         };
41
42         backlight@0 {
43                 compatible = "pwm-backlight";
44                 pwms = <&pwm2 0 500000>;
45                 power-supply = <&reg_3v3>;
46                 /*
47                  * a poor man's way to create an inverse 1:1 relationship
48                  * between the PWM value and the actual duty cycle
49                  */
50                 brightness-levels = <100
51                                       99 98 97 96 95 94 93 92 91 90
52                                       89 88 87 86 85 84 83 82 81 80
53                                       79 78 77 76 75 74 73 72 71 70
54                                       69 68 67 66 65 64 63 62 61 60
55                                       59 58 57 56 55 54 53 52 51 50
56                                       49 48 47 46 45 44 43 42 41 40
57                                       39 38 37 36 35 34 33 32 31 30
58                                       29 28 27 26 25 24 23 22 21 20
59                                       19 18 17 16 15 14 13 12 11 10
60                                        9  8  7  6  5  4  3  2  1  0>;
61                 default-brightness-level = <50>;
62         };
63
64         backlight@1 {
65                 compatible = "pwm-backlight";
66                 pwms = <&pwm1 0 500000>;
67                 power-supply = <&reg_3v3>;
68                 /*
69                  * a poor man's way to create a 1:1 relationship between
70                  * the PWM value and the actual duty cycle
71                  */
72                 brightness-levels = < 0  1  2  3  4  5  6  7  8  9
73                                      10 11 12 13 14 15 16 17 18 19
74                                      20 21 22 23 24 25 26 27 28 29
75                                      30 31 32 33 34 35 36 37 38 39
76                                      40 41 42 43 44 45 46 47 48 49
77                                      50 51 52 53 54 55 56 57 58 59
78                                      60 61 62 63 64 65 66 67 68 69
79                                      70 71 72 73 74 75 76 77 78 79
80                                      80 81 82 83 84 85 86 87 88 89
81                                      90 91 92 93 94 95 96 97 98 99
82                                     100>;
83                 default-brightness-level = <50>;
84                 status = "disabled";
85         };
86
87         display: display@di0 {
88                 compatible = "fsl,imx-parallel-display";
89                 crtcs = <&ipu1 0>;
90                 interface-pix-fmt = "rgb24";
91                 pinctrl-names = "default";
92                 pinctrl-0 = <&tx6_pinctrl_disp0_1>;
93                 status = "okay";
94
95                 display-timings {
96                         VGA {
97                                 clock-frequency = <25200000>;
98                                 hactive = <640>;
99                                 vactive = <480>;
100                                 hback-porch = <48>;
101                                 hsync-len = <96>;
102                                 hfront-porch = <16>;
103                                 vback-porch = <31>;
104                                 vsync-len = <2>;
105                                 vfront-porch = <12>;
106                                 hsync-active = <0>;
107                                 vsync-active = <0>;
108                                 de-active = <1>;
109                                 pixelclk-active = <0>;
110                         };
111
112                         ETV570 {
113                                 clock-frequency = <25200000>;
114                                 hactive = <640>;
115                                 vactive = <480>;
116                                 hback-porch = <114>;
117                                 hsync-len = <30>;
118                                 hfront-porch = <16>;
119                                 vback-porch = <32>;
120                                 vsync-len = <3>;
121                                 vfront-porch = <10>;
122                                 hsync-active = <0>;
123                                 vsync-active = <0>;
124                                 de-active = <1>;
125                                 pixelclk-active = <0>;
126                         };
127
128                         ET0350 {
129                                 clock-frequency = <6413760>;
130                                 hactive = <320>;
131                                 vactive = <240>;
132                                 hback-porch = <34>;
133                                 hsync-len = <34>;
134                                 hfront-porch = <20>;
135                                 vback-porch = <15>;
136                                 vsync-len = <3>;
137                                 vfront-porch = <4>;
138                                 hsync-active = <0>;
139                                 vsync-active = <0>;
140                                 de-active = <1>;
141                                 pixelclk-active = <0>;
142                         };
143
144                         ET0430 {
145                                 clock-frequency = <9009000>;
146                                 hactive = <480>;
147                                 vactive = <272>;
148                                 hback-porch = <2>;
149                                 hsync-len = <41>;
150                                 hfront-porch = <2>;
151                                 vback-porch = <2>;
152                                 vsync-len = <10>;
153                                 vfront-porch = <2>;
154                                 hsync-active = <0>;
155                                 vsync-active = <0>;
156                                 de-active = <1>;
157                                 pixelclk-active = <1>;
158                         };
159
160                         ET0500 {
161                                 clock-frequency = <33264000>;
162                                 hactive = <800>;
163                                 vactive = <480>;
164                                 hback-porch = <88>;
165                                 hsync-len = <128>;
166                                 hfront-porch = <40>;
167                                 vback-porch = <33>;
168                                 vsync-len = <2>;
169                                 vfront-porch = <10>;
170                                 hsync-active = <0>;
171                                 vsync-active = <0>;
172                                 de-active = <1>;
173                                 pixelclk-active = <0>;
174                         };
175
176                         ET0700 { /* same as ET0500 */
177                                 clock-frequency = <33264000>;
178                                 hactive = <800>;
179                                 vactive = <480>;
180                                 hback-porch = <88>;
181                                 hsync-len = <128>;
182                                 hfront-porch = <40>;
183                                 vback-porch = <33>;
184                                 vsync-len = <2>;
185                                 vfront-porch = <10>;
186                                 hsync-active = <0>;
187                                 vsync-active = <0>;
188                                 de-active = <1>;
189                                 pixelclk-active = <0>;
190                         };
191
192                         ETQ570 {
193                                 clock-frequency = <6596040>;
194                                 hactive = <320>;
195                                 vactive = <240>;
196                                 hback-porch = <38>;
197                                 hsync-len = <30>;
198                                 hfront-porch = <30>;
199                                 vback-porch = <16>;
200                                 vsync-len = <3>;
201                                 vfront-porch = <4>;
202                                 hsync-active = <0>;
203                                 vsync-active = <0>;
204                                 de-active = <1>;
205                                 pixelclk-active = <0>;
206                         };
207                 };
208         };
209
210         gpio-keys {
211                 compatible = "gpio-keys";
212
213                 power {
214                         label = "Power Button";
215                         gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
216                         linux,code = <116>; /* KEY_POWER */
217                         gpio-key,wakeup;
218                 };
219         };
220
221         leds {
222                 compatible = "gpio-leds";
223
224                 user_led: user {
225                         label = "Heartbeat";
226                         gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
227                         linux,default-trigger = "heartbeat";
228                 };
229         };
230
231         regulators {
232                 compatible = "simple-bus";
233
234                 reg_3v3_etn: 3v3-etn {
235                         compatible = "regulator-fixed";
236                         regulator-name = "3V3_ETN";
237                         regulator-min-microvolt = <3300000>;
238                         regulator-max-microvolt = <3300000>;
239                         gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
240                         enable-active-high;
241                 };
242
243                 reg_2v5: 2v5 {
244                         compatible = "regulator-fixed";
245                         regulator-name = "2V5";
246                         regulator-min-microvolt = <2500000>;
247                         regulator-max-microvolt = <2500000>;
248                         regulator-always-on;
249                 };
250
251                 reg_3v3: 3v3 {
252                         compatible = "regulator-fixed";
253                         regulator-name = "3V3";
254                         regulator-min-microvolt = <3300000>;
255                         regulator-max-microvolt = <3300000>;
256                         regulator-always-on;
257                 };
258
259                 reg_can_xcvr: can-xcvr {
260                         compatible = "regulator-fixed";
261                         regulator-name = "CAN XCVR";
262                         regulator-min-microvolt = <3300000>;
263                         regulator-max-microvolt = <3300000>;
264                         gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
265                         enable-active-low;
266                         pinctrl-names = "default";
267                         pinctrl-0 = <&pinctrl_tx6qdl_flexcan_xcvr>;
268                 };
269
270                 reg_lcd_pwr0: lcd-power@0 {
271                         compatible = "regulator-fixed";
272                         regulator-name = "LCD POWER";
273                         regulator-min-microvolt = <3300000>;
274                         regulator-max-microvolt = <3300000>;
275                         gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
276                         enable-active-high;
277                         regulator-boot-on;
278                 };
279
280                 reg_lcd_pwr1: lcd-power@1 {
281                         compatible = "regulator-fixed";
282                         regulator-name = "LCD POWER";
283                         regulator-min-microvolt = <3300000>;
284                         regulator-max-microvolt = <3300000>;
285                         gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
286                         enable-active-high;
287                         regulator-boot-on;
288                 };
289
290                 reg_lcd_reset: lcd-reset {
291                         compatible = "regulator-fixed";
292                         regulator-name = "LCD RESET";
293                         regulator-min-microvolt = <3300000>;
294                         regulator-max-microvolt = <3300000>;
295                         gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
296                         startup-delay-us = <300000>;
297                         enable-active-high;
298                         regulator-always-on;
299                         regulator-boot-on;
300                 };
301
302                 reg_usbh1_vbus: usbh1_vbus {
303                         compatible = "regulator-fixed";
304                         regulator-name = "usbh1_vbus";
305                         regulator-min-microvolt = <5000000>;
306                         regulator-max-microvolt = <5000000>;
307                         gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
308                         enable-active-high;
309                 };
310
311                 reg_usbotg_vbus: usbotg_vbus {
312                         compatible = "regulator-fixed";
313                         regulator-name = "usbotg_vbus";
314                         regulator-min-microvolt = <5000000>;
315                         regulator-max-microvolt = <5000000>;
316                         gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
317                         enable-active-high;
318                 };
319         };
320
321         sound {
322                 compatible = "fsl,imx6qdl-tx6qdl-sgtl5000",
323                              "fsl,imx-audio-sgtl5000";
324                 model = "sgtl5000-audio";
325                 pinctrl-names = "default";
326                 pinctrl-0 = <&pinctrl_audmux_5>;
327                 ssi-controller = <&ssi1>;
328                 audio-codec = <&sgtl5000>;
329                 audio-routing =
330                         "MIC_IN", "Mic Jack",
331                         "Mic Jack", "Mic Bias",
332                         "Headphone Jack", "HP_OUT";
333                 mux-int-port = <1>;
334                 mux-ext-port = <5>;
335         };
336 };
337
338 &audmux {
339         status = "okay";
340 };
341
342 &can1 {
343         pinctrl-names = "default";
344         pinctrl-0 = <&pinctrl_flexcan1_3>;
345         xceiver-supply = <&reg_can_xcvr>;
346
347         status = "okay";
348 };
349
350 &can2 {
351         pinctrl-names = "default";
352         pinctrl-0 = <&pinctrl_flexcan2_1>;
353         xceiver-supply = <&reg_can_xcvr>;
354
355         status = "okay";
356 };
357
358 &fec {
359         pinctrl-names = "default";
360         pinctrl-0 = <&pinctrl_enet_4>;
361         phy-mode = "rmii";
362         phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
363         phy-supply = <&reg_3v3_etn>;
364         status = "okay";
365 };
366
367 &gpmi {
368         pinctrl-names = "default";
369         pinctrl-0 = <&pinctrl_tx6_gpmi_nand>;
370         nand-on-flash-bbt;
371         status = "okay";
372 };
373
374 &i2c1 {
375         pinctrl-names = "default";
376         pinctrl-0 = <&pinctrl_i2c1_1>;
377         clock-frequency = <400000>;
378         status = "okay";
379
380         ds1339: rtc@68 {
381                 compatible = "dallas,ds1339";
382                 reg = <0x68>;
383         };
384 };
385
386 &i2c3 {
387         pinctrl-names = "default";
388         pinctrl-0 = <&pinctrl_i2c3_2>;
389         clock-frequency = <400000>;
390         status = "okay";
391
392         touchscreen: tsc2007@48 {
393                 compatible = "ti,tsc2007";
394                 reg = <0x48>;
395                 pinctrl-names = "default";
396                 pinctrl-0 = <&pinctrl_tsc2007_1>;
397                 interrupt-parent = <&gpio3>;
398                 interrupts = <26 0>;
399                 gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
400                 ti,x-plate-ohms = <660>;
401                 linux,wakeup;
402         };
403
404         polytouch: edt-ft5x06@38 {
405                 compatible = "edt,edt-ft5x06";
406                 reg = <0x38>;
407                 pinctrl-names = "default";
408                 pinctrl-0 = <&pinctrl_edt_ft5x06_1>;
409                 interrupt-parent = <&gpio6>;
410                 interrupts = <15 0>;
411                 reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
412                 wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
413         };
414
415         sgtl5000: sgtl5000@0a {
416                 compatible = "fsl,sgtl5000";
417                 reg = <0x0a>;
418                 VDDA-supply = <&reg_2v5>;
419                 VDDIO-supply = <&reg_3v3>;
420                 clocks = <&mclk>;
421         };
422 };
423
424 &iomuxc {
425         pinctrl-names = "default";
426         pinctrl-0 = <&pinctrl_hog>;
427
428         display {
429                 tx6_pinctrl_disp0_1: disp0grp-1 {
430                         fsl,pins = <
431                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
432                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
433                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
434                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
435                                 /* PAD DISP0_DAT0 is used for the Flexcan transceiver control */
436                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
437                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
438                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
439                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
440                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
441                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
442                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
443                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
444                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
445                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
446                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
447                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
448                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
449                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
450                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
451                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
452                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
453                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
454                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
455                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
456                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
457                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
458                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
459                         >;
460                 };
461
462                 tx6_pinctrl_disp0_2: disp0grp-2 {
463                         fsl,pins = <
464                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
465                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
466                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
467                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
468                                 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
469                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
470                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
471                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
472                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
473                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
474                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
475                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
476                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
477                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
478                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
479                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
480                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
481                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
482                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
483                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
484                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
485                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
486                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
487                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
488                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
489                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
490                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
491                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
492                         >;
493                 };
494         };
495
496         flexcan {
497                 pinctrl_tx6qdl_flexcan_xcvr: flexcan-xcvrgrp-1 {
498                         fsl,pins = <
499                                 MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x1b0b0 /* Flexcan XCVR enable */
500                         >;
501                 };
502         };
503
504         hog {
505                 pinctrl_hog: hoggrp {
506                         fsl,pins = <
507                                 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1 /* LED */
508                                 MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x1b0b1 /* ETN PHY RESET */
509                                 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1 /* ETN PHY POWER */
510                                 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b1 /* ETN PHY INT
511                                 MX6QDL_PAD_SD3_CMD__GPIO7_IO02 0x1b0b0 /* SD1 CD */
512                                 MX6QDL_PAD_SD3_CLK__GPIO7_IO03 0x1b0b0 /* SD2 CD */
513                                 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b1 /* LCD Power Enable */
514                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1 /* LCD Reset */
515                                 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* PWR BTN */
516                         >;
517                 };
518         };
519
520         kpp {
521                 pinctrl_kpp: kppgrp {
522                         fsl,pins = <
523                                 MX6QDL_PAD_GPIO_9__KEY_COL6 0x1b0b1
524                                 MX6QDL_PAD_GPIO_4__KEY_COL7 0x1b0b1
525                                 MX6QDL_PAD_KEY_COL2__KEY_COL2 0x1b0b1
526                                 MX6QDL_PAD_KEY_COL3__KEY_COL3 0x1b0b1
527
528                                 MX6QDL_PAD_GPIO_2__KEY_ROW6 0x1b0b1
529                                 MX6QDL_PAD_GPIO_5__KEY_ROW7 0x1b0b1
530                                 MX6QDL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b1
531                                 MX6QDL_PAD_KEY_ROW3__KEY_ROW3 0x1b0b1
532                         >;
533                 };
534         };
535
536         nand {
537                 pinctrl_tx6_gpmi_nand: tx6-gpmi-nand {
538                         fsl,pins = <
539                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1
540                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1
541                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
542                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
543                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
544                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
545                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
546                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
547                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
548                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
549                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
550                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
551                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
552                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
553                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
554                         >;
555                 };
556         };
557
558         touchpanel {
559                 pinctrl_tsc2007_1: tsc2007grp-1 {
560                         fsl,pins = <
561                                 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 /* Interrupt */
562                         >;
563                 };
564
565                 pinctrl_edt_ft5x06_1: edt-ft5x06grp-1 {
566                         fsl,pins = <
567                                 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 /* Interrupt */
568                                 MX6QDL_PAD_EIM_A16__GPIO2_IO22   0x1b0b0 /* Reset */
569                                 MX6QDL_PAD_EIM_A17__GPIO2_IO21   0x1b0b0 /* Wake */
570                         >;
571                 };
572         };
573
574         usbh1 {
575                 pinctrl_tx6_usbh1_vbus: tx6-usbh1-vbusgrp {
576                         fsl,pins = <
577                                 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0 /* USBH1_VBUSEN */
578                         >;
579                 };
580         };
581
582         usbotg {
583                 pinctrl_tx6_usbotg: tx6-usbotggrp {
584                         fsl,pins = <
585                                 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x17059
586                         >;
587                 };
588
589                 pinctrl_tx6_usbotg_vbus: tx6-usbotg-vbusgrp {
590                         fsl,pins = <
591                                 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 /* USBOTG_VBUSEN */
592                         >;
593                 };
594         };
595 };
596
597 &kpp {
598         pinctrl-names = "default";
599         pinctrl-0 = <&pinctrl_kpp>;
600         /* sample keymap */
601         /* row/col 0,1 are mapped to KPP row/col 6,7 */
602         linux,keymap = <
603                 0x06060074 /* row 6, col 6, KEY_POWER */
604                 0x06070052 /* row 6, col 7, KEY_KP0 */
605                 0x0602004f /* row 6, col 2, KEY_KP1 */
606                 0x06030050 /* row 6, col 3, KEY_KP2 */
607                 0x07060051 /* row 7, col 6, KEY_KP3 */
608                 0x0707004b /* row 7, col 7, KEY_KP4 */
609                 0x0702004c /* row 7, col 2, KEY_KP5 */
610                 0x0703004d /* row 7, col 3, KEY_KP6 */
611                 0x02060047 /* row 2, col 6, KEY_KP7 */
612                 0x02070048 /* row 2, col 7, KEY_KP8 */
613                 0x02020049 /* row 2, col 2, KEY_KP9 */
614         >;
615 };
616
617 &ldb {
618         status = "okay";
619
620         lvds0: lvds-channel@0 {
621                 fsl,data-mapping = "spwg";
622                 fsl,data-width = <18>;
623                 status = "okay";
624
625                 display-timings {
626                         native-mode = <&lvds_timing0>;
627                         lvds_timing0: hsd100pxn1 {
628                                 clock-frequency = <65000000>;
629                                 hactive = <1024>;
630                                 vactive = <768>;
631                                 hback-porch = <220>;
632                                 hfront-porch = <40>;
633                                 vback-porch = <21>;
634                                 vfront-porch = <7>;
635                                 hsync-len = <60>;
636                                 vsync-len = <10>;
637                         };
638                 };
639         };
640
641         lvds1: lvds-channel@1 {
642                 fsl,data-mapping = "spwg";
643                 fsl,data-width = <18>;
644                 status = "okay";
645
646                 display-timings {
647                         native-mode = <&lvds_timing1>;
648                         lvds_timing1: hsd100pxn1 {
649                                 clock-frequency = <65000000>;
650                                 hactive = <1024>;
651                                 vactive = <768>;
652                                 hback-porch = <220>;
653                                 hfront-porch = <40>;
654                                 vback-porch = <21>;
655                                 vfront-porch = <7>;
656                                 hsync-len = <60>;
657                                 vsync-len = <10>;
658                         };
659                 };
660         };
661 };
662
663 &pwm1 {
664         pinctrl-names = "default";
665         pinctrl-0 = <&pinctrl_pwm1_2>;
666         status = "okay";
667 };
668
669 &pwm2 {
670         pinctrl-names = "default";
671         pinctrl-0 = <&pinctrl_pwm2_1>;
672         status = "okay";
673 };
674
675 &ssi1 {
676         fsl,mode = "i2s-slave";
677         status = "okay";
678 };
679
680 &uart1 {
681         pinctrl-names = "default";
682         pinctrl-0 = <&pinctrl_uart1_2>;
683         status = "okay";
684 };
685
686 &uart2 {
687         pinctrl-names = "default";
688         pinctrl-0 = <&pinctrl_uart2_3 &pinctrl_uart2_rtscts_3>;
689         status = "okay";
690 };
691
692 &uart3 {
693         pinctrl-names = "default";
694         pinctrl-0 = <&pinctrl_uart3_3 &pinctrl_uart3_rtscts_3>;
695         status = "okay";
696 };
697
698 &usbh1 {
699         vbus-supply = <&reg_usbh1_vbus>;
700         pinctrl-names = "default";
701         pinctrl-0 = <&pinctrl_tx6_usbh1_vbus>;
702         dr_mode = "host";
703         disable-over-current;
704         status = "okay";
705 };
706
707 &usbotg {
708         vbus-supply = <&reg_usbotg_vbus>;
709         pinctrl-names = "default";
710         pinctrl-0 = <&pinctrl_tx6_usbotg &pinctrl_tx6_usbotg_vbus>;
711         dr_mode = "peripheral";
712         disable-over-current;
713         status = "okay";
714 };
715
716 &usdhc1 {
717         pinctrl-names = "default";
718         pinctrl-0 = <&pinctrl_usdhc1_2>;
719         cd-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
720         status = "okay";
721 };
722
723 &usdhc2 {
724         pinctrl-names = "default";
725         pinctrl-0 = <&pinctrl_usdhc2_2>;
726         cd-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
727         status = "okay";
728 };