arch/arm/boot/dts/imx6qdl-tx6.dtsi

   1 /*
   2  * Copyright 2013 Lothar Waßmann <LW@KARO-electronics.de>
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include <dt-bindings/input/input.h>
  13 #include <dt-bindings/gpio/gpio.h>
  14 #include <dt-bindings/pwm/pwm.h>
  15
  16 / {
  17         aliases {
  18                 can0 = &can2;
  19                 can1 = &can1;
  20                 display = &display;
  21                 ethernet0 = &fec;
  22                 lcdif_23bit_pins_a = &tx6_pinctrl_disp0_1;
  23                 lcdif_24bit_pins_a = &tx6_pinctrl_disp0_2;
  24                 lvds0 = &lvds0;
  25                 lvds1 = &lvds1;
  26                 pwm0 = &pwm1;
  27                 pwm1 = &pwm2;
  28                 reg_can_xcvr = &reg_can_xcvr;
  29                 stk5led = &user_led;
  30                 usbotg = &usbotg;
  31                 sdhc0 = &usdhc1;
  32                 sdhc1 = &usdhc2;
  33         };
  34
  35         memory {
  36                 reg = <0 0>; /* will be filled by U-Boot */
  37         };
  38
  39         clocks {
  40                 #address-cells = <1>;
  41                 #size-cells = <0>;
  42                 mclk: codec_clock {
  43                         compatible = "fixed-clock";
  44                         reg = <0>;
  45                         #clock-cells = <0>;
  46                         clock-frequency = <27000000>;
  47                 };
  48         };
  49
  50         backlight: backlight@0 {
  51                 compatible = "pwm-backlight";
  52                 pwms = <&pwm2 0 500000 PWM_POLARITY_INVERTED>;
  53                 power-supply = <&reg_3v3>;
  54                 /*
  55                  * a poor man's way to create a 1:1 relationship between
  56                  * the PWM value and the actual duty cycle
  57                  */
  58                 brightness-levels = < 0  1  2  3  4  5  6  7  8  9
  59                                      10 11 12 13 14 15 16 17 18 19
  60                                      20 21 22 23 24 25 26 27 28 29
  61                                      30 31 32 33 34 35 36 37 38 39
  62                                      40 41 42 43 44 45 46 47 48 49
  63                                      50 51 52 53 54 55 56 57 58 59
  64                                      60 61 62 63 64 65 66 67 68 69
  65                                      70 71 72 73 74 75 76 77 78 79
  66                                      80 81 82 83 84 85 86 87 88 89
  67                                      90 91 92 93 94 95 96 97 98 99
  68                                     100>;
  69                 default-brightness-level = <50>;
  70         };
  71
  72         backlight@1 {
  73                 compatible = "pwm-backlight";
  74                 pwms = <&pwm1 0 500000>;
  75                 power-supply = <&reg_3v3>;
  76                 /*
  77                  * a poor man's way to create a 1:1 relationship between
  78                  * the PWM value and the actual duty cycle
  79                  */
  80                 brightness-levels = < 0  1  2  3  4  5  6  7  8  9
  81                                      10 11 12 13 14 15 16 17 18 19
  82                                      20 21 22 23 24 25 26 27 28 29
  83                                      30 31 32 33 34 35 36 37 38 39
  84                                      40 41 42 43 44 45 46 47 48 49
  85                                      50 51 52 53 54 55 56 57 58 59
  86                                      60 61 62 63 64 65 66 67 68 69
  87                                      70 71 72 73 74 75 76 77 78 79
  88                                      80 81 82 83 84 85 86 87 88 89
  89                                      90 91 92 93 94 95 96 97 98 99
  90                                     100>;
  91                 default-brightness-level = <50>;
  92                 status = "disabled";
  93         };
  94
  95         display: display@di0 {
  96                 compatible = "fsl,imx-parallel-display";
  97                 crtcs = <&ipu1 0>;
  98                 interface-pix-fmt = "rgb24";
  99                 pinctrl-names = "default";
 100                 pinctrl-0 = <&tx6_pinctrl_disp0_1>;
 101                 status = "okay";
 102
 103                 display-timings {
 104                         VGA {
 105                                 clock-frequency = <25200000>;
 106                                 hactive = <640>;
 107                                 vactive = <480>;
 108                                 hback-porch = <48>;
 109                                 hsync-len = <96>;
 110                                 hfront-porch = <16>;
 111                                 vback-porch = <31>;
 112                                 vsync-len = <2>;
 113                                 vfront-porch = <12>;
 114                                 hsync-active = <0>;
 115                                 vsync-active = <0>;
 116                                 de-active = <1>;
 117                                 pixelclk-active = <0>;
 118                         };
 119
 120                         ETV570 {
 121                                 clock-frequency = <25200000>;
 122                                 hactive = <640>;
 123                                 vactive = <480>;
 124                                 hback-porch = <114>;
 125                                 hsync-len = <30>;
 126                                 hfront-porch = <16>;
 127                                 vback-porch = <32>;
 128                                 vsync-len = <3>;
 129                                 vfront-porch = <10>;
 130                                 hsync-active = <0>;
 131                                 vsync-active = <0>;
 132                                 de-active = <1>;
 133                                 pixelclk-active = <0>;
 134                         };
 135
 136                         ET0350 {
 137                                 clock-frequency = <6413760>;
 138                                 hactive = <320>;
 139                                 vactive = <240>;
 140                                 hback-porch = <34>;
 141                                 hsync-len = <34>;
 142                                 hfront-porch = <20>;
 143                                 vback-porch = <15>;
 144                                 vsync-len = <3>;
 145                                 vfront-porch = <4>;
 146                                 hsync-active = <0>;
 147                                 vsync-active = <0>;
 148                                 de-active = <1>;
 149                                 pixelclk-active = <0>;
 150                         };
 151
 152                         ET0430 {
 153                                 clock-frequency = <9009000>;
 154                                 hactive = <480>;
 155                                 vactive = <272>;
 156                                 hback-porch = <2>;
 157                                 hsync-len = <41>;
 158                                 hfront-porch = <2>;
 159                                 vback-porch = <2>;
 160                                 vsync-len = <10>;
 161                                 vfront-porch = <2>;
 162                                 hsync-active = <0>;
 163                                 vsync-active = <0>;
 164                                 de-active = <1>;
 165                                 pixelclk-active = <1>;
 166                         };
 167
 168                         ET0500 {
 169                                 clock-frequency = <33264000>;
 170                                 hactive = <800>;
 171                                 vactive = <480>;
 172                                 hback-porch = <88>;
 173                                 hsync-len = <128>;
 174                                 hfront-porch = <40>;
 175                                 vback-porch = <33>;
 176                                 vsync-len = <2>;
 177                                 vfront-porch = <10>;
 178                                 hsync-active = <0>;
 179                                 vsync-active = <0>;
 180                                 de-active = <1>;
 181                                 pixelclk-active = <0>;
 182                         };
 183
 184                         ET0700 { /* same as ET0500 */
 185                                 clock-frequency = <33264000>;
 186                                 hactive = <800>;
 187                                 vactive = <480>;
 188                                 hback-porch = <88>;
 189                                 hsync-len = <128>;
 190                                 hfront-porch = <40>;
 191                                 vback-porch = <33>;
 192                                 vsync-len = <2>;
 193                                 vfront-porch = <10>;
 194                                 hsync-active = <0>;
 195                                 vsync-active = <0>;
 196                                 de-active = <1>;
 197                                 pixelclk-active = <0>;
 198                         };
 199
 200                         ETQ570 {
 201                                 clock-frequency = <6596040>;
 202                                 hactive = <320>;
 203                                 vactive = <240>;
 204                                 hback-porch = <38>;
 205                                 hsync-len = <30>;
 206                                 hfront-porch = <30>;
 207                                 vback-porch = <16>;
 208                                 vsync-len = <3>;
 209                                 vfront-porch = <4>;
 210                                 hsync-active = <0>;
 211                                 vsync-active = <0>;
 212                                 de-active = <1>;
 213                                 pixelclk-active = <0>;
 214                         };
 215                 };
 216         };
 217
 218         gpio-keys {
 219                 compatible = "gpio-keys";
 220
 221                 power {
 222                         label = "Power Button";
 223                         gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 224                         linux,code = <KEY_POWER>;
 225                         gpio-key,wakeup;
 226                 };
 227         };
 228
 229         leds {
 230                 compatible = "gpio-leds";
 231
 232                 user_led: user {
 233                         label = "Heartbeat";
 234                         gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
 235                         linux,default-trigger = "heartbeat";
 236                 };
 237         };
 238
 239         regulators {
 240                 compatible = "simple-bus";
 241                 #address-cells = <1>;
 242                 #size-cells = <0>;
 243
 244                 reg_3v3_etn: regulator@0 {
 245                         compatible = "regulator-fixed";
 246                         reg = <0>;
 247                         regulator-name = "3V3_ETN";
 248                         regulator-min-microvolt = <3300000>;
 249                         regulator-max-microvolt = <3300000>;
 250                         gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
 251                         enable-active-high;
 252                 };
 253
 254                 reg_2v5: regulator@1 {
 255                         compatible = "regulator-fixed";
 256                         reg = <1>;
 257                         regulator-name = "2V5";
 258                         regulator-min-microvolt = <2500000>;
 259                         regulator-max-microvolt = <2500000>;
 260                         regulator-always-on;
 261                 };
 262
 263                 reg_3v3: regulator@2 {
 264                         compatible = "regulator-fixed";
 265                         reg = <2>;
 266                         regulator-name = "3V3";
 267                         regulator-min-microvolt = <3300000>;
 268                         regulator-max-microvolt = <3300000>;
 269                         regulator-always-on;
 270                 };
 271
 272                 reg_can_xcvr: regulator@3 {
 273                         compatible = "regulator-fixed";
 274                         reg = <3>;
 275                         regulator-name = "CAN XCVR";
 276                         regulator-min-microvolt = <3300000>;
 277                         regulator-max-microvolt = <3300000>;
 278                         gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
 279                         enable-active-low;
 280                         pinctrl-names = "default";
 281                         pinctrl-0 = <&pinctrl_tx6qdl_flexcan_xcvr>;
 282                 };
 283
 284                 reg_lcd_pwr0: regulator@4 {
 285                         compatible = "regulator-fixed";
 286                         reg = <4>;
 287                         regulator-name = "LCD0 POWER";
 288                         regulator-min-microvolt = <3300000>;
 289                         regulator-max-microvolt = <3300000>;
 290                         gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
 291                         enable-active-high;
 292                 };
 293
 294                 reg_lcd_pwr1: regulator@5 {
 295                         compatible = "regulator-fixed";
 296                         reg = <5>;
 297                         regulator-name = "LCD1 POWER";
 298                         regulator-min-microvolt = <3300000>;
 299                         regulator-max-microvolt = <3300000>;
 300                         gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
 301                         enable-active-high;
 302                 };
 303
 304                 reg_lcd_reset: regulator@6 {
 305                         compatible = "regulator-fixed";
 306                         reg = <6>;
 307                         regulator-name = "LCD RESET";
 308                         regulator-min-microvolt = <3300000>;
 309                         regulator-max-microvolt = <3300000>;
 310                         gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
 311                         startup-delay-us = <300000>;
 312                         enable-active-high;
 313                         regulator-always-on;
 314                 };
 315
 316                 reg_usbh1_vbus: regulator@7 {
 317                         compatible = "regulator-fixed";
 318                         reg = <7>;
 319                         regulator-name = "usbh1_vbus";
 320                         regulator-min-microvolt = <5000000>;
 321                         regulator-max-microvolt = <5000000>;
 322                         gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
 323                         enable-active-high;
 324                         pinctrl-names = "default";
 325                         pinctrl-0 = <&pinctrl_tx6_usbh1_vbus>;
 326                 };
 327
 328                 reg_usbotg_vbus: regulator@8 {
 329                         compatible = "regulator-fixed";
 330                         reg = <8>;
 331                         regulator-name = "usbotg_vbus";
 332                         regulator-min-microvolt = <5000000>;
 333                         regulator-max-microvolt = <5000000>;
 334                         gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
 335                         enable-active-high;
 336                         pinctrl-names = "default";
 337                         pinctrl-0 = <&pinctrl_tx6_usbotg_vbus>;
 338                 };
 339         };
 340
 341         sound {
 342                 compatible = "fsl,imx6qdl-tx6qdl-sgtl5000",
 343                              "fsl,imx-audio-sgtl5000";
 344                 model = "sgtl5000-audio";
 345                 pinctrl-names = "default";
 346                 pinctrl-0 = <&pinctrl_audmux_5>;
 347                 ssi-controller = <&ssi1>;
 348                 audio-codec = <&sgtl5000>;
 349                 audio-routing =
 350                         "MIC_IN", "Mic Jack",
 351                         "Mic Jack", "Mic Bias",
 352                         "Headphone Jack", "HP_OUT";
 353                 mux-int-port = <1>;
 354                 mux-ext-port = <5>;
 355         };
 356 };
 357
 358 &audmux {
 359         status = "okay";
 360 };
 361
 362 &can1 {
 363         pinctrl-names = "default";
 364         pinctrl-0 = <&pinctrl_flexcan1_3>;
 365         xceiver-supply = <&reg_can_xcvr>;
 366
 367         status = "okay";
 368 };
 369
 370 &can2 {
 371         pinctrl-names = "default";
 372         pinctrl-0 = <&pinctrl_flexcan2_1>;
 373         xceiver-supply = <&reg_can_xcvr>;
 374
 375         status = "okay";
 376 };
 377
 378 &fec {
 379         pinctrl-names = "default";
 380         pinctrl-0 = <&pinctrl_enet_4>;
 381         phy-mode = "rmii";
 382         phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
 383         phy-supply = <&reg_3v3_etn>;
 384         status = "okay";
 385 };
 386
 387 &gpmi {
 388         pinctrl-names = "default";
 389         pinctrl-0 = <&pinctrl_tx6_gpmi_nand>;
 390         nand-on-flash-bbt;
 391         status = "okay";
 392 };
 393
 394 &i2c1 {
 395         pinctrl-names = "default";
 396         pinctrl-0 = <&pinctrl_i2c1_1>;
 397         clock-frequency = <400000>;
 398         status = "okay";
 399
 400         ds1339: rtc@68 {
 401                 compatible = "dallas,ds1339";
 402                 reg = <0x68>;
 403         };
 404 };
 405
 406 &i2c3 {
 407         pinctrl-names = "default";
 408         pinctrl-0 = <&pinctrl_i2c3_2>;
 409         clock-frequency = <400000>;
 410         status = "okay";
 411
 412         touchscreen: tsc2007@48 {
 413                 compatible = "ti,tsc2007";
 414                 reg = <0x48>;
 415                 pinctrl-names = "default";
 416                 pinctrl-0 = <&pinctrl_tsc2007_1>;
 417                 interrupt-parent = <&gpio3>;
 418                 interrupts = <26 0>;
 419                 gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
 420                 ti,x-plate-ohms = <660>;
 421                 linux,wakeup;
 422         };
 423
 424         polytouch: edt-ft5x06@38 {
 425                 compatible = "edt,edt-ft5x06";
 426                 reg = <0x38>;
 427                 pinctrl-names = "default";
 428                 pinctrl-0 = <&pinctrl_edt_ft5x06_1>;
 429                 interrupt-parent = <&gpio6>;
 430                 interrupts = <15 0>;
 431                 reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
 432                 wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
 433         };
 434
 435         sgtl5000: sgtl5000@0a {
 436                 compatible = "fsl,sgtl5000";
 437                 reg = <0x0a>;
 438                 VDDA-supply = <&reg_2v5>;
 439                 VDDIO-supply = <&reg_3v3>;
 440                 clocks = <&mclk>;
 441         };
 442 };
 443
 444 &iomuxc {
 445         pinctrl-names = "default";
 446         pinctrl-0 = <&pinctrl_hog>;
 447
 448         display {
 449                 tx6_pinctrl_disp0_1: disp0grp-1 {
 450                         fsl,pins = <
 451                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
 452                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
 453                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
 454                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
 455                                 /* PAD DISP0_DAT0 is used for the Flexcan transceiver control */
 456                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
 457                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
 458                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
 459                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
 460                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
 461                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
 462                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
 463                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
 464                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
 465                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
 466                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
 467                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
 468                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
 469                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
 470                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
 471                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
 472                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
 473                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
 474                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
 475                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
 476                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
 477                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
 478                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
 479                         >;
 480                 };
 481
 482                 tx6_pinctrl_disp0_2: disp0grp-2 {
 483                         fsl,pins = <
 484                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
 485                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
 486                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
 487                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
 488                                 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
 489                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
 490                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
 491                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
 492                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
 493                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
 494                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
 495                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
 496                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
 497                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
 498                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
 499                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
 500                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
 501                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
 502                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
 503                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
 504                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
 505                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
 506                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
 507                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
 508                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
 509                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
 510                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
 511                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
 512                         >;
 513                 };
 514         };
 515
 516         flexcan {
 517                 pinctrl_tx6qdl_flexcan_xcvr: flexcan-xcvrgrp-1 {
 518                         fsl,pins = <
 519                                 MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x1b0b0 /* Flexcan XCVR enable */
 520                         >;
 521                 };
 522         };
 523
 524         hog {
 525                 pinctrl_hog: hoggrp {
 526                         fsl,pins = <
 527                                 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1 /* LED */
 528                                 MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x1b0b1 /* ETN PHY RESET */
 529                                 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1 /* ETN PHY POWER */
 530                                 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b1 /* ETN PHY INT
 531                                 MX6QDL_PAD_SD3_CMD__GPIO7_IO02 0x1b0b0 /* SD1 CD */
 532                                 MX6QDL_PAD_SD3_CLK__GPIO7_IO03 0x1b0b0 /* SD2 CD */
 533                                 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b1 /* LCD Power Enable */
 534                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1 /* LCD Reset */
 535                                 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* PWR BTN */
 536                         >;
 537                 };
 538         };
 539
 540         kpp {
 541                 pinctrl_kpp: kppgrp {
 542                         fsl,pins = <
 543                                 MX6QDL_PAD_GPIO_9__KEY_COL6 0x1b0b1
 544                                 MX6QDL_PAD_GPIO_4__KEY_COL7 0x1b0b1
 545                                 MX6QDL_PAD_KEY_COL2__KEY_COL2 0x1b0b1
 546                                 MX6QDL_PAD_KEY_COL3__KEY_COL3 0x1b0b1
 547
 548                                 MX6QDL_PAD_GPIO_2__KEY_ROW6 0x1b0b1
 549                                 MX6QDL_PAD_GPIO_5__KEY_ROW7 0x1b0b1
 550                                 MX6QDL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b1
 551                                 MX6QDL_PAD_KEY_ROW3__KEY_ROW3 0x1b0b1
 552                         >;
 553                 };
 554         };
 555
 556         nand {
 557                 pinctrl_tx6_gpmi_nand: tx6-gpmi-nand {
 558                         fsl,pins = <
 559                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1
 560                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1
 561                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
 562                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
 563                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
 564                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
 565                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
 566                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
 567                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
 568                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
 569                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
 570                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
 571                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
 572                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
 573                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
 574                         >;
 575                 };
 576         };
 577
 578         touchpanel {
 579                 pinctrl_tsc2007_1: tsc2007grp-1 {
 580                         fsl,pins = <
 581                                 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 /* Interrupt */
 582                         >;
 583                 };
 584
 585                 pinctrl_edt_ft5x06_1: edt-ft5x06grp-1 {
 586                         fsl,pins = <
 587                                 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 /* Interrupt */
 588                                 MX6QDL_PAD_EIM_A16__GPIO2_IO22   0x1b0b0 /* Reset */
 589                                 MX6QDL_PAD_EIM_A17__GPIO2_IO21   0x1b0b0 /* Wake */
 590                         >;
 591                 };
 592         };
 593
 594         usbh1 {
 595                 pinctrl_tx6_usbh1_vbus: tx6-usbh1-vbusgrp {
 596                         fsl,pins = <
 597                                 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0 /* USBH1_VBUSEN */
 598                         >;
 599                 };
 600         };
 601
 602         usbotg {
 603                 pinctrl_tx6_usbotg: tx6-usbotggrp {
 604                         fsl,pins = <
 605                                 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x17059
 606                         >;
 607                 };
 608
 609                 pinctrl_tx6_usbotg_vbus: tx6-usbotg-vbusgrp {
 610                         fsl,pins = <
 611                                 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 /* USBOTG_VBUSEN */
 612                         >;
 613                 };
 614         };
 615 };
 616
 617 &kpp {
 618         pinctrl-names = "default";
 619         pinctrl-0 = <&pinctrl_kpp>;
 620         /* sample keymap */
 621         /* row/col 0,1 are mapped to KPP row/col 6,7 */
 622         linux,keymap = <
 623                 0x06060074 /* row 6, col 6, KEY_POWER */
 624                 0x06070052 /* row 6, col 7, KEY_KP0 */
 625                 0x0602004f /* row 6, col 2, KEY_KP1 */
 626                 0x06030050 /* row 6, col 3, KEY_KP2 */
 627                 0x07060051 /* row 7, col 6, KEY_KP3 */
 628                 0x0707004b /* row 7, col 7, KEY_KP4 */
 629                 0x0702004c /* row 7, col 2, KEY_KP5 */
 630                 0x0703004d /* row 7, col 3, KEY_KP6 */
 631                 0x02060047 /* row 2, col 6, KEY_KP7 */
 632                 0x02070048 /* row 2, col 7, KEY_KP8 */
 633                 0x02020049 /* row 2, col 2, KEY_KP9 */
 634         >;
 635 };
 636
 637 &ldb {
 638         status = "okay";
 639
 640         lvds0: lvds-channel@0 {
 641                 fsl,data-mapping = "spwg";
 642                 fsl,data-width = <18>;
 643                 status = "okay";
 644
 645                 display-timings {
 646                         native-mode = <&lvds_timing0>;
 647                         lvds_timing0: hsd100pxn1 {
 648                                 clock-frequency = <65000000>;
 649                                 hactive = <1024>;
 650                                 vactive = <768>;
 651                                 hback-porch = <220>;
 652                                 hfront-porch = <40>;
 653                                 vback-porch = <21>;
 654                                 vfront-porch = <7>;
 655                                 hsync-len = <60>;
 656                                 vsync-len = <10>;
 657                         };
 658                 };
 659         };
 660
 661         lvds1: lvds-channel@1 {
 662                 fsl,data-mapping = "spwg";
 663                 fsl,data-width = <18>;
 664                 status = "okay";
 665
 666                 display-timings {
 667                         native-mode = <&lvds_timing1>;
 668                         lvds_timing1: hsd100pxn1 {
 669                                 clock-frequency = <65000000>;
 670                                 hactive = <1024>;
 671                                 vactive = <768>;
 672                                 hback-porch = <220>;
 673                                 hfront-porch = <40>;
 674                                 vback-porch = <21>;
 675                                 vfront-porch = <7>;
 676                                 hsync-len = <60>;
 677                                 vsync-len = <10>;
 678                         };
 679                 };
 680         };
 681 };
 682
 683 &pwm1 {
 684         pinctrl-names = "default";
 685         pinctrl-0 = <&pinctrl_pwm1_2>;
 686         status = "okay";
 687 };
 688
 689 &pwm2 {
 690         pinctrl-names = "default";
 691         pinctrl-0 = <&pinctrl_pwm2_1>;
 692         status = "okay";
 693 };
 694
 695 &ssi1 {
 696         fsl,mode = "i2s-slave";
 697         status = "okay";
 698 };
 699
 700 &uart1 {
 701         pinctrl-names = "default";
 702         pinctrl-0 = <&pinctrl_uart1_2>;
 703         status = "okay";
 704 };
 705
 706 &uart2 {
 707         pinctrl-names = "default";
 708         pinctrl-0 = <&pinctrl_uart2_3 &pinctrl_uart2_rtscts_3>;
 709         status = "okay";
 710 };
 711
 712 &uart3 {
 713         pinctrl-names = "default";
 714         pinctrl-0 = <&pinctrl_uart3_3 &pinctrl_uart3_rtscts_3>;
 715         status = "okay";
 716 };
 717
 718 &usbh1 {
 719         vbus-supply = <&reg_usbh1_vbus>;
 720         dr_mode = "host";
 721         disable-over-current;
 722         status = "okay";
 723 };
 724
 725 &usbotg {
 726         vbus-supply = <&reg_usbotg_vbus>;
 727         pinctrl-names = "default";
 728         pinctrl-0 = <&pinctrl_tx6_usbotg>;
 729         dr_mode = "peripheral";
 730         disable-over-current;
 731         status = "okay";
 732 };
 733
 734 &usdhc1 {
 735         pinctrl-names = "default";
 736         pinctrl-0 = <&pinctrl_usdhc1_2>;
 737         cd-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
 738         status = "okay";
 739 };
 740
 741 &usdhc2 {
 742         pinctrl-names = "default";
 743         pinctrl-0 = <&pinctrl_usdhc2_2>;
 744         cd-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
 745         status = "okay";
 746 };