arch/arm/boot/dts/imx6qdl-tx6.dtsi

   1 /*
   2  * Copyright 2013 Lothar Waßmann <LW@KARO-electronics.de>
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include <dt-bindings/input/input.h>
  13 #include <dt-bindings/gpio/gpio.h>
  14
  15 / {
  16         aliases {
  17                 can0 = &can2;
  18                 can1 = &can1;
  19                 display = &display;
  20                 ethernet0 = &fec;
  21                 lcdif_23bit_pins_a = &tx6_pinctrl_disp0_1;
  22                 lcdif_24bit_pins_a = &tx6_pinctrl_disp0_2;
  23                 lvds0 = &lvds0;
  24                 lvds1 = &lvds1;
  25                 pwm0 = &pwm1;
  26                 pwm1 = &pwm2;
  27                 reg_can_xcvr = &reg_can_xcvr;
  28                 stk5led = &user_led;
  29                 usbotg = &usbotg;
  30                 sdhc0 = &usdhc1;
  31                 sdhc1 = &usdhc2;
  32         };
  33
  34         memory {
  35                 reg = <0 0>; /* will be filled by U-Boot */
  36         };
  37
  38         clocks {
  39                 #address-cells = <1>;
  40                 #size-cells = <0>;
  41                 mclk: codec_clock {
  42                         compatible = "fixed-clock";
  43                         reg = <0>;
  44                         #clock-cells = <0>;
  45                         clock-frequency = <27000000>;
  46                 };
  47         };
  48
  49         backlight: backlight@0 {
  50                 compatible = "pwm-backlight";
  51                 pwms = <&pwm2 0 500000>;
  52                 power-supply = <&reg_3v3>;
  53                 /*
  54                  * a poor man's way to create an inverse 1:1 relationship
  55                  * between the PWM value and the actual duty cycle
  56                  */
  57                 brightness-levels = <100
  58                                       99 98 97 96 95 94 93 92 91 90
  59                                       89 88 87 86 85 84 83 82 81 80
  60                                       79 78 77 76 75 74 73 72 71 70
  61                                       69 68 67 66 65 64 63 62 61 60
  62                                       59 58 57 56 55 54 53 52 51 50
  63                                       49 48 47 46 45 44 43 42 41 40
  64                                       39 38 37 36 35 34 33 32 31 30
  65                                       29 28 27 26 25 24 23 22 21 20
  66                                       19 18 17 16 15 14 13 12 11 10
  67                                        9  8  7  6  5  4  3  2  1  0>;
  68                 default-brightness-level = <50>;
  69         };
  70
  71         backlight@1 {
  72                 compatible = "pwm-backlight";
  73                 pwms = <&pwm1 0 500000>;
  74                 power-supply = <&reg_3v3>;
  75                 /*
  76                  * a poor man's way to create a 1:1 relationship between
  77                  * the PWM value and the actual duty cycle
  78                  */
  79                 brightness-levels = < 0  1  2  3  4  5  6  7  8  9
  80                                      10 11 12 13 14 15 16 17 18 19
  81                                      20 21 22 23 24 25 26 27 28 29
  82                                      30 31 32 33 34 35 36 37 38 39
  83                                      40 41 42 43 44 45 46 47 48 49
  84                                      50 51 52 53 54 55 56 57 58 59
  85                                      60 61 62 63 64 65 66 67 68 69
  86                                      70 71 72 73 74 75 76 77 78 79
  87                                      80 81 82 83 84 85 86 87 88 89
  88                                      90 91 92 93 94 95 96 97 98 99
  89                                     100>;
  90                 default-brightness-level = <50>;
  91                 status = "disabled";
  92         };
  93
  94         display: display@di0 {
  95                 compatible = "fsl,imx-parallel-display";
  96                 crtcs = <&ipu1 0>;
  97                 interface-pix-fmt = "rgb24";
  98                 pinctrl-names = "default";
  99                 pinctrl-0 = <&tx6_pinctrl_disp0_1>;
 100                 status = "okay";
 101
 102                 display-timings {
 103                         VGA {
 104                                 clock-frequency = <25200000>;
 105                                 hactive = <640>;
 106                                 vactive = <480>;
 107                                 hback-porch = <48>;
 108                                 hsync-len = <96>;
 109                                 hfront-porch = <16>;
 110                                 vback-porch = <31>;
 111                                 vsync-len = <2>;
 112                                 vfront-porch = <12>;
 113                                 hsync-active = <0>;
 114                                 vsync-active = <0>;
 115                                 de-active = <1>;
 116                                 pixelclk-active = <0>;
 117                         };
 118
 119                         ETV570 {
 120                                 clock-frequency = <25200000>;
 121                                 hactive = <640>;
 122                                 vactive = <480>;
 123                                 hback-porch = <114>;
 124                                 hsync-len = <30>;
 125                                 hfront-porch = <16>;
 126                                 vback-porch = <32>;
 127                                 vsync-len = <3>;
 128                                 vfront-porch = <10>;
 129                                 hsync-active = <0>;
 130                                 vsync-active = <0>;
 131                                 de-active = <1>;
 132                                 pixelclk-active = <0>;
 133                         };
 134
 135                         ET0350 {
 136                                 clock-frequency = <6413760>;
 137                                 hactive = <320>;
 138                                 vactive = <240>;
 139                                 hback-porch = <34>;
 140                                 hsync-len = <34>;
 141                                 hfront-porch = <20>;
 142                                 vback-porch = <15>;
 143                                 vsync-len = <3>;
 144                                 vfront-porch = <4>;
 145                                 hsync-active = <0>;
 146                                 vsync-active = <0>;
 147                                 de-active = <1>;
 148                                 pixelclk-active = <0>;
 149                         };
 150
 151                         ET0430 {
 152                                 clock-frequency = <9009000>;
 153                                 hactive = <480>;
 154                                 vactive = <272>;
 155                                 hback-porch = <2>;
 156                                 hsync-len = <41>;
 157                                 hfront-porch = <2>;
 158                                 vback-porch = <2>;
 159                                 vsync-len = <10>;
 160                                 vfront-porch = <2>;
 161                                 hsync-active = <0>;
 162                                 vsync-active = <0>;
 163                                 de-active = <1>;
 164                                 pixelclk-active = <1>;
 165                         };
 166
 167                         ET0500 {
 168                                 clock-frequency = <33264000>;
 169                                 hactive = <800>;
 170                                 vactive = <480>;
 171                                 hback-porch = <88>;
 172                                 hsync-len = <128>;
 173                                 hfront-porch = <40>;
 174                                 vback-porch = <33>;
 175                                 vsync-len = <2>;
 176                                 vfront-porch = <10>;
 177                                 hsync-active = <0>;
 178                                 vsync-active = <0>;
 179                                 de-active = <1>;
 180                                 pixelclk-active = <0>;
 181                         };
 182
 183                         ET0700 { /* same as ET0500 */
 184                                 clock-frequency = <33264000>;
 185                                 hactive = <800>;
 186                                 vactive = <480>;
 187                                 hback-porch = <88>;
 188                                 hsync-len = <128>;
 189                                 hfront-porch = <40>;
 190                                 vback-porch = <33>;
 191                                 vsync-len = <2>;
 192                                 vfront-porch = <10>;
 193                                 hsync-active = <0>;
 194                                 vsync-active = <0>;
 195                                 de-active = <1>;
 196                                 pixelclk-active = <0>;
 197                         };
 198
 199                         ETQ570 {
 200                                 clock-frequency = <6596040>;
 201                                 hactive = <320>;
 202                                 vactive = <240>;
 203                                 hback-porch = <38>;
 204                                 hsync-len = <30>;
 205                                 hfront-porch = <30>;
 206                                 vback-porch = <16>;
 207                                 vsync-len = <3>;
 208                                 vfront-porch = <4>;
 209                                 hsync-active = <0>;
 210                                 vsync-active = <0>;
 211                                 de-active = <1>;
 212                                 pixelclk-active = <0>;
 213                         };
 214                 };
 215         };
 216
 217         gpio-keys {
 218                 compatible = "gpio-keys";
 219
 220                 power {
 221                         label = "Power Button";
 222                         gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 223                         linux,code = <KEY_POWER>;
 224                         gpio-key,wakeup;
 225                 };
 226         };
 227
 228         leds {
 229                 compatible = "gpio-leds";
 230
 231                 user_led: user {
 232                         label = "Heartbeat";
 233                         gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
 234                         linux,default-trigger = "heartbeat";
 235                 };
 236         };
 237
 238         regulators {
 239                 compatible = "simple-bus";
 240
 241                 reg_3v3_etn: 3v3-etn {
 242                         compatible = "regulator-fixed";
 243                         regulator-name = "3V3_ETN";
 244                         regulator-min-microvolt = <3300000>;
 245                         regulator-max-microvolt = <3300000>;
 246                         gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
 247                         enable-active-high;
 248                 };
 249
 250                 reg_2v5: 2v5 {
 251                         compatible = "regulator-fixed";
 252                         regulator-name = "2V5";
 253                         regulator-min-microvolt = <2500000>;
 254                         regulator-max-microvolt = <2500000>;
 255                         regulator-always-on;
 256                 };
 257
 258                 reg_3v3: 3v3 {
 259                         compatible = "regulator-fixed";
 260                         regulator-name = "3V3";
 261                         regulator-min-microvolt = <3300000>;
 262                         regulator-max-microvolt = <3300000>;
 263                         regulator-always-on;
 264                 };
 265
 266                 reg_can_xcvr: can-xcvr {
 267                         compatible = "regulator-fixed";
 268                         regulator-name = "CAN XCVR";
 269                         regulator-min-microvolt = <3300000>;
 270                         regulator-max-microvolt = <3300000>;
 271                         gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
 272                         enable-active-low;
 273                         pinctrl-names = "default";
 274                         pinctrl-0 = <&pinctrl_tx6qdl_flexcan_xcvr>;
 275                 };
 276
 277                 reg_lcd_pwr0: lcd-power@0 {
 278                         compatible = "regulator-fixed";
 279                         regulator-name = "LCD POWER";
 280                         regulator-min-microvolt = <3300000>;
 281                         regulator-max-microvolt = <3300000>;
 282                         gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
 283                         enable-active-high;
 284                         regulator-boot-on;
 285                 };
 286
 287                 reg_lcd_pwr1: lcd-power@1 {
 288                         compatible = "regulator-fixed";
 289                         regulator-name = "LCD POWER";
 290                         regulator-min-microvolt = <3300000>;
 291                         regulator-max-microvolt = <3300000>;
 292                         gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
 293                         enable-active-high;
 294                         regulator-boot-on;
 295                 };
 296
 297                 reg_lcd_reset: lcd-reset {
 298                         compatible = "regulator-fixed";
 299                         regulator-name = "LCD RESET";
 300                         regulator-min-microvolt = <3300000>;
 301                         regulator-max-microvolt = <3300000>;
 302                         gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
 303                         startup-delay-us = <300000>;
 304                         enable-active-high;
 305                         regulator-always-on;
 306                         regulator-boot-on;
 307                 };
 308
 309                 reg_usbh1_vbus: usbh1_vbus {
 310                         compatible = "regulator-fixed";
 311                         regulator-name = "usbh1_vbus";
 312                         regulator-min-microvolt = <5000000>;
 313                         regulator-max-microvolt = <5000000>;
 314                         gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
 315                         enable-active-high;
 316                 };
 317
 318                 reg_usbotg_vbus: usbotg_vbus {
 319                         compatible = "regulator-fixed";
 320                         regulator-name = "usbotg_vbus";
 321                         regulator-min-microvolt = <5000000>;
 322                         regulator-max-microvolt = <5000000>;
 323                         gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
 324                         enable-active-high;
 325                 };
 326         };
 327
 328         sound {
 329                 compatible = "fsl,imx6qdl-tx6qdl-sgtl5000",
 330                              "fsl,imx-audio-sgtl5000";
 331                 model = "sgtl5000-audio";
 332                 pinctrl-names = "default";
 333                 pinctrl-0 = <&pinctrl_audmux_5>;
 334                 ssi-controller = <&ssi1>;
 335                 audio-codec = <&sgtl5000>;
 336                 audio-routing =
 337                         "MIC_IN", "Mic Jack",
 338                         "Mic Jack", "Mic Bias",
 339                         "Headphone Jack", "HP_OUT";
 340                 mux-int-port = <1>;
 341                 mux-ext-port = <5>;
 342         };
 343 };
 344
 345 &audmux {
 346         status = "okay";
 347 };
 348
 349 &can1 {
 350         pinctrl-names = "default";
 351         pinctrl-0 = <&pinctrl_flexcan1_3>;
 352         xceiver-supply = <&reg_can_xcvr>;
 353
 354         status = "okay";
 355 };
 356
 357 &can2 {
 358         pinctrl-names = "default";
 359         pinctrl-0 = <&pinctrl_flexcan2_1>;
 360         xceiver-supply = <&reg_can_xcvr>;
 361
 362         status = "okay";
 363 };
 364
 365 &fec {
 366         pinctrl-names = "default";
 367         pinctrl-0 = <&pinctrl_enet_4>;
 368         phy-mode = "rmii";
 369         phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
 370         phy-supply = <&reg_3v3_etn>;
 371         status = "okay";
 372 };
 373
 374 &gpmi {
 375         pinctrl-names = "default";
 376         pinctrl-0 = <&pinctrl_tx6_gpmi_nand>;
 377         nand-on-flash-bbt;
 378         status = "okay";
 379 };
 380
 381 &i2c1 {
 382         pinctrl-names = "default";
 383         pinctrl-0 = <&pinctrl_i2c1_1>;
 384         clock-frequency = <400000>;
 385         status = "okay";
 386
 387         ds1339: rtc@68 {
 388                 compatible = "dallas,ds1339";
 389                 reg = <0x68>;
 390         };
 391 };
 392
 393 &i2c3 {
 394         pinctrl-names = "default";
 395         pinctrl-0 = <&pinctrl_i2c3_2>;
 396         clock-frequency = <400000>;
 397         status = "okay";
 398
 399         touchscreen: tsc2007@48 {
 400                 compatible = "ti,tsc2007";
 401                 reg = <0x48>;
 402                 pinctrl-names = "default";
 403                 pinctrl-0 = <&pinctrl_tsc2007_1>;
 404                 interrupt-parent = <&gpio3>;
 405                 interrupts = <26 0>;
 406                 gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
 407                 ti,x-plate-ohms = <660>;
 408                 linux,wakeup;
 409         };
 410
 411         polytouch: edt-ft5x06@38 {
 412                 compatible = "edt,edt-ft5x06";
 413                 reg = <0x38>;
 414                 pinctrl-names = "default";
 415                 pinctrl-0 = <&pinctrl_edt_ft5x06_1>;
 416                 interrupt-parent = <&gpio6>;
 417                 interrupts = <15 0>;
 418                 reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
 419                 wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
 420         };
 421
 422         sgtl5000: sgtl5000@0a {
 423                 compatible = "fsl,sgtl5000";
 424                 reg = <0x0a>;
 425                 VDDA-supply = <&reg_2v5>;
 426                 VDDIO-supply = <&reg_3v3>;
 427                 clocks = <&mclk>;
 428         };
 429 };
 430
 431 &iomuxc {
 432         pinctrl-names = "default";
 433         pinctrl-0 = <&pinctrl_hog>;
 434
 435         display {
 436                 tx6_pinctrl_disp0_1: disp0grp-1 {
 437                         fsl,pins = <
 438                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
 439                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
 440                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
 441                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
 442                                 /* PAD DISP0_DAT0 is used for the Flexcan transceiver control */
 443                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
 444                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
 445                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
 446                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
 447                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
 448                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
 449                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
 450                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
 451                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
 452                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
 453                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
 454                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
 455                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
 456                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
 457                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
 458                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
 459                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
 460                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
 461                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
 462                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
 463                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
 464                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
 465                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
 466                         >;
 467                 };
 468
 469                 tx6_pinctrl_disp0_2: disp0grp-2 {
 470                         fsl,pins = <
 471                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
 472                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
 473                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
 474                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
 475                                 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
 476                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
 477                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
 478                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
 479                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
 480                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
 481                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
 482                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
 483                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
 484                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
 485                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
 486                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
 487                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
 488                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
 489                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
 490                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
 491                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
 492                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
 493                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
 494                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
 495                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
 496                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
 497                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
 498                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
 499                         >;
 500                 };
 501         };
 502
 503         flexcan {
 504                 pinctrl_tx6qdl_flexcan_xcvr: flexcan-xcvrgrp-1 {
 505                         fsl,pins = <
 506                                 MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x1b0b0 /* Flexcan XCVR enable */
 507                         >;
 508                 };
 509         };
 510
 511         hog {
 512                 pinctrl_hog: hoggrp {
 513                         fsl,pins = <
 514                                 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1 /* LED */
 515                                 MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x1b0b1 /* ETN PHY RESET */
 516                                 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1 /* ETN PHY POWER */
 517                                 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b1 /* ETN PHY INT
 518                                 MX6QDL_PAD_SD3_CMD__GPIO7_IO02 0x1b0b0 /* SD1 CD */
 519                                 MX6QDL_PAD_SD3_CLK__GPIO7_IO03 0x1b0b0 /* SD2 CD */
 520                                 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b1 /* LCD Power Enable */
 521                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1 /* LCD Reset */
 522                                 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* PWR BTN */
 523                         >;
 524                 };
 525         };
 526
 527         kpp {
 528                 pinctrl_kpp: kppgrp {
 529                         fsl,pins = <
 530                                 MX6QDL_PAD_GPIO_9__KEY_COL6 0x1b0b1
 531                                 MX6QDL_PAD_GPIO_4__KEY_COL7 0x1b0b1
 532                                 MX6QDL_PAD_KEY_COL2__KEY_COL2 0x1b0b1
 533                                 MX6QDL_PAD_KEY_COL3__KEY_COL3 0x1b0b1
 534
 535                                 MX6QDL_PAD_GPIO_2__KEY_ROW6 0x1b0b1
 536                                 MX6QDL_PAD_GPIO_5__KEY_ROW7 0x1b0b1
 537                                 MX6QDL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b1
 538                                 MX6QDL_PAD_KEY_ROW3__KEY_ROW3 0x1b0b1
 539                         >;
 540                 };
 541         };
 542
 543         nand {
 544                 pinctrl_tx6_gpmi_nand: tx6-gpmi-nand {
 545                         fsl,pins = <
 546                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1
 547                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1
 548                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
 549                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
 550                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
 551                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
 552                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
 553                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
 554                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
 555                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
 556                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
 557                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
 558                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
 559                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
 560                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
 561                         >;
 562                 };
 563         };
 564
 565         touchpanel {
 566                 pinctrl_tsc2007_1: tsc2007grp-1 {
 567                         fsl,pins = <
 568                                 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 /* Interrupt */
 569                         >;
 570                 };
 571
 572                 pinctrl_edt_ft5x06_1: edt-ft5x06grp-1 {
 573                         fsl,pins = <
 574                                 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 /* Interrupt */
 575                                 MX6QDL_PAD_EIM_A16__GPIO2_IO22   0x1b0b0 /* Reset */
 576                                 MX6QDL_PAD_EIM_A17__GPIO2_IO21   0x1b0b0 /* Wake */
 577                         >;
 578                 };
 579         };
 580
 581         usbh1 {
 582                 pinctrl_tx6_usbh1_vbus: tx6-usbh1-vbusgrp {
 583                         fsl,pins = <
 584                                 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0 /* USBH1_VBUSEN */
 585                         >;
 586                 };
 587         };
 588
 589         usbotg {
 590                 pinctrl_tx6_usbotg: tx6-usbotggrp {
 591                         fsl,pins = <
 592                                 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x17059
 593                         >;
 594                 };
 595
 596                 pinctrl_tx6_usbotg_vbus: tx6-usbotg-vbusgrp {
 597                         fsl,pins = <
 598                                 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 /* USBOTG_VBUSEN */
 599                         >;
 600                 };
 601         };
 602 };
 603
 604 &kpp {
 605         pinctrl-names = "default";
 606         pinctrl-0 = <&pinctrl_kpp>;
 607         /* sample keymap */
 608         /* row/col 0,1 are mapped to KPP row/col 6,7 */
 609         linux,keymap = <
 610                 0x06060074 /* row 6, col 6, KEY_POWER */
 611                 0x06070052 /* row 6, col 7, KEY_KP0 */
 612                 0x0602004f /* row 6, col 2, KEY_KP1 */
 613                 0x06030050 /* row 6, col 3, KEY_KP2 */
 614                 0x07060051 /* row 7, col 6, KEY_KP3 */
 615                 0x0707004b /* row 7, col 7, KEY_KP4 */
 616                 0x0702004c /* row 7, col 2, KEY_KP5 */
 617                 0x0703004d /* row 7, col 3, KEY_KP6 */
 618                 0x02060047 /* row 2, col 6, KEY_KP7 */
 619                 0x02070048 /* row 2, col 7, KEY_KP8 */
 620                 0x02020049 /* row 2, col 2, KEY_KP9 */
 621         >;
 622 };
 623
 624 &ldb {
 625         status = "okay";
 626
 627         lvds0: lvds-channel@0 {
 628                 fsl,data-mapping = "spwg";
 629                 fsl,data-width = <18>;
 630                 status = "okay";
 631
 632                 display-timings {
 633                         native-mode = <&lvds_timing0>;
 634                         lvds_timing0: hsd100pxn1 {
 635                                 clock-frequency = <65000000>;
 636                                 hactive = <1024>;
 637                                 vactive = <768>;
 638                                 hback-porch = <220>;
 639                                 hfront-porch = <40>;
 640                                 vback-porch = <21>;
 641                                 vfront-porch = <7>;
 642                                 hsync-len = <60>;
 643                                 vsync-len = <10>;
 644                         };
 645                 };
 646         };
 647
 648         lvds1: lvds-channel@1 {
 649                 fsl,data-mapping = "spwg";
 650                 fsl,data-width = <18>;
 651                 status = "okay";
 652
 653                 display-timings {
 654                         native-mode = <&lvds_timing1>;
 655                         lvds_timing1: hsd100pxn1 {
 656                                 clock-frequency = <65000000>;
 657                                 hactive = <1024>;
 658                                 vactive = <768>;
 659                                 hback-porch = <220>;
 660                                 hfront-porch = <40>;
 661                                 vback-porch = <21>;
 662                                 vfront-porch = <7>;
 663                                 hsync-len = <60>;
 664                                 vsync-len = <10>;
 665                         };
 666                 };
 667         };
 668 };
 669
 670 &pwm1 {
 671         pinctrl-names = "default";
 672         pinctrl-0 = <&pinctrl_pwm1_2>;
 673         status = "okay";
 674 };
 675
 676 &pwm2 {
 677         pinctrl-names = "default";
 678         pinctrl-0 = <&pinctrl_pwm2_1>;
 679         status = "okay";
 680 };
 681
 682 &ssi1 {
 683         fsl,mode = "i2s-slave";
 684         status = "okay";
 685 };
 686
 687 &uart1 {
 688         pinctrl-names = "default";
 689         pinctrl-0 = <&pinctrl_uart1_2>;
 690         status = "okay";
 691 };
 692
 693 &uart2 {
 694         pinctrl-names = "default";
 695         pinctrl-0 = <&pinctrl_uart2_3 &pinctrl_uart2_rtscts_3>;
 696         status = "okay";
 697 };
 698
 699 &uart3 {
 700         pinctrl-names = "default";
 701         pinctrl-0 = <&pinctrl_uart3_3 &pinctrl_uart3_rtscts_3>;
 702         status = "okay";
 703 };
 704
 705 &usbh1 {
 706         vbus-supply = <&reg_usbh1_vbus>;
 707         pinctrl-names = "default";
 708         pinctrl-0 = <&pinctrl_tx6_usbh1_vbus>;
 709         dr_mode = "host";
 710         disable-over-current;
 711         status = "okay";
 712 };
 713
 714 &usbotg {
 715         vbus-supply = <&reg_usbotg_vbus>;
 716         pinctrl-names = "default";
 717         pinctrl-0 = <&pinctrl_tx6_usbotg &pinctrl_tx6_usbotg_vbus>;
 718         dr_mode = "peripheral";
 719         disable-over-current;
 720         status = "okay";
 721 };
 722
 723 &usdhc1 {
 724         pinctrl-names = "default";
 725         pinctrl-0 = <&pinctrl_usdhc1_2>;
 726         cd-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
 727         status = "okay";
 728 };
 729
 730 &usdhc2 {
 731         pinctrl-names = "default";
 732         pinctrl-0 = <&pinctrl_usdhc2_2>;
 733         cd-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
 734         status = "okay";
 735 };