arch/arm/boot/dts/imx6qdl-tx6.dtsi

   1 /*
   2  * Copyright 2013 Lothar Waßmann <LW@KARO-electronics.de>
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include <dt-bindings/gpio/gpio.h>
  13
  14 / {
  15         aliases {
  16                 can0 = &can2;
  17                 can1 = &can1;
  18                 display = &display;
  19                 ethernet0 = &fec;
  20                 lcdif_23bit_pins_a = &tx6_pinctrl_disp0_1;
  21                 lcdif_24bit_pins_a = &tx6_pinctrl_disp0_2;
  22                 lvds0 = &lvds0;
  23                 lvds1 = &lvds1;
  24                 pwm0 = &pwm1;
  25                 pwm1 = &pwm2;
  26                 reg_can_xcvr = &reg_can_xcvr;
  27                 stk5led = &user_led;
  28                 usbotg = &usbotg;
  29                 sdhc0 = &usdhc1;
  30                 sdhc1 = &usdhc2;
  31         };
  32
  33         memory {
  34                 reg = <0 0>; /* will be filled by U-Boot */
  35         };
  36
  37         clocks {
  38                 #address-cells = <1>;
  39                 #size-cells = <0>;
  40                 mclk: codec_clock {
  41                         compatible = "fixed-clock";
  42                         reg = <0>;
  43                         #clock-cells = <0>;
  44                         clock-frequency = <27000000>;
  45                 };
  46         };
  47
  48         backlight: backlight@0 {
  49                 compatible = "pwm-backlight";
  50                 pwms = <&pwm2 0 500000>;
  51                 power-supply = <&reg_3v3>;
  52                 /*
  53                  * a poor man's way to create an inverse 1:1 relationship
  54                  * between the PWM value and the actual duty cycle
  55                  */
  56                 brightness-levels = <100
  57                                       99 98 97 96 95 94 93 92 91 90
  58                                       89 88 87 86 85 84 83 82 81 80
  59                                       79 78 77 76 75 74 73 72 71 70
  60                                       69 68 67 66 65 64 63 62 61 60
  61                                       59 58 57 56 55 54 53 52 51 50
  62                                       49 48 47 46 45 44 43 42 41 40
  63                                       39 38 37 36 35 34 33 32 31 30
  64                                       29 28 27 26 25 24 23 22 21 20
  65                                       19 18 17 16 15 14 13 12 11 10
  66                                        9  8  7  6  5  4  3  2  1  0>;
  67                 default-brightness-level = <50>;
  68         };
  69
  70         backlight@1 {
  71                 compatible = "pwm-backlight";
  72                 pwms = <&pwm1 0 500000>;
  73                 power-supply = <&reg_3v3>;
  74                 /*
  75                  * a poor man's way to create a 1:1 relationship between
  76                  * the PWM value and the actual duty cycle
  77                  */
  78                 brightness-levels = < 0  1  2  3  4  5  6  7  8  9
  79                                      10 11 12 13 14 15 16 17 18 19
  80                                      20 21 22 23 24 25 26 27 28 29
  81                                      30 31 32 33 34 35 36 37 38 39
  82                                      40 41 42 43 44 45 46 47 48 49
  83                                      50 51 52 53 54 55 56 57 58 59
  84                                      60 61 62 63 64 65 66 67 68 69
  85                                      70 71 72 73 74 75 76 77 78 79
  86                                      80 81 82 83 84 85 86 87 88 89
  87                                      90 91 92 93 94 95 96 97 98 99
  88                                     100>;
  89                 default-brightness-level = <50>;
  90                 status = "disabled";
  91         };
  92
  93         display: display@di0 {
  94                 compatible = "fsl,imx-parallel-display";
  95                 crtcs = <&ipu1 0>;
  96                 interface-pix-fmt = "rgb24";
  97                 pinctrl-names = "default";
  98                 pinctrl-0 = <&tx6_pinctrl_disp0_1>;
  99                 status = "okay";
 100
 101                 display-timings {
 102                         VGA {
 103                                 clock-frequency = <25200000>;
 104                                 hactive = <640>;
 105                                 vactive = <480>;
 106                                 hback-porch = <48>;
 107                                 hsync-len = <96>;
 108                                 hfront-porch = <16>;
 109                                 vback-porch = <31>;
 110                                 vsync-len = <2>;
 111                                 vfront-porch = <12>;
 112                                 hsync-active = <0>;
 113                                 vsync-active = <0>;
 114                                 de-active = <1>;
 115                                 pixelclk-active = <0>;
 116                         };
 117
 118                         ETV570 {
 119                                 clock-frequency = <25200000>;
 120                                 hactive = <640>;
 121                                 vactive = <480>;
 122                                 hback-porch = <114>;
 123                                 hsync-len = <30>;
 124                                 hfront-porch = <16>;
 125                                 vback-porch = <32>;
 126                                 vsync-len = <3>;
 127                                 vfront-porch = <10>;
 128                                 hsync-active = <0>;
 129                                 vsync-active = <0>;
 130                                 de-active = <1>;
 131                                 pixelclk-active = <0>;
 132                         };
 133
 134                         ET0350 {
 135                                 clock-frequency = <6413760>;
 136                                 hactive = <320>;
 137                                 vactive = <240>;
 138                                 hback-porch = <34>;
 139                                 hsync-len = <34>;
 140                                 hfront-porch = <20>;
 141                                 vback-porch = <15>;
 142                                 vsync-len = <3>;
 143                                 vfront-porch = <4>;
 144                                 hsync-active = <0>;
 145                                 vsync-active = <0>;
 146                                 de-active = <1>;
 147                                 pixelclk-active = <0>;
 148                         };
 149
 150                         ET0430 {
 151                                 clock-frequency = <9009000>;
 152                                 hactive = <480>;
 153                                 vactive = <272>;
 154                                 hback-porch = <2>;
 155                                 hsync-len = <41>;
 156                                 hfront-porch = <2>;
 157                                 vback-porch = <2>;
 158                                 vsync-len = <10>;
 159                                 vfront-porch = <2>;
 160                                 hsync-active = <0>;
 161                                 vsync-active = <0>;
 162                                 de-active = <1>;
 163                                 pixelclk-active = <1>;
 164                         };
 165
 166                         ET0500 {
 167                                 clock-frequency = <33264000>;
 168                                 hactive = <800>;
 169                                 vactive = <480>;
 170                                 hback-porch = <88>;
 171                                 hsync-len = <128>;
 172                                 hfront-porch = <40>;
 173                                 vback-porch = <33>;
 174                                 vsync-len = <2>;
 175                                 vfront-porch = <10>;
 176                                 hsync-active = <0>;
 177                                 vsync-active = <0>;
 178                                 de-active = <1>;
 179                                 pixelclk-active = <0>;
 180                         };
 181
 182                         ET0700 { /* same as ET0500 */
 183                                 clock-frequency = <33264000>;
 184                                 hactive = <800>;
 185                                 vactive = <480>;
 186                                 hback-porch = <88>;
 187                                 hsync-len = <128>;
 188                                 hfront-porch = <40>;
 189                                 vback-porch = <33>;
 190                                 vsync-len = <2>;
 191                                 vfront-porch = <10>;
 192                                 hsync-active = <0>;
 193                                 vsync-active = <0>;
 194                                 de-active = <1>;
 195                                 pixelclk-active = <0>;
 196                         };
 197
 198                         ETQ570 {
 199                                 clock-frequency = <6596040>;
 200                                 hactive = <320>;
 201                                 vactive = <240>;
 202                                 hback-porch = <38>;
 203                                 hsync-len = <30>;
 204                                 hfront-porch = <30>;
 205                                 vback-porch = <16>;
 206                                 vsync-len = <3>;
 207                                 vfront-porch = <4>;
 208                                 hsync-active = <0>;
 209                                 vsync-active = <0>;
 210                                 de-active = <1>;
 211                                 pixelclk-active = <0>;
 212                         };
 213                 };
 214         };
 215
 216         gpio-keys {
 217                 compatible = "gpio-keys";
 218
 219                 power {
 220                         label = "Power Button";
 221                         gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 222                         linux,code = <116>; /* KEY_POWER */
 223                         gpio-key,wakeup;
 224                 };
 225         };
 226
 227         leds {
 228                 compatible = "gpio-leds";
 229
 230                 user_led: user {
 231                         label = "Heartbeat";
 232                         gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
 233                         linux,default-trigger = "heartbeat";
 234                 };
 235         };
 236
 237         regulators {
 238                 compatible = "simple-bus";
 239
 240                 reg_3v3_etn: 3v3-etn {
 241                         compatible = "regulator-fixed";
 242                         regulator-name = "3V3_ETN";
 243                         regulator-min-microvolt = <3300000>;
 244                         regulator-max-microvolt = <3300000>;
 245                         gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
 246                         enable-active-high;
 247                 };
 248
 249                 reg_2v5: 2v5 {
 250                         compatible = "regulator-fixed";
 251                         regulator-name = "2V5";
 252                         regulator-min-microvolt = <2500000>;
 253                         regulator-max-microvolt = <2500000>;
 254                         regulator-always-on;
 255                 };
 256
 257                 reg_3v3: 3v3 {
 258                         compatible = "regulator-fixed";
 259                         regulator-name = "3V3";
 260                         regulator-min-microvolt = <3300000>;
 261                         regulator-max-microvolt = <3300000>;
 262                         regulator-always-on;
 263                 };
 264
 265                 reg_can_xcvr: can-xcvr {
 266                         compatible = "regulator-fixed";
 267                         regulator-name = "CAN XCVR";
 268                         regulator-min-microvolt = <3300000>;
 269                         regulator-max-microvolt = <3300000>;
 270                         gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
 271                         enable-active-low;
 272                         pinctrl-names = "default";
 273                         pinctrl-0 = <&pinctrl_tx6qdl_flexcan_xcvr>;
 274                 };
 275
 276                 reg_lcd_pwr0: lcd-power@0 {
 277                         compatible = "regulator-fixed";
 278                         regulator-name = "LCD POWER";
 279                         regulator-min-microvolt = <3300000>;
 280                         regulator-max-microvolt = <3300000>;
 281                         gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
 282                         enable-active-high;
 283                         regulator-boot-on;
 284                 };
 285
 286                 reg_lcd_pwr1: lcd-power@1 {
 287                         compatible = "regulator-fixed";
 288                         regulator-name = "LCD POWER";
 289                         regulator-min-microvolt = <3300000>;
 290                         regulator-max-microvolt = <3300000>;
 291                         gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
 292                         enable-active-high;
 293                         regulator-boot-on;
 294                 };
 295
 296                 reg_lcd_reset: lcd-reset {
 297                         compatible = "regulator-fixed";
 298                         regulator-name = "LCD RESET";
 299                         regulator-min-microvolt = <3300000>;
 300                         regulator-max-microvolt = <3300000>;
 301                         gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
 302                         startup-delay-us = <300000>;
 303                         enable-active-high;
 304                         regulator-always-on;
 305                         regulator-boot-on;
 306                 };
 307
 308                 reg_usbh1_vbus: usbh1_vbus {
 309                         compatible = "regulator-fixed";
 310                         regulator-name = "usbh1_vbus";
 311                         regulator-min-microvolt = <5000000>;
 312                         regulator-max-microvolt = <5000000>;
 313                         gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
 314                         enable-active-high;
 315                 };
 316
 317                 reg_usbotg_vbus: usbotg_vbus {
 318                         compatible = "regulator-fixed";
 319                         regulator-name = "usbotg_vbus";
 320                         regulator-min-microvolt = <5000000>;
 321                         regulator-max-microvolt = <5000000>;
 322                         gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
 323                         enable-active-high;
 324                 };
 325         };
 326
 327         sound {
 328                 compatible = "fsl,imx6qdl-tx6qdl-sgtl5000",
 329                              "fsl,imx-audio-sgtl5000";
 330                 model = "sgtl5000-audio";
 331                 pinctrl-names = "default";
 332                 pinctrl-0 = <&pinctrl_audmux_5>;
 333                 ssi-controller = <&ssi1>;
 334                 audio-codec = <&sgtl5000>;
 335                 audio-routing =
 336                         "MIC_IN", "Mic Jack",
 337                         "Mic Jack", "Mic Bias",
 338                         "Headphone Jack", "HP_OUT";
 339                 mux-int-port = <1>;
 340                 mux-ext-port = <5>;
 341         };
 342 };
 343
 344 &audmux {
 345         status = "okay";
 346 };
 347
 348 &can1 {
 349         pinctrl-names = "default";
 350         pinctrl-0 = <&pinctrl_flexcan1_3>;
 351         xceiver-supply = <&reg_can_xcvr>;
 352
 353         status = "okay";
 354 };
 355
 356 &can2 {
 357         pinctrl-names = "default";
 358         pinctrl-0 = <&pinctrl_flexcan2_1>;
 359         xceiver-supply = <&reg_can_xcvr>;
 360
 361         status = "okay";
 362 };
 363
 364 &fec {
 365         pinctrl-names = "default";
 366         pinctrl-0 = <&pinctrl_enet_4>;
 367         phy-mode = "rmii";
 368         phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
 369         phy-supply = <&reg_3v3_etn>;
 370         status = "okay";
 371 };
 372
 373 &gpmi {
 374         pinctrl-names = "default";
 375         pinctrl-0 = <&pinctrl_tx6_gpmi_nand>;
 376         nand-on-flash-bbt;
 377         status = "okay";
 378 };
 379
 380 &i2c1 {
 381         pinctrl-names = "default";
 382         pinctrl-0 = <&pinctrl_i2c1_1>;
 383         clock-frequency = <400000>;
 384         status = "okay";
 385
 386         ds1339: rtc@68 {
 387                 compatible = "dallas,ds1339";
 388                 reg = <0x68>;
 389         };
 390 };
 391
 392 &i2c3 {
 393         pinctrl-names = "default";
 394         pinctrl-0 = <&pinctrl_i2c3_2>;
 395         clock-frequency = <400000>;
 396         status = "okay";
 397
 398         touchscreen: tsc2007@48 {
 399                 compatible = "ti,tsc2007";
 400                 reg = <0x48>;
 401                 pinctrl-names = "default";
 402                 pinctrl-0 = <&pinctrl_tsc2007_1>;
 403                 interrupt-parent = <&gpio3>;
 404                 interrupts = <26 0>;
 405                 gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
 406                 ti,x-plate-ohms = <660>;
 407                 linux,wakeup;
 408         };
 409
 410         polytouch: edt-ft5x06@38 {
 411                 compatible = "edt,edt-ft5x06";
 412                 reg = <0x38>;
 413                 pinctrl-names = "default";
 414                 pinctrl-0 = <&pinctrl_edt_ft5x06_1>;
 415                 interrupt-parent = <&gpio6>;
 416                 interrupts = <15 0>;
 417                 reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
 418                 wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
 419         };
 420
 421         sgtl5000: sgtl5000@0a {
 422                 compatible = "fsl,sgtl5000";
 423                 reg = <0x0a>;
 424                 VDDA-supply = <&reg_2v5>;
 425                 VDDIO-supply = <&reg_3v3>;
 426                 clocks = <&mclk>;
 427         };
 428 };
 429
 430 &iomuxc {
 431         pinctrl-names = "default";
 432         pinctrl-0 = <&pinctrl_hog>;
 433
 434         display {
 435                 tx6_pinctrl_disp0_1: disp0grp-1 {
 436                         fsl,pins = <
 437                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
 438                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
 439                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
 440                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
 441                                 /* PAD DISP0_DAT0 is used for the Flexcan transceiver control */
 442                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
 443                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
 444                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
 445                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
 446                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
 447                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
 448                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
 449                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
 450                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
 451                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
 452                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
 453                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
 454                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
 455                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
 456                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
 457                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
 458                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
 459                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
 460                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
 461                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
 462                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
 463                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
 464                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
 465                         >;
 466                 };
 467
 468                 tx6_pinctrl_disp0_2: disp0grp-2 {
 469                         fsl,pins = <
 470                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
 471                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
 472                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
 473                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
 474                                 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
 475                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
 476                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
 477                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
 478                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
 479                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
 480                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
 481                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
 482                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
 483                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
 484                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
 485                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
 486                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
 487                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
 488                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
 489                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
 490                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
 491                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
 492                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
 493                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
 494                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
 495                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
 496                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
 497                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
 498                         >;
 499                 };
 500         };
 501
 502         flexcan {
 503                 pinctrl_tx6qdl_flexcan_xcvr: flexcan-xcvrgrp-1 {
 504                         fsl,pins = <
 505                                 MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x1b0b0 /* Flexcan XCVR enable */
 506                         >;
 507                 };
 508         };
 509
 510         hog {
 511                 pinctrl_hog: hoggrp {
 512                         fsl,pins = <
 513                                 MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1 /* LED */
 514                                 MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x1b0b1 /* ETN PHY RESET */
 515                                 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1 /* ETN PHY POWER */
 516                                 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b1 /* ETN PHY INT
 517                                 MX6QDL_PAD_SD3_CMD__GPIO7_IO02 0x1b0b0 /* SD1 CD */
 518                                 MX6QDL_PAD_SD3_CLK__GPIO7_IO03 0x1b0b0 /* SD2 CD */
 519                                 MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b1 /* LCD Power Enable */
 520                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1 /* LCD Reset */
 521                                 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* PWR BTN */
 522                         >;
 523                 };
 524         };
 525
 526         kpp {
 527                 pinctrl_kpp: kppgrp {
 528                         fsl,pins = <
 529                                 MX6QDL_PAD_GPIO_9__KEY_COL6 0x1b0b1
 530                                 MX6QDL_PAD_GPIO_4__KEY_COL7 0x1b0b1
 531                                 MX6QDL_PAD_KEY_COL2__KEY_COL2 0x1b0b1
 532                                 MX6QDL_PAD_KEY_COL3__KEY_COL3 0x1b0b1
 533
 534                                 MX6QDL_PAD_GPIO_2__KEY_ROW6 0x1b0b1
 535                                 MX6QDL_PAD_GPIO_5__KEY_ROW7 0x1b0b1
 536                                 MX6QDL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b1
 537                                 MX6QDL_PAD_KEY_ROW3__KEY_ROW3 0x1b0b1
 538                         >;
 539                 };
 540         };
 541
 542         nand {
 543                 pinctrl_tx6_gpmi_nand: tx6-gpmi-nand {
 544                         fsl,pins = <
 545                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1
 546                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1
 547                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
 548                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
 549                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
 550                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
 551                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
 552                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
 553                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
 554                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
 555                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
 556                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
 557                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
 558                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
 559                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
 560                         >;
 561                 };
 562         };
 563
 564         touchpanel {
 565                 pinctrl_tsc2007_1: tsc2007grp-1 {
 566                         fsl,pins = <
 567                                 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 /* Interrupt */
 568                         >;
 569                 };
 570
 571                 pinctrl_edt_ft5x06_1: edt-ft5x06grp-1 {
 572                         fsl,pins = <
 573                                 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 /* Interrupt */
 574                                 MX6QDL_PAD_EIM_A16__GPIO2_IO22   0x1b0b0 /* Reset */
 575                                 MX6QDL_PAD_EIM_A17__GPIO2_IO21   0x1b0b0 /* Wake */
 576                         >;
 577                 };
 578         };
 579
 580         usbh1 {
 581                 pinctrl_tx6_usbh1_vbus: tx6-usbh1-vbusgrp {
 582                         fsl,pins = <
 583                                 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0 /* USBH1_VBUSEN */
 584                         >;
 585                 };
 586         };
 587
 588         usbotg {
 589                 pinctrl_tx6_usbotg: tx6-usbotggrp {
 590                         fsl,pins = <
 591                                 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x17059
 592                         >;
 593                 };
 594
 595                 pinctrl_tx6_usbotg_vbus: tx6-usbotg-vbusgrp {
 596                         fsl,pins = <
 597                                 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 /* USBOTG_VBUSEN */
 598                         >;
 599                 };
 600         };
 601 };
 602
 603 &kpp {
 604         pinctrl-names = "default";
 605         pinctrl-0 = <&pinctrl_kpp>;
 606         /* sample keymap */
 607         /* row/col 0,1 are mapped to KPP row/col 6,7 */
 608         linux,keymap = <
 609                 0x06060074 /* row 6, col 6, KEY_POWER */
 610                 0x06070052 /* row 6, col 7, KEY_KP0 */
 611                 0x0602004f /* row 6, col 2, KEY_KP1 */
 612                 0x06030050 /* row 6, col 3, KEY_KP2 */
 613                 0x07060051 /* row 7, col 6, KEY_KP3 */
 614                 0x0707004b /* row 7, col 7, KEY_KP4 */
 615                 0x0702004c /* row 7, col 2, KEY_KP5 */
 616                 0x0703004d /* row 7, col 3, KEY_KP6 */
 617                 0x02060047 /* row 2, col 6, KEY_KP7 */
 618                 0x02070048 /* row 2, col 7, KEY_KP8 */
 619                 0x02020049 /* row 2, col 2, KEY_KP9 */
 620         >;
 621 };
 622
 623 &ldb {
 624         status = "okay";
 625
 626         lvds0: lvds-channel@0 {
 627                 fsl,data-mapping = "spwg";
 628                 fsl,data-width = <18>;
 629                 status = "okay";
 630
 631                 display-timings {
 632                         native-mode = <&lvds_timing0>;
 633                         lvds_timing0: hsd100pxn1 {
 634                                 clock-frequency = <65000000>;
 635                                 hactive = <1024>;
 636                                 vactive = <768>;
 637                                 hback-porch = <220>;
 638                                 hfront-porch = <40>;
 639                                 vback-porch = <21>;
 640                                 vfront-porch = <7>;
 641                                 hsync-len = <60>;
 642                                 vsync-len = <10>;
 643                         };
 644                 };
 645         };
 646
 647         lvds1: lvds-channel@1 {
 648                 fsl,data-mapping = "spwg";
 649                 fsl,data-width = <18>;
 650                 status = "okay";
 651
 652                 display-timings {
 653                         native-mode = <&lvds_timing1>;
 654                         lvds_timing1: hsd100pxn1 {
 655                                 clock-frequency = <65000000>;
 656                                 hactive = <1024>;
 657                                 vactive = <768>;
 658                                 hback-porch = <220>;
 659                                 hfront-porch = <40>;
 660                                 vback-porch = <21>;
 661                                 vfront-porch = <7>;
 662                                 hsync-len = <60>;
 663                                 vsync-len = <10>;
 664                         };
 665                 };
 666         };
 667 };
 668
 669 &pwm1 {
 670         pinctrl-names = "default";
 671         pinctrl-0 = <&pinctrl_pwm1_2>;
 672         status = "okay";
 673 };
 674
 675 &pwm2 {
 676         pinctrl-names = "default";
 677         pinctrl-0 = <&pinctrl_pwm2_1>;
 678         status = "okay";
 679 };
 680
 681 &ssi1 {
 682         fsl,mode = "i2s-slave";
 683         status = "okay";
 684 };
 685
 686 &uart1 {
 687         pinctrl-names = "default";
 688         pinctrl-0 = <&pinctrl_uart1_2>;
 689         status = "okay";
 690 };
 691
 692 &uart2 {
 693         pinctrl-names = "default";
 694         pinctrl-0 = <&pinctrl_uart2_3 &pinctrl_uart2_rtscts_3>;
 695         status = "okay";
 696 };
 697
 698 &uart3 {
 699         pinctrl-names = "default";
 700         pinctrl-0 = <&pinctrl_uart3_3 &pinctrl_uart3_rtscts_3>;
 701         status = "okay";
 702 };
 703
 704 &usbh1 {
 705         vbus-supply = <&reg_usbh1_vbus>;
 706         pinctrl-names = "default";
 707         pinctrl-0 = <&pinctrl_tx6_usbh1_vbus>;
 708         dr_mode = "host";
 709         disable-over-current;
 710         status = "okay";
 711 };
 712
 713 &usbotg {
 714         vbus-supply = <&reg_usbotg_vbus>;
 715         pinctrl-names = "default";
 716         pinctrl-0 = <&pinctrl_tx6_usbotg &pinctrl_tx6_usbotg_vbus>;
 717         dr_mode = "peripheral";
 718         disable-over-current;
 719         status = "okay";
 720 };
 721
 722 &usdhc1 {
 723         pinctrl-names = "default";
 724         pinctrl-0 = <&pinctrl_usdhc1_2>;
 725         cd-gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
 726         status = "okay";
 727 };
 728
 729 &usdhc2 {
 730         pinctrl-names = "default";
 731         pinctrl-0 = <&pinctrl_usdhc2_2>;
 732         cd-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
 733         status = "okay";
 734 };