]> git.kernelconcepts.de Git - karo-tx-linux.git/blob - arch/arm/boot/dts/keystone-k2g.dtsi
Merge tag 'renesas-fixes4-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel...
[karo-tx-linux.git] / arch / arm / boot / dts / keystone-k2g.dtsi
1 /*
2  * Device Tree Source for K2G SOC
3  *
4  * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11  * kind, whether express or implied; without even the implied warranty
12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include <dt-bindings/pinctrl/keystone.h>
18
19 / {
20         compatible = "ti,k2g","ti,keystone";
21         model = "Texas Instruments K2G SoC";
22         #address-cells = <2>;
23         #size-cells = <2>;
24         interrupt-parent = <&gic>;
25
26         chosen { };
27
28         aliases {
29                 serial0 = &uart0;
30         };
31
32         cpus {
33                 #address-cells = <1>;
34                 #size-cells = <0>;
35
36                 cpu@0 {
37                         compatible = "arm,cortex-a15";
38                         device_type = "cpu";
39                         reg = <0>;
40                 };
41         };
42
43         gic: interrupt-controller@02561000 {
44                 compatible = "arm,gic-400", "arm,cortex-a15-gic";
45                 #interrupt-cells = <3>;
46                 interrupt-controller;
47                 reg = <0x0 0x02561000 0x0 0x1000>,
48                       <0x0 0x02562000 0x0 0x2000>,
49                       <0x0 0x02564000 0x0 0x2000>,
50                       <0x0 0x02566000 0x0 0x2000>;
51                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
52                                 IRQ_TYPE_LEVEL_HIGH)>;
53         };
54
55         timer {
56                 compatible = "arm,armv7-timer";
57                 interrupts =
58                         <GIC_PPI 13
59                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
60                         <GIC_PPI 14
61                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
62                         <GIC_PPI 11
63                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
64                         <GIC_PPI 10
65                                 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
66         };
67
68         pmu {
69                 compatible = "arm,cortex-a15-pmu";
70                 interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
71         };
72
73         soc {
74                 #address-cells = <1>;
75                 #size-cells = <1>;
76                 #pinctrl-cells = <1>;
77                 compatible = "ti,keystone","simple-bus";
78                 ranges = <0x0 0x0 0x0 0xc0000000>;
79                 dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
80
81                 msm_ram: msmram@0c000000 {
82                         compatible = "mmio-sram";
83                         reg = <0x0c000000 0x100000>;
84                         ranges = <0x0 0x0c000000 0x100000>;
85                         #address-cells = <1>;
86                         #size-cells = <1>;
87
88                         sram-bm@f7000 {
89                                 reg = <0x000f7000 0x8000>;
90                         };
91                 };
92
93                 k2g_pinctrl: pinmux@02621000 {
94                         compatible = "pinctrl-single";
95                         reg = <0x02621000 0x410>;
96                         pinctrl-single,register-width = <32>;
97                         pinctrl-single,function-mask = <0x001b0007>;
98                 };
99
100                 devctrl: device-state-control@02620000 {
101                         compatible = "ti,keystone-devctrl", "syscon";
102                         reg = <0x02620000 0x1000>;
103                 };
104
105                 uart0: serial@02530c00 {
106                         compatible = "ti,da830-uart", "ns16550a";
107                         current-speed = <115200>;
108                         reg-shift = <2>;
109                         reg-io-width = <4>;
110                         reg = <0x02530c00 0x100>;
111                         interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
112                         clock-frequency = <200000000>;
113                         status = "disabled";
114                 };
115
116                 kirq0: keystone_irq@026202a0 {
117                         compatible = "ti,keystone-irq";
118                         interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
119                         interrupt-controller;
120                         #interrupt-cells = <1>;
121                         ti,syscon-dev = <&devctrl 0x2a0>;
122                 };
123
124                 dspgpio0: keystone_dsp_gpio@02620240 {
125                         compatible = "ti,keystone-dsp-gpio";
126                         gpio-controller;
127                         #gpio-cells = <2>;
128                         gpio,syscon-dev = <&devctrl 0x240>;
129                 };
130
131                 msgmgr: msgmgr@02a00000 {
132                         compatible = "ti,k2g-message-manager";
133                         #mbox-cells = <2>;
134                         reg-names = "queue_proxy_region",
135                                     "queue_state_debug_region";
136                         reg = <0x02a00000 0x400000>, <0x028c3400 0x400>;
137                         interrupt-names = "rx_005",
138                                           "rx_057";
139                         interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
140                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
141                 };
142         };
143 };