arch/arm/boot/dts/r8a7792-wheat.dts

   1 /*
   2  * Device Tree Source for the Wheat board
   3  *
   4  * Copyright (C) 2016 Renesas Electronics Corporation
   5  * Copyright (C) 2016 Cogent  Embedded, Inc.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 /dts-v1/;
  13 #include "r8a7792.dtsi"
  14 #include <dt-bindings/gpio/gpio.h>
  15
  16 / {
  17         model = "Wheat";
  18         compatible = "renesas,wheat", "renesas,r8a7792";
  19
  20         aliases {
  21                 serial0 = &scif0;
  22         };
  23
  24         chosen {
  25                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  26                 stdout-path = "serial0:115200n8";
  27         };
  28
  29         memory@40000000 {
  30                 device_type = "memory";
  31                 reg = <0 0x40000000 0 0x40000000>;
  32         };
  33
  34         d3_3v: regulator-3v3 {
  35                 compatible = "regulator-fixed";
  36                 regulator-name = "D3.3V";
  37                 regulator-min-microvolt = <3300000>;
  38                 regulator-max-microvolt = <3300000>;
  39                 regulator-boot-on;
  40                 regulator-always-on;
  41         };
  42
  43         ethernet@18000000 {
  44                 compatible = "smsc,lan89218", "smsc,lan9115";
  45                 reg = <0 0x18000000 0 0x100>;
  46                 phy-mode = "mii";
  47                 interrupt-parent = <&irqc>;
  48                 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
  49                 smsc,irq-push-pull;
  50                 smsc,save-mac-address;
  51                 reg-io-width = <4>;
  52                 vddvario-supply = <&d3_3v>;
  53                 vdd33a-supply = <&d3_3v>;
  54
  55                 pinctrl-0 = <&lan89218_pins>;
  56                 pinctrl-names = "default";
  57         };
  58
  59         vcc_sdhi0: regulator-vcc-sdhi0 {
  60                 compatible = "regulator-fixed";
  61
  62                 regulator-name = "SDHI0 Vcc";
  63                 regulator-min-microvolt = <3300000>;
  64                 regulator-max-microvolt = <3300000>;
  65
  66                 gpio = <&gpio11 12 GPIO_ACTIVE_HIGH>;
  67                 enable-active-high;
  68         };
  69 };
  70
  71 &extal_clk {
  72         clock-frequency = <20000000>;
  73 };
  74
  75 &pfc {
  76         scif0_pins: scif0 {
  77                 groups = "scif0_data";
  78                 function = "scif0";
  79         };
  80
  81         lan89218_pins: lan89218 {
  82                 intc {
  83                         groups = "intc_irq0";
  84                         function = "intc";
  85                 };
  86                 lbsc {
  87                         groups = "lbsc_ex_cs0";
  88                         function = "lbsc";
  89                 };
  90         };
  91
  92         can0_pins: can0 {
  93                 groups = "can0_data";
  94                 function = "can0";
  95         };
  96
  97         can1_pins: can1 {
  98                 groups = "can1_data";
  99                 function = "can1";
 100         };
 101
 102         sdhi0_pins: sdhi0 {
 103                 groups = "sdhi0_data4", "sdhi0_ctrl";
 104                 function = "sdhi0";
 105         };
 106
 107         qspi_pins: qspi {
 108                 groups = "qspi_ctrl", "qspi_data4";
 109                 function = "qspi";
 110         };
 111 };
 112
 113 &scif0 {
 114         pinctrl-0 = <&scif0_pins>;
 115         pinctrl-names = "default";
 116
 117         status = "okay";
 118 };
 119
 120 &can0 {
 121         pinctrl-0 = <&can0_pins>;
 122         pinctrl-names = "default";
 123
 124         status = "okay";
 125 };
 126
 127 &can1 {
 128         pinctrl-0 = <&can1_pins>;
 129         pinctrl-names = "default";
 130
 131         status = "okay";
 132 };
 133
 134 &sdhi0 {
 135         pinctrl-0 = <&sdhi0_pins>;
 136         pinctrl-names = "default";
 137
 138         vmmc-supply = <&vcc_sdhi0>;
 139         cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW>;
 140         status = "okay";
 141 };
 142
 143 &qspi {
 144         pinctrl-0 = <&qspi_pins>;
 145         pinctrl-names = "default";
 146         status = "okay";
 147
 148         flash@0 {
 149                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
 150                 reg = <0>;
 151                 spi-max-frequency = <30000000>;
 152                 spi-tx-bus-width = <4>;
 153                 spi-rx-bus-width = <4>;
 154                 spi-cpol;
 155                 spi-cpha;
 156                 m25p,fast-read;
 157
 158                 partitions {
 159                         compatible = "fixed-partitions";
 160                         #address-cells = <1>;
 161                         #size-cells = <1>;
 162
 163                         partition@0 {
 164                                 label = "loader";
 165                                 reg = <0x00000000 0x00040000>;
 166                                 read-only;
 167                         };
 168                         partition@40000 {
 169                                 label = "user";
 170                                 reg = <0x00040000 0x00400000>;
 171                                 read-only;
 172                         };
 173                         partition@440000 {
 174                                 label = "flash";
 175                                 reg = <0x00440000 0x03bc0000>;
 176                         };
 177                 };
 178         };
 179 };