arch/arm/boot/dts/tegra30-colibri.dtsi

   1 #include <dt-bindings/input/input.h>
   2 #include "tegra30.dtsi"
   3
   4 /*
   5  * Toradex Colibri T30 Module Device Tree
   6  * Compatible for Revisions V1.1B, V1.1C, V1.1D, V1.1E; IT: V1.1A
   7  */
   8 / {
   9         model = "Toradex Colibri T30";
  10         compatible = "toradex,colibri_t30", "nvidia,tegra30";
  11
  12         memory {
  13                 reg = <0x80000000 0x40000000>;
  14         };
  15
  16         host1x@50000000 {
  17                 hdmi@54280000 {
  18                         vdd-supply = <&avdd_hdmi_3v3_reg>;
  19                         pll-supply = <&avdd_hdmi_pll_1v8_reg>;
  20
  21                         nvidia,hpd-gpio =
  22                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  23                         nvidia,ddc-i2c-bus = <&hdmiddc>;
  24                 };
  25         };
  26
  27         pinmux@70000868 {
  28                 pinctrl-names = "default";
  29                 pinctrl-0 = <&state_default>;
  30
  31                 state_default: pinmux {
  32                         /* Colibri BL_ON */
  33                         pv2 {
  34                                 nvidia,pins = "pv2";
  35                                 nvidia,function = "rsvd4";
  36                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  37                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  38                         };
  39
  40                         /* Colibri Backlight PWM<A> */
  41                         sdmmc3_dat3_pb4 {
  42                                 nvidia,pins = "sdmmc3_dat3_pb4";
  43                                 nvidia,function = "pwm0";
  44                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  45                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  46                         };
  47
  48                         /* Colibri CAN_INT */
  49                         kb_row8_ps0 {
  50                                 nvidia,pins = "kb_row8_ps0";
  51                                 nvidia,function = "kbc";
  52                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  53                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  54                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  55                         };
  56
  57                         /*
  58                          * Colibri L_BIAS, LCD_M1 is muxed with LCD_DE
  59                          * todays display need DE, disable LCD_M1
  60                          */
  61                         lcd_m1_pw1 {
  62                                 nvidia,pins = "lcd_m1_pw1";
  63                                 nvidia,function = "rsvd3";
  64                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  65                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  66                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  67                         };
  68
  69                         /* Colibri MMC */
  70                         kb_row10_ps2 {
  71                                 nvidia,pins = "kb_row10_ps2";
  72                                 nvidia,function = "sdmmc2";
  73                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  74                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  75                         };
  76                         kb_row11_ps3 {
  77                                 nvidia,pins = "kb_row11_ps3",
  78                                               "kb_row12_ps4",
  79                                               "kb_row13_ps5",
  80                                               "kb_row14_ps6",
  81                                               "kb_row15_ps7";
  82                                 nvidia,function = "sdmmc2";
  83                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
  84                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  85                         };
  86
  87                         /* Colibri SSP */
  88                         ulpi_clk_py0 {
  89                                 nvidia,pins = "ulpi_clk_py0",
  90                                               "ulpi_dir_py1",
  91                                               "ulpi_nxt_py2",
  92                                               "ulpi_stp_py3";
  93                                 nvidia,function = "spi1";
  94                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  95                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  96                         };
  97                         sdmmc3_dat6_pd3 {
  98                                 nvidia,pins = "sdmmc3_dat6_pd3",
  99                                               "sdmmc3_dat7_pd4";
 100                                 nvidia,function = "spdif";
 101                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 102                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 103                         };
 104
 105                         /* Colibri UART_A */
 106                         ulpi_data0 {
 107                                 nvidia,pins = "ulpi_data0_po1",
 108                                               "ulpi_data1_po2",
 109                                               "ulpi_data2_po3",
 110                                               "ulpi_data3_po4",
 111                                               "ulpi_data4_po5",
 112                                               "ulpi_data5_po6",
 113                                               "ulpi_data6_po7",
 114                                               "ulpi_data7_po0";
 115                                 nvidia,function = "uarta";
 116                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 117                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 118                         };
 119
 120                         /* Colibri UART_B */
 121                         gmi_a16_pj7 {
 122                                 nvidia,pins = "gmi_a16_pj7",
 123                                               "gmi_a17_pb0",
 124                                               "gmi_a18_pb1",
 125                                               "gmi_a19_pk7";
 126                                 nvidia,function = "uartd";
 127                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 128                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 129                         };
 130
 131                         /* Colibri UART_C */
 132                         uart2_rxd {
 133                                 nvidia,pins = "uart2_rxd_pc3",
 134                                               "uart2_txd_pc2";
 135                                 nvidia,function = "uartb";
 136                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 137                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 138                         };
 139
 140                         /* eMMC */
 141                         sdmmc4_clk_pcc4 {
 142                                 nvidia,pins = "sdmmc4_clk_pcc4",
 143                                               "sdmmc4_rst_n_pcc3";
 144                                 nvidia,function = "sdmmc4";
 145                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 146                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 147                         };
 148                         sdmmc4_dat0_paa0 {
 149                                 nvidia,pins = "sdmmc4_dat0_paa0",
 150                                               "sdmmc4_dat1_paa1",
 151                                               "sdmmc4_dat2_paa2",
 152                                               "sdmmc4_dat3_paa3",
 153                                               "sdmmc4_dat4_paa4",
 154                                               "sdmmc4_dat5_paa5",
 155                                               "sdmmc4_dat6_paa6",
 156                                               "sdmmc4_dat7_paa7";
 157                                 nvidia,function = "sdmmc4";
 158                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 159                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 160                         };
 161
 162                         /* Power I2C (On-module) */
 163                         pwr_i2c_scl_pz6 {
 164                                 nvidia,pins = "pwr_i2c_scl_pz6",
 165                                               "pwr_i2c_sda_pz7";
 166                                 nvidia,function = "i2cpwr";
 167                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 168                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 169                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 170                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 171                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 172                         };
 173
 174                         /*
 175                          * THERMD_ALERT#, unlatched I2C address pin of LM95245
 176                          * temperature sensor therefore requires disabling for
 177                          * now
 178                          */
 179                         lcd_dc1_pd2 {
 180                                 nvidia,pins = "lcd_dc1_pd2";
 181                                 nvidia,function = "rsvd3";
 182                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 183                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 184                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 185                         };
 186
 187                         /* TOUCH_PEN_INT# */
 188                         pv0 {
 189                                 nvidia,pins = "pv0";
 190                                 nvidia,function = "rsvd1";
 191                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 192                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 193                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 194                         };
 195                 };
 196         };
 197
 198         hdmiddc: i2c@7000c700 {
 199                 clock-frequency = <100000>;
 200         };
 201
 202         /*
 203          * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
 204          * touch screen controller
 205          */
 206         i2c@7000d000 {
 207                 status = "okay";
 208                 clock-frequency = <100000>;
 209
 210                 pmic: tps65911@2d {
 211                         compatible = "ti,tps65911";
 212                         reg = <0x2d>;
 213
 214                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 215                         #interrupt-cells = <2>;
 216                         interrupt-controller;
 217
 218                         ti,system-power-controller;
 219
 220                         #gpio-cells = <2>;
 221                         gpio-controller;
 222
 223                         vcc1-supply = <&sys_3v3_reg>;
 224                         vcc2-supply = <&sys_3v3_reg>;
 225                         vcc3-supply = <&vio_reg>;
 226                         vcc4-supply = <&sys_3v3_reg>;
 227                         vcc5-supply = <&sys_3v3_reg>;
 228                         vcc6-supply = <&vio_reg>;
 229                         vcc7-supply = <&charge_pump_5v0_reg>;
 230                         vccio-supply = <&sys_3v3_reg>;
 231
 232                         regulators {
 233                                 /* SW1: +V1.35_VDDIO_DDR */
 234                                 vdd1_reg: vdd1 {
 235                                         regulator-name = "vddio_ddr_1v35";
 236                                         regulator-min-microvolt = <1350000>;
 237                                         regulator-max-microvolt = <1350000>;
 238                                         regulator-always-on;
 239                                 };
 240
 241                                 /* SW2: unused */
 242
 243                                 /* SW CTRL: +V1.0_VDD_CPU */
 244                                 vddctrl_reg: vddctrl {
 245                                         regulator-name = "vdd_cpu,vdd_sys";
 246                                         regulator-min-microvolt = <1150000>;
 247                                         regulator-max-microvolt = <1150000>;
 248                                         regulator-always-on;
 249                                 };
 250
 251                                 /* SWIO: +V1.8 */
 252                                 vio_reg: vio {
 253                                         regulator-name = "vdd_1v8_gen";
 254                                         regulator-min-microvolt = <1800000>;
 255                                         regulator-max-microvolt = <1800000>;
 256                                         regulator-always-on;
 257                                 };
 258
 259                                 /* LDO1: unused */
 260
 261                                 /*
 262                                  * EN_+V3.3 switching via FET:
 263                                  * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
 264                                  * see also 3v3 fixed supply
 265                                  */
 266                                 ldo2_reg: ldo2 {
 267                                         regulator-name = "en_3v3";
 268                                         regulator-min-microvolt = <3300000>;
 269                                         regulator-max-microvolt = <3300000>;
 270                                         regulator-always-on;
 271                                 };
 272
 273                                 /* LDO3: unused */
 274
 275                                 /* +V1.2_VDD_RTC */
 276                                 ldo4_reg: ldo4 {
 277                                         regulator-name = "vdd_rtc";
 278                                         regulator-min-microvolt = <1200000>;
 279                                         regulator-max-microvolt = <1200000>;
 280                                         regulator-always-on;
 281                                 };
 282
 283                                 /*
 284                                  * +V2.8_AVDD_VDAC:
 285                                  * only required for analog RGB
 286                                  */
 287                                 ldo5_reg: ldo5 {
 288                                         regulator-name = "avdd_vdac";
 289                                         regulator-min-microvolt = <2800000>;
 290                                         regulator-max-microvolt = <2800000>;
 291                                         regulator-always-on;
 292                                 };
 293
 294                                 /*
 295                                  * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
 296                                  * but LDO6 can't set voltage in 50mV
 297                                  * granularity
 298                                  */
 299                                 ldo6_reg: ldo6 {
 300                                         regulator-name = "avdd_plle";
 301                                         regulator-min-microvolt = <1100000>;
 302                                         regulator-max-microvolt = <1100000>;
 303                                 };
 304
 305                                 /* +V1.2_AVDD_PLL */
 306                                 ldo7_reg: ldo7 {
 307                                         regulator-name = "avdd_pll";
 308                                         regulator-min-microvolt = <1200000>;
 309                                         regulator-max-microvolt = <1200000>;
 310                                         regulator-always-on;
 311                                 };
 312
 313                                 /* +V1.0_VDD_DDR_HS */
 314                                 ldo8_reg: ldo8 {
 315                                         regulator-name = "vdd_ddr_hs";
 316                                         regulator-min-microvolt = <1000000>;
 317                                         regulator-max-microvolt = <1000000>;
 318                                         regulator-always-on;
 319                                 };
 320                         };
 321                 };
 322
 323                 /* STMPE811 touch screen controller */
 324                 stmpe811@41 {
 325                         compatible = "st,stmpe811";
 326                         #address-cells = <1>;
 327                         #size-cells = <0>;
 328                         reg = <0x41>;
 329                         interrupts = <TEGRA_GPIO(V, 0) IRQ_TYPE_LEVEL_LOW>;
 330                         interrupt-parent = <&gpio>;
 331                         interrupt-controller;
 332                         id = <0>;
 333                         blocks = <0x5>;
 334                         irq-trigger = <0x1>;
 335
 336                         stmpe_touchscreen {
 337                                 compatible = "st,stmpe-ts";
 338                                 reg = <0>;
 339                                 /* 3.25 MHz ADC clock speed */
 340                                 st,adc-freq = <1>;
 341                                 /* 8 sample average control */
 342                                 st,ave-ctrl = <3>;
 343                                 /* 7 length fractional part in z */
 344                                 st,fraction-z = <7>;
 345                                 /*
 346                                  * 50 mA typical 80 mA max touchscreen drivers
 347                                  * current limit value
 348                                  */
 349                                 st,i-drive = <1>;
 350                                 /* 12-bit ADC */
 351                                 st,mod-12b = <1>;
 352                                 /* internal ADC reference */
 353                                 st,ref-sel = <0>;
 354                                 /* ADC converstion time: 80 clocks */
 355                                 st,sample-time = <4>;
 356                                 /* 1 ms panel driver settling time */
 357                                 st,settling = <3>;
 358                                 /* 5 ms touch detect interrupt delay */
 359                                 st,touch-det-delay = <5>;
 360                         };
 361                 };
 362
 363                 /*
 364                  * LM95245 temperature sensor
 365                  * Note: OVERT_N directly connected to PMIC PWRDN
 366                  */
 367                 temp-sensor@4c {
 368                         compatible = "national,lm95245";
 369                         reg = <0x4c>;
 370                 };
 371
 372                 /* SW: +V1.2_VDD_CORE */
 373                 tps62362@60 {
 374                         compatible = "ti,tps62362";
 375                         reg = <0x60>;
 376
 377                         regulator-name = "tps62362-vout";
 378                         regulator-min-microvolt = <900000>;
 379                         regulator-max-microvolt = <1400000>;
 380                         regulator-boot-on;
 381                         regulator-always-on;
 382                         ti,vsel0-state-low;
 383                         /* VSEL1: EN_CORE_DVFS_N low for DVFS */
 384                         ti,vsel1-state-low;
 385                 };
 386         };
 387
 388         pmc@7000e400 {
 389                 nvidia,invert-interrupt;
 390                 nvidia,suspend-mode = <1>;
 391                 nvidia,cpu-pwr-good-time = <5000>;
 392                 nvidia,cpu-pwr-off-time = <5000>;
 393                 nvidia,core-pwr-good-time = <3845 3845>;
 394                 nvidia,core-pwr-off-time = <0>;
 395                 nvidia,core-power-req-active-high;
 396                 nvidia,sys-clock-req-active-high;
 397         };
 398
 399         /* eMMC */
 400         sdhci@78000600 {
 401                 status = "okay";
 402                 bus-width = <8>;
 403                 non-removable;
 404         };
 405
 406         /* EHCI instance 1: USB2_DP/N -> AX88772B */
 407         usb@7d004000 {
 408                 status = "okay";
 409         };
 410
 411         usb-phy@7d004000 {
 412                 status = "okay";
 413                 nvidia,is-wired = <1>;
 414         };
 415
 416         clocks {
 417                 compatible = "simple-bus";
 418                 #address-cells = <1>;
 419                 #size-cells = <0>;
 420
 421                 clk32k_in: clk@0 {
 422                         compatible = "fixed-clock";
 423                         reg=<0>;
 424                         #clock-cells = <0>;
 425                         clock-frequency = <32768>;
 426                 };
 427         };
 428
 429         regulators {
 430                 compatible = "simple-bus";
 431                 #address-cells = <1>;
 432                 #size-cells = <0>;
 433
 434                 avdd_hdmi_pll_1v8_reg: regulator@100 {
 435                         compatible = "regulator-fixed";
 436                         reg = <100>;
 437                         regulator-name = "+V1.8_AVDD_HDMI_PLL";
 438                         regulator-min-microvolt = <1800000>;
 439                         regulator-max-microvolt = <1800000>;
 440                         enable-active-high;
 441                         gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
 442                         vin-supply = <&vio_reg>;
 443                 };
 444
 445                 sys_3v3_reg: regulator@101 {
 446                         compatible = "regulator-fixed";
 447                         reg = <101>;
 448                         regulator-name = "3v3";
 449                         regulator-min-microvolt = <3300000>;
 450                         regulator-max-microvolt = <3300000>;
 451                         regulator-always-on;
 452                 };
 453
 454                 avdd_hdmi_3v3_reg: regulator@102 {
 455                         compatible = "regulator-fixed";
 456                         reg = <102>;
 457                         regulator-name = "+V3.3_AVDD_HDMI";
 458                         regulator-min-microvolt = <3300000>;
 459                         regulator-max-microvolt = <3300000>;
 460                         enable-active-high;
 461                         gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
 462                         vin-supply = <&sys_3v3_reg>;
 463                 };
 464
 465                 charge_pump_5v0_reg: regulator@103 {
 466                         compatible = "regulator-fixed";
 467                         reg = <103>;
 468                         regulator-name = "5v0";
 469                         regulator-min-microvolt = <5000000>;
 470                         regulator-max-microvolt = <5000000>;
 471                         regulator-always-on;
 472                 };
 473         };
 474 };