arch/arm/mach-highbank/highbank.c

   1 /*
   2  * Copyright 2010-2011 Calxeda, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #include <linux/clk.h>
  17 #include <linux/clkdev.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/io.h>
  20 #include <linux/irq.h>
  21 #include <linux/irqdomain.h>
  22 #include <linux/of.h>
  23 #include <linux/of_irq.h>
  24 #include <linux/of_platform.h>
  25 #include <linux/of_address.h>
  26 #include <linux/smp.h>
  27 #include <linux/amba/bus.h>
  28
  29 #include <asm/arch_timer.h>
  30 #include <asm/cacheflush.h>
  31 #include <asm/cputype.h>
  32 #include <asm/smp_plat.h>
  33 #include <asm/smp_twd.h>
  34 #include <asm/hardware/arm_timer.h>
  35 #include <asm/hardware/timer-sp.h>
  36 #include <asm/hardware/gic.h>
  37 #include <asm/hardware/cache-l2x0.h>
  38 #include <asm/mach/arch.h>
  39 #include <asm/mach/map.h>
  40 #include <asm/mach/time.h>
  41
  42 #include "core.h"
  43 #include "sysregs.h"
  44
  45 void __iomem *sregs_base;
  46 void __iomem *scu_base_addr;
  47
  48 static void __init highbank_scu_map_io(void)
  49 {
  50         unsigned long base;
  51
  52         /* Get SCU base */
  53         asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  54
  55         scu_base_addr = ioremap(base, SZ_4K);
  56 }
  57
  58 #define HB_JUMP_TABLE_PHYS(cpu)         (0x40 + (0x10 * (cpu)))
  59 #define HB_JUMP_TABLE_VIRT(cpu)         phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
  60
  61 void highbank_set_cpu_jump(int cpu, void *jump_addr)
  62 {
  63         cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 0);
  64         writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
  65         __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
  66         outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
  67                           HB_JUMP_TABLE_PHYS(cpu) + 15);
  68 }
  69
  70 const static struct of_device_id irq_match[] = {
  71         { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, },
  72         { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
  73         {}
  74 };
  75
  76 #ifdef CONFIG_CACHE_L2X0
  77 static void highbank_l2x0_disable(void)
  78 {
  79         /* Disable PL310 L2 Cache controller */
  80         highbank_smc1(0x102, 0x0);
  81 }
  82 #endif
  83
  84 static void __init highbank_init_irq(void)
  85 {
  86         of_irq_init(irq_match);
  87
  88         if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
  89                 highbank_scu_map_io();
  90
  91 #ifdef CONFIG_CACHE_L2X0
  92         /* Enable PL310 L2 Cache controller */
  93         highbank_smc1(0x102, 0x1);
  94         l2x0_of_init(0, ~0UL);
  95         outer_cache.disable = highbank_l2x0_disable;
  96 #endif
  97 }
  98
  99 static struct clk_lookup lookup = {
 100         .dev_id = "sp804",
 101         .con_id = NULL,
 102 };
 103
 104 static void __init highbank_timer_init(void)
 105 {
 106         int irq;
 107         struct device_node *np;
 108         void __iomem *timer_base;
 109
 110         /* Map system registers */
 111         np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
 112         sregs_base = of_iomap(np, 0);
 113         WARN_ON(!sregs_base);
 114
 115         np = of_find_compatible_node(NULL, NULL, "arm,sp804");
 116         timer_base = of_iomap(np, 0);
 117         WARN_ON(!timer_base);
 118         irq = irq_of_parse_and_map(np, 0);
 119
 120         highbank_clocks_init();
 121         lookup.clk = of_clk_get(np, 0);
 122         clkdev_add(&lookup);
 123
 124         sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1");
 125         sp804_clockevents_init(timer_base, irq, "timer0");
 126
 127         twd_local_timer_of_register();
 128
 129         arch_timer_of_register();
 130         arch_timer_sched_clock_init();
 131 }
 132
 133 static void highbank_power_off(void)
 134 {
 135         highbank_set_pwr_shutdown();
 136
 137         while (1)
 138                 cpu_do_idle();
 139 }
 140
 141 static int highbank_platform_notifier(struct notifier_block *nb,
 142                                   unsigned long event, void *__dev)
 143 {
 144         struct resource *res;
 145         int reg = -1;
 146         struct device *dev = __dev;
 147
 148         if (event != BUS_NOTIFY_ADD_DEVICE)
 149                 return NOTIFY_DONE;
 150
 151         if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci"))
 152                 reg = 0xc;
 153         else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci"))
 154                 reg = 0x18;
 155         else if (of_device_is_compatible(dev->of_node, "arm,pl330"))
 156                 reg = 0x20;
 157         else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) {
 158                 res = platform_get_resource(to_platform_device(dev),
 159                                             IORESOURCE_MEM, 0);
 160                 if (res) {
 161                         if (res->start == 0xfff50000)
 162                                 reg = 0;
 163                         else if (res->start == 0xfff51000)
 164                                 reg = 4;
 165                 }
 166         }
 167
 168         if (reg < 0)
 169                 return NOTIFY_DONE;
 170
 171         if (of_property_read_bool(dev->of_node, "dma-coherent")) {
 172                 writel(0xff31, sregs_base + reg);
 173                 set_dma_ops(dev, &arm_coherent_dma_ops);
 174         } else
 175                 writel(0, sregs_base + reg);
 176
 177         return NOTIFY_OK;
 178 }
 179
 180 static struct notifier_block highbank_amba_nb = {
 181         .notifier_call = highbank_platform_notifier,
 182 };
 183
 184 static struct notifier_block highbank_platform_nb = {
 185         .notifier_call = highbank_platform_notifier,
 186 };
 187
 188 static void __init highbank_init(void)
 189 {
 190         pm_power_off = highbank_power_off;
 191         highbank_pm_init();
 192
 193         bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
 194         bus_register_notifier(&amba_bustype, &highbank_amba_nb);
 195
 196         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 197 }
 198
 199 static const char *highbank_match[] __initconst = {
 200         "calxeda,highbank",
 201         "calxeda,ecx-2000",
 202         NULL,
 203 };
 204
 205 DT_MACHINE_START(HIGHBANK, "Highbank")
 206         .smp            = smp_ops(highbank_smp_ops),
 207         .map_io         = debug_ll_io_init,
 208         .init_irq       = highbank_init_irq,
 209         .init_time      = highbank_timer_init,
 210         .handle_irq     = gic_handle_irq,
 211         .init_machine   = highbank_init,
 212         .dt_compat      = highbank_match,
 213         .restart        = highbank_restart,
 214 MACHINE_END