arch/arm64/boot/dts/renesas/r8a7796.dtsi

   1 /*
   2  * Device Tree Source for the r8a7796 SoC
   3  *
   4  * Copyright (C) 2016 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7796-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7796";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28         };
  29
  30         psci {
  31                 compatible = "arm,psci-0.2";
  32                 method = "smc";
  33         };
  34
  35         cpus {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38
  39                 /* 1 core only at this point */
  40                 a57_0: cpu@0 {
  41                         compatible = "arm,cortex-a57", "arm,armv8";
  42                         reg = <0x0>;
  43                         device_type = "cpu";
  44                         power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
  45                         next-level-cache = <&L2_CA57>;
  46                         enable-method = "psci";
  47                 };
  48
  49                 L2_CA57: cache-controller@0 {
  50                         compatible = "cache";
  51                         reg = <0>;
  52                         power-domains = <&sysc R8A7796_PD_CA57_SCU>;
  53                         cache-unified;
  54                         cache-level = <2>;
  55                 };
  56         };
  57
  58         extal_clk: extal {
  59                 compatible = "fixed-clock";
  60                 #clock-cells = <0>;
  61                 /* This value must be overridden by the board */
  62                 clock-frequency = <0>;
  63         };
  64
  65         extalr_clk: extalr {
  66                 compatible = "fixed-clock";
  67                 #clock-cells = <0>;
  68                 /* This value must be overridden by the board */
  69                 clock-frequency = <0>;
  70         };
  71
  72         /* External CAN clock - to be overridden by boards that provide it */
  73         can_clk: can {
  74                 compatible = "fixed-clock";
  75                 #clock-cells = <0>;
  76                 clock-frequency = <0>;
  77         };
  78
  79         /* External SCIF clock - to be overridden by boards that provide it */
  80         scif_clk: scif {
  81                 compatible = "fixed-clock";
  82                 #clock-cells = <0>;
  83                 clock-frequency = <0>;
  84         };
  85
  86         soc {
  87                 compatible = "simple-bus";
  88                 interrupt-parent = <&gic>;
  89                 #address-cells = <2>;
  90                 #size-cells = <2>;
  91                 ranges;
  92
  93                 gic: interrupt-controller@f1010000 {
  94                         compatible = "arm,gic-400";
  95                         #interrupt-cells = <3>;
  96                         #address-cells = <0>;
  97                         interrupt-controller;
  98                         reg = <0x0 0xf1010000 0 0x1000>,
  99                               <0x0 0xf1020000 0 0x20000>,
 100                               <0x0 0xf1040000 0 0x20000>,
 101                               <0x0 0xf1060000 0 0x20000>;
 102                         interrupts = <GIC_PPI 9
 103                                         (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
 104                         clocks = <&cpg CPG_MOD 408>;
 105                         clock-names = "clk";
 106                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 107                 };
 108
 109                 timer {
 110                         compatible = "arm,armv8-timer";
 111                         interrupts = <GIC_PPI 13
 112                                         (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
 113                                      <GIC_PPI 14
 114                                         (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
 115                                      <GIC_PPI 11
 116                                         (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
 117                                      <GIC_PPI 10
 118                                         (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
 119                 };
 120
 121                 wdt0: watchdog@e6020000 {
 122                         compatible = "renesas,r8a7796-wdt",
 123                                      "renesas,rcar-gen3-wdt";
 124                         reg = <0 0xe6020000 0 0x0c>;
 125                         clocks = <&cpg CPG_MOD 402>;
 126                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 127                         status = "disabled";
 128                 };
 129
 130                 gpio0: gpio@e6050000 {
 131                         compatible = "renesas,gpio-r8a7796",
 132                                      "renesas,gpio-rcar";
 133                         reg = <0 0xe6050000 0 0x50>;
 134                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 135                         #gpio-cells = <2>;
 136                         gpio-controller;
 137                         gpio-ranges = <&pfc 0 0 16>;
 138                         #interrupt-cells = <2>;
 139                         interrupt-controller;
 140                         clocks = <&cpg CPG_MOD 912>;
 141                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 142                 };
 143
 144                 gpio1: gpio@e6051000 {
 145                         compatible = "renesas,gpio-r8a7796",
 146                                      "renesas,gpio-rcar";
 147                         reg = <0 0xe6051000 0 0x50>;
 148                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 149                         #gpio-cells = <2>;
 150                         gpio-controller;
 151                         gpio-ranges = <&pfc 0 32 29>;
 152                         #interrupt-cells = <2>;
 153                         interrupt-controller;
 154                         clocks = <&cpg CPG_MOD 911>;
 155                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 156                 };
 157
 158                 gpio2: gpio@e6052000 {
 159                         compatible = "renesas,gpio-r8a7796",
 160                                      "renesas,gpio-rcar";
 161                         reg = <0 0xe6052000 0 0x50>;
 162                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 163                         #gpio-cells = <2>;
 164                         gpio-controller;
 165                         gpio-ranges = <&pfc 0 64 15>;
 166                         #interrupt-cells = <2>;
 167                         interrupt-controller;
 168                         clocks = <&cpg CPG_MOD 910>;
 169                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 170                 };
 171
 172                 gpio3: gpio@e6053000 {
 173                         compatible = "renesas,gpio-r8a7796",
 174                                      "renesas,gpio-rcar";
 175                         reg = <0 0xe6053000 0 0x50>;
 176                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 177                         #gpio-cells = <2>;
 178                         gpio-controller;
 179                         gpio-ranges = <&pfc 0 96 16>;
 180                         #interrupt-cells = <2>;
 181                         interrupt-controller;
 182                         clocks = <&cpg CPG_MOD 909>;
 183                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 184                 };
 185
 186                 gpio4: gpio@e6054000 {
 187                         compatible = "renesas,gpio-r8a7796",
 188                                      "renesas,gpio-rcar";
 189                         reg = <0 0xe6054000 0 0x50>;
 190                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 191                         #gpio-cells = <2>;
 192                         gpio-controller;
 193                         gpio-ranges = <&pfc 0 128 18>;
 194                         #interrupt-cells = <2>;
 195                         interrupt-controller;
 196                         clocks = <&cpg CPG_MOD 908>;
 197                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 198                 };
 199
 200                 gpio5: gpio@e6055000 {
 201                         compatible = "renesas,gpio-r8a7796",
 202                                      "renesas,gpio-rcar";
 203                         reg = <0 0xe6055000 0 0x50>;
 204                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 205                         #gpio-cells = <2>;
 206                         gpio-controller;
 207                         gpio-ranges = <&pfc 0 160 26>;
 208                         #interrupt-cells = <2>;
 209                         interrupt-controller;
 210                         clocks = <&cpg CPG_MOD 907>;
 211                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 212                 };
 213
 214                 gpio6: gpio@e6055400 {
 215                         compatible = "renesas,gpio-r8a7796",
 216                                      "renesas,gpio-rcar";
 217                         reg = <0 0xe6055400 0 0x50>;
 218                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 219                         #gpio-cells = <2>;
 220                         gpio-controller;
 221                         gpio-ranges = <&pfc 0 192 32>;
 222                         #interrupt-cells = <2>;
 223                         interrupt-controller;
 224                         clocks = <&cpg CPG_MOD 906>;
 225                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 226                 };
 227
 228                 gpio7: gpio@e6055800 {
 229                         compatible = "renesas,gpio-r8a7796",
 230                                      "renesas,gpio-rcar";
 231                         reg = <0 0xe6055800 0 0x50>;
 232                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 233                         #gpio-cells = <2>;
 234                         gpio-controller;
 235                         gpio-ranges = <&pfc 0 224 4>;
 236                         #interrupt-cells = <2>;
 237                         interrupt-controller;
 238                         clocks = <&cpg CPG_MOD 905>;
 239                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 240                 };
 241
 242                 pfc: pin-controller@e6060000 {
 243                         compatible = "renesas,pfc-r8a7796";
 244                         reg = <0 0xe6060000 0 0x50c>;
 245                 };
 246
 247                 cpg: clock-controller@e6150000 {
 248                         compatible = "renesas,r8a7796-cpg-mssr";
 249                         reg = <0 0xe6150000 0 0x1000>;
 250                         clocks = <&extal_clk>, <&extalr_clk>;
 251                         clock-names = "extal", "extalr";
 252                         #clock-cells = <2>;
 253                         #power-domain-cells = <0>;
 254                 };
 255
 256                 rst: reset-controller@e6160000 {
 257                         compatible = "renesas,r8a7796-rst";
 258                         reg = <0 0xe6160000 0 0x0200>;
 259                 };
 260
 261                 prr: chipid@fff00044 {
 262                         compatible = "renesas,prr";
 263                         reg = <0 0xfff00044 0 4>;
 264                 };
 265
 266                 sysc: system-controller@e6180000 {
 267                         compatible = "renesas,r8a7796-sysc";
 268                         reg = <0 0xe6180000 0 0x0400>;
 269                         #power-domain-cells = <1>;
 270                 };
 271
 272                 i2c0: i2c@e6500000 {
 273                         #address-cells = <1>;
 274                         #size-cells = <0>;
 275                         compatible = "renesas,i2c-r8a7796",
 276                                      "renesas,rcar-gen3-i2c";
 277                         reg = <0 0xe6500000 0 0x40>;
 278                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 279                         clocks = <&cpg CPG_MOD 931>;
 280                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 281                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 282                                <&dmac2 0x91>, <&dmac2 0x90>;
 283                         dma-names = "tx", "rx", "tx", "rx";
 284                         i2c-scl-internal-delay-ns = <110>;
 285                         status = "disabled";
 286                 };
 287
 288                 i2c1: i2c@e6508000 {
 289                         #address-cells = <1>;
 290                         #size-cells = <0>;
 291                         compatible = "renesas,i2c-r8a7796",
 292                                      "renesas,rcar-gen3-i2c";
 293                         reg = <0 0xe6508000 0 0x40>;
 294                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 295                         clocks = <&cpg CPG_MOD 930>;
 296                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 297                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 298                                <&dmac2 0x93>, <&dmac2 0x92>;
 299                         dma-names = "tx", "rx", "tx", "rx";
 300                         i2c-scl-internal-delay-ns = <6>;
 301                         status = "disabled";
 302                 };
 303
 304                 i2c2: i2c@e6510000 {
 305                         #address-cells = <1>;
 306                         #size-cells = <0>;
 307                         compatible = "renesas,i2c-r8a7796",
 308                                      "renesas,rcar-gen3-i2c";
 309                         reg = <0 0xe6510000 0 0x40>;
 310                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 311                         clocks = <&cpg CPG_MOD 929>;
 312                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 313                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 314                                <&dmac2 0x95>, <&dmac2 0x94>;
 315                         dma-names = "tx", "rx", "tx", "rx";
 316                         i2c-scl-internal-delay-ns = <6>;
 317                         status = "disabled";
 318                 };
 319
 320                 i2c3: i2c@e66d0000 {
 321                         #address-cells = <1>;
 322                         #size-cells = <0>;
 323                         compatible = "renesas,i2c-r8a7796",
 324                                      "renesas,rcar-gen3-i2c";
 325                         reg = <0 0xe66d0000 0 0x40>;
 326                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 327                         clocks = <&cpg CPG_MOD 928>;
 328                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 329                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 330                         dma-names = "tx", "rx";
 331                         i2c-scl-internal-delay-ns = <110>;
 332                         status = "disabled";
 333                 };
 334
 335                 i2c4: i2c@e66d8000 {
 336                         #address-cells = <1>;
 337                         #size-cells = <0>;
 338                         compatible = "renesas,i2c-r8a7796",
 339                                      "renesas,rcar-gen3-i2c";
 340                         reg = <0 0xe66d8000 0 0x40>;
 341                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 342                         clocks = <&cpg CPG_MOD 927>;
 343                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 344                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 345                         dma-names = "tx", "rx";
 346                         i2c-scl-internal-delay-ns = <110>;
 347                         status = "disabled";
 348                 };
 349
 350                 i2c5: i2c@e66e0000 {
 351                         #address-cells = <1>;
 352                         #size-cells = <0>;
 353                         compatible = "renesas,i2c-r8a7796",
 354                                      "renesas,rcar-gen3-i2c";
 355                         reg = <0 0xe66e0000 0 0x40>;
 356                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 357                         clocks = <&cpg CPG_MOD 919>;
 358                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 359                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 360                         dma-names = "tx", "rx";
 361                         i2c-scl-internal-delay-ns = <110>;
 362                         status = "disabled";
 363                 };
 364
 365                 i2c6: i2c@e66e8000 {
 366                         #address-cells = <1>;
 367                         #size-cells = <0>;
 368                         compatible = "renesas,i2c-r8a7796",
 369                                      "renesas,rcar-gen3-i2c";
 370                         reg = <0 0xe66e8000 0 0x40>;
 371                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 372                         clocks = <&cpg CPG_MOD 918>;
 373                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 374                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 375                         dma-names = "tx", "rx";
 376                         i2c-scl-internal-delay-ns = <6>;
 377                         status = "disabled";
 378                 };
 379
 380                 can0: can@e6c30000 {
 381                         compatible = "renesas,can-r8a7796",
 382                                      "renesas,rcar-gen3-can";
 383                         reg = <0 0xe6c30000 0 0x1000>;
 384                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 385                         clocks = <&cpg CPG_MOD 916>,
 386                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 387                                <&can_clk>;
 388                         clock-names = "clkp1", "clkp2", "can_clk";
 389                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 390                         assigned-clock-rates = <40000000>;
 391                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 392                         status = "disabled";
 393                 };
 394
 395                 can1: can@e6c38000 {
 396                         compatible = "renesas,can-r8a7796",
 397                                      "renesas,rcar-gen3-can";
 398                         reg = <0 0xe6c38000 0 0x1000>;
 399                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 400                         clocks = <&cpg CPG_MOD 915>,
 401                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 402                                <&can_clk>;
 403                         clock-names = "clkp1", "clkp2", "can_clk";
 404                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 405                         assigned-clock-rates = <40000000>;
 406                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 407                         status = "disabled";
 408                 };
 409
 410                 canfd: can@e66c0000 {
 411                         compatible = "renesas,r8a7796-canfd",
 412                                      "renesas,rcar-gen3-canfd";
 413                         reg = <0 0xe66c0000 0 0x8000>;
 414                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 415                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 416                         clocks = <&cpg CPG_MOD 914>,
 417                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
 418                                <&can_clk>;
 419                         clock-names = "fck", "canfd", "can_clk";
 420                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
 421                         assigned-clock-rates = <40000000>;
 422                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 423                         status = "disabled";
 424
 425                         channel0 {
 426                                 status = "disabled";
 427                         };
 428
 429                         channel1 {
 430                                 status = "disabled";
 431                         };
 432                 };
 433
 434                 avb: ethernet@e6800000 {
 435                         compatible = "renesas,etheravb-r8a7796",
 436                                      "renesas,etheravb-rcar-gen3";
 437                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 438                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 439                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 440                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 441                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 442                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 443                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 444                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 445                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 446                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 447                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 448                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 449                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 450                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 451                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 452                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 453                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 454                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 455                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 456                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 457                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 458                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 459                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 460                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 461                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 462                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 463                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 464                                           "ch4", "ch5", "ch6", "ch7",
 465                                           "ch8", "ch9", "ch10", "ch11",
 466                                           "ch12", "ch13", "ch14", "ch15",
 467                                           "ch16", "ch17", "ch18", "ch19",
 468                                           "ch20", "ch21", "ch22", "ch23",
 469                                           "ch24";
 470                         clocks = <&cpg CPG_MOD 812>;
 471                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 472                         phy-mode = "rgmii-id";
 473                         #address-cells = <1>;
 474                         #size-cells = <0>;
 475                         status = "disabled";
 476                 };
 477
 478                 scif2: serial@e6e88000 {
 479                         compatible = "renesas,scif-r8a7796",
 480                                      "renesas,rcar-gen3-scif", "renesas,scif";
 481                         reg = <0 0xe6e88000 0 64>;
 482                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 483                         clocks = <&cpg CPG_MOD 310>,
 484                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 485                                  <&scif_clk>;
 486                         clock-names = "fck", "brg_int", "scif_clk";
 487                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 488                         status = "disabled";
 489                 };
 490
 491                 msiof0: spi@e6e90000 {
 492                         compatible = "renesas,msiof-r8a7796",
 493                                      "renesas,rcar-gen3-msiof";
 494                         reg = <0 0xe6e90000 0 0x0064>;
 495                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 496                         clocks = <&cpg CPG_MOD 211>;
 497                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
 498                                <&dmac2 0x41>, <&dmac2 0x40>;
 499                         dma-names = "tx", "rx";
 500                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 501                         #address-cells = <1>;
 502                         #size-cells = <0>;
 503                         status = "disabled";
 504                 };
 505
 506                 msiof1: spi@e6ea0000 {
 507                         compatible = "renesas,msiof-r8a7796",
 508                                      "renesas,rcar-gen3-msiof";
 509                         reg = <0 0xe6ea0000 0 0x0064>;
 510                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 511                         clocks = <&cpg CPG_MOD 210>;
 512                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
 513                                <&dmac2 0x43>, <&dmac2 0x42>;
 514                         dma-names = "tx", "rx";
 515                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 516                         #address-cells = <1>;
 517                         #size-cells = <0>;
 518                         status = "disabled";
 519                 };
 520
 521                 msiof2: spi@e6c00000 {
 522                         compatible = "renesas,msiof-r8a7796",
 523                                      "renesas,rcar-gen3-msiof";
 524                         reg = <0 0xe6c00000 0 0x0064>;
 525                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
 526                         clocks = <&cpg CPG_MOD 209>;
 527                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
 528                         dma-names = "tx", "rx";
 529                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 530                         #address-cells = <1>;
 531                         #size-cells = <0>;
 532                         status = "disabled";
 533                 };
 534
 535                 msiof3: spi@e6c10000 {
 536                         compatible = "renesas,msiof-r8a7796",
 537                                      "renesas,rcar-gen3-msiof";
 538                         reg = <0 0xe6c10000 0 0x0064>;
 539                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
 540                         clocks = <&cpg CPG_MOD 208>;
 541                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
 542                         dma-names = "tx", "rx";
 543                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 544                         #address-cells = <1>;
 545                         #size-cells = <0>;
 546                         status = "disabled";
 547                 };
 548
 549                 dmac0: dma-controller@e6700000 {
 550                         compatible = "renesas,dmac-r8a7796",
 551                                      "renesas,rcar-dmac";
 552                         reg = <0 0xe6700000 0 0x10000>;
 553                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 554                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 555                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 556                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 557                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 558                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 559                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 560                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 561                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 562                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 563                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 564                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 565                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 566                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 567                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 568                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 569                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 570                         interrupt-names = "error",
 571                                         "ch0", "ch1", "ch2", "ch3",
 572                                         "ch4", "ch5", "ch6", "ch7",
 573                                         "ch8", "ch9", "ch10", "ch11",
 574                                         "ch12", "ch13", "ch14", "ch15";
 575                         clocks = <&cpg CPG_MOD 219>;
 576                         clock-names = "fck";
 577                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 578                         #dma-cells = <1>;
 579                         dma-channels = <16>;
 580                 };
 581
 582                 dmac1: dma-controller@e7300000 {
 583                         compatible = "renesas,dmac-r8a7796",
 584                                      "renesas,rcar-dmac";
 585                         reg = <0 0xe7300000 0 0x10000>;
 586                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 587                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 588                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 589                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 590                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 591                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 592                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 593                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 594                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 595                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 596                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 597                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 598                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 599                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 600                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 601                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 602                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 603                         interrupt-names = "error",
 604                                         "ch0", "ch1", "ch2", "ch3",
 605                                         "ch4", "ch5", "ch6", "ch7",
 606                                         "ch8", "ch9", "ch10", "ch11",
 607                                         "ch12", "ch13", "ch14", "ch15";
 608                         clocks = <&cpg CPG_MOD 218>;
 609                         clock-names = "fck";
 610                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 611                         #dma-cells = <1>;
 612                         dma-channels = <16>;
 613                 };
 614
 615                 dmac2: dma-controller@e7310000 {
 616                         compatible = "renesas,dmac-r8a7796",
 617                                      "renesas,rcar-dmac";
 618                         reg = <0 0xe7310000 0 0x10000>;
 619                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 620                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 621                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 622                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 623                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 624                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 625                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 626                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 627                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 628                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 629                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 630                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 631                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 632                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 633                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 634                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 635                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 636                         interrupt-names = "error",
 637                                         "ch0", "ch1", "ch2", "ch3",
 638                                         "ch4", "ch5", "ch6", "ch7",
 639                                         "ch8", "ch9", "ch10", "ch11",
 640                                         "ch12", "ch13", "ch14", "ch15";
 641                         clocks = <&cpg CPG_MOD 217>;
 642                         clock-names = "fck";
 643                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 644                         #dma-cells = <1>;
 645                         dma-channels = <16>;
 646                 };
 647
 648                 sdhi0: sd@ee100000 {
 649                         compatible = "renesas,sdhi-r8a7796";
 650                         reg = <0 0xee100000 0 0x2000>;
 651                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 652                         clocks = <&cpg CPG_MOD 314>;
 653                         max-frequency = <200000000>;
 654                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 655                         status = "disabled";
 656                 };
 657
 658                 sdhi1: sd@ee120000 {
 659                         compatible = "renesas,sdhi-r8a7796";
 660                         reg = <0 0xee120000 0 0x2000>;
 661                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
 662                         clocks = <&cpg CPG_MOD 313>;
 663                         max-frequency = <200000000>;
 664                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 665                         status = "disabled";
 666                 };
 667
 668                 sdhi2: sd@ee140000 {
 669                         compatible = "renesas,sdhi-r8a7796";
 670                         reg = <0 0xee140000 0 0x2000>;
 671                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 672                         clocks = <&cpg CPG_MOD 312>;
 673                         max-frequency = <200000000>;
 674                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 675                         status = "disabled";
 676                 };
 677
 678                 sdhi3: sd@ee160000 {
 679                         compatible = "renesas,sdhi-r8a7796";
 680                         reg = <0 0xee160000 0 0x2000>;
 681                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 682                         clocks = <&cpg CPG_MOD 311>;
 683                         max-frequency = <200000000>;
 684                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 685                         status = "disabled";
 686                 };
 687
 688                 tsc: thermal@e6198000 {
 689                         compatible = "renesas,r8a7796-thermal";
 690                         reg = <0 0xe6198000 0 0x68>,
 691                               <0 0xe61a0000 0 0x5c>,
 692                               <0 0xe61a8000 0 0x5c>;
 693                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 694                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 695                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 696                         clocks = <&cpg CPG_MOD 522>;
 697                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 698                         #thermal-sensor-cells = <1>;
 699                         status = "okay";
 700                 };
 701
 702                 thermal-zones {
 703                         sensor_thermal1: sensor-thermal1 {
 704                                 polling-delay-passive = <250>;
 705                                 polling-delay = <1000>;
 706                                 thermal-sensors = <&tsc 0>;
 707
 708                                 trips {
 709                                         sensor1_crit: sensor1-crit {
 710                                                 temperature = <120000>;
 711                                                 hysteresis = <2000>;
 712                                                 type = "critical";
 713                                         };
 714                                 };
 715                         };
 716
 717                         sensor_thermal2: sensor-thermal2 {
 718                                 polling-delay-passive = <250>;
 719                                 polling-delay = <1000>;
 720                                 thermal-sensors = <&tsc 1>;
 721
 722                                 trips {
 723                                         sensor2_crit: sensor2-crit {
 724                                                 temperature = <120000>;
 725                                                 hysteresis = <2000>;
 726                                                 type = "critical";
 727                                         };
 728                                 };
 729                         };
 730
 731                         sensor_thermal3: sensor-thermal3 {
 732                                 polling-delay-passive = <250>;
 733                                 polling-delay = <1000>;
 734                                 thermal-sensors = <&tsc 2>;
 735
 736                                 trips {
 737                                         sensor3_crit: sensor3-crit {
 738                                                 temperature = <120000>;
 739                                                 hysteresis = <2000>;
 740                                                 type = "critical";
 741                                         };
 742                                 };
 743                         };
 744                 };
 745         };
 746 };