2 * R/W semaphores for ia64
4 * Copyright (C) 2003 Ken Chen <kenneth.w.chen@intel.com>
5 * Copyright (C) 2003 Asit Mallick <asit.k.mallick@intel.com>
6 * Copyright (C) 2005 Christoph Lameter <cl@linux.com>
8 * Based on asm-i386/rwsem.h and other architecture implementation.
10 * The MSW of the count is the negated number of active writers and
11 * waiting lockers, and the LSW is the total number of active locks.
13 * The lock count is initialized to 0 (no active and no waiting lockers).
15 * When a writer subtracts WRITE_BIAS, it'll get 0xffffffff00000001 for
16 * the case of an uncontended lock. Readers increment by 1 and see a positive
17 * value when uncontended, negative if there are writers (and maybe) readers
18 * waiting (in which case it goes to sleep).
21 #ifndef _ASM_IA64_RWSEM_H
22 #define _ASM_IA64_RWSEM_H
24 #ifndef _LINUX_RWSEM_H
25 #error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
28 #include <asm/intrinsics.h>
30 #define RWSEM_UNLOCKED_VALUE __IA64_UL_CONST(0x0000000000000000)
31 #define RWSEM_ACTIVE_BIAS (1L)
32 #define RWSEM_ACTIVE_MASK (0xffffffffL)
33 #define RWSEM_WAITING_BIAS (-0x100000000L)
34 #define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
35 #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
41 __down_read (struct rw_semaphore *sem)
43 long result = ia64_fetchadd8_acq((unsigned long *)&sem->count.counter, 1);
46 rwsem_down_read_failed(sem);
53 ___down_write (struct rw_semaphore *sem)
58 old = atomic_long_read(&sem->count);
59 new = old + RWSEM_ACTIVE_WRITE_BIAS;
60 } while (atomic_long_cmpxchg_acquire(&sem->count, old, new) != old);
66 __down_write (struct rw_semaphore *sem)
68 if (___down_write(sem))
69 rwsem_down_write_failed(sem);
73 __down_write_killable (struct rw_semaphore *sem)
75 if (___down_write(sem))
76 if (IS_ERR(rwsem_down_write_failed_killable(sem)))
83 * unlock after reading
86 __up_read (struct rw_semaphore *sem)
88 long result = ia64_fetchadd8_rel((unsigned long *)&sem->count.counter, -1);
90 if (result < 0 && (--result & RWSEM_ACTIVE_MASK) == 0)
95 * unlock after writing
98 __up_write (struct rw_semaphore *sem)
103 old = atomic_long_read(&sem->count);
104 new = old - RWSEM_ACTIVE_WRITE_BIAS;
105 } while (atomic_long_cmpxchg_release(&sem->count, old, new) != old);
107 if (new < 0 && (new & RWSEM_ACTIVE_MASK) == 0)
112 * trylock for reading -- returns 1 if successful, 0 if contention
115 __down_read_trylock (struct rw_semaphore *sem)
118 while ((tmp = atomic_long_read(&sem->count)) >= 0) {
119 if (tmp == atomic_long_cmpxchg_acquire(&sem->count, tmp, tmp+1)) {
127 * trylock for writing -- returns 1 if successful, 0 if contention
130 __down_write_trylock (struct rw_semaphore *sem)
132 long tmp = atomic_long_cmpxchg_acquire(&sem->count,
133 RWSEM_UNLOCKED_VALUE, RWSEM_ACTIVE_WRITE_BIAS);
134 return tmp == RWSEM_UNLOCKED_VALUE;
138 * downgrade write lock to read lock
141 __downgrade_write (struct rw_semaphore *sem)
146 old = atomic_long_read(&sem->count);
147 new = old - RWSEM_WAITING_BIAS;
148 } while (atomic_long_cmpxchg_release(&sem->count, old, new) != old);
151 rwsem_downgrade_wake(sem);
154 #endif /* _ASM_IA64_RWSEM_H */