arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112
 113 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 114 static u32 tsc_tolerance_ppm = 250;
 115 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 116
 117 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 118 unsigned int lapic_timer_advance_ns = 0;
 119 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 120
 121 static bool backwards_tsc_observed = false;
 122
 123 #define KVM_NR_SHARED_MSRS 16
 124
 125 struct kvm_shared_msrs_global {
 126         int nr;
 127         u32 msrs[KVM_NR_SHARED_MSRS];
 128 };
 129
 130 struct kvm_shared_msrs {
 131         struct user_return_notifier urn;
 132         bool registered;
 133         struct kvm_shared_msr_values {
 134                 u64 host;
 135                 u64 curr;
 136         } values[KVM_NR_SHARED_MSRS];
 137 };
 138
 139 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 140 static struct kvm_shared_msrs __percpu *shared_msrs;
 141
 142 struct kvm_stats_debugfs_item debugfs_entries[] = {
 143         { "pf_fixed", VCPU_STAT(pf_fixed) },
 144         { "pf_guest", VCPU_STAT(pf_guest) },
 145         { "tlb_flush", VCPU_STAT(tlb_flush) },
 146         { "invlpg", VCPU_STAT(invlpg) },
 147         { "exits", VCPU_STAT(exits) },
 148         { "io_exits", VCPU_STAT(io_exits) },
 149         { "mmio_exits", VCPU_STAT(mmio_exits) },
 150         { "signal_exits", VCPU_STAT(signal_exits) },
 151         { "irq_window", VCPU_STAT(irq_window_exits) },
 152         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 153         { "halt_exits", VCPU_STAT(halt_exits) },
 154         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 155         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 156         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 157         { "hypercalls", VCPU_STAT(hypercalls) },
 158         { "request_irq", VCPU_STAT(request_irq_exits) },
 159         { "irq_exits", VCPU_STAT(irq_exits) },
 160         { "host_state_reload", VCPU_STAT(host_state_reload) },
 161         { "efer_reload", VCPU_STAT(efer_reload) },
 162         { "fpu_reload", VCPU_STAT(fpu_reload) },
 163         { "insn_emulation", VCPU_STAT(insn_emulation) },
 164         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 165         { "irq_injections", VCPU_STAT(irq_injections) },
 166         { "nmi_injections", VCPU_STAT(nmi_injections) },
 167         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 168         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 169         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 170         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 171         { "mmu_flooded", VM_STAT(mmu_flooded) },
 172         { "mmu_recycled", VM_STAT(mmu_recycled) },
 173         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 174         { "mmu_unsync", VM_STAT(mmu_unsync) },
 175         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 176         { "largepages", VM_STAT(lpages) },
 177         { NULL }
 178 };
 179
 180 u64 __read_mostly host_xcr0;
 181
 182 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 183
 184 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 185 {
 186         int i;
 187         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 188                 vcpu->arch.apf.gfns[i] = ~0;
 189 }
 190
 191 static void kvm_on_user_return(struct user_return_notifier *urn)
 192 {
 193         unsigned slot;
 194         struct kvm_shared_msrs *locals
 195                 = container_of(urn, struct kvm_shared_msrs, urn);
 196         struct kvm_shared_msr_values *values;
 197
 198         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 199                 values = &locals->values[slot];
 200                 if (values->host != values->curr) {
 201                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 202                         values->curr = values->host;
 203                 }
 204         }
 205         locals->registered = false;
 206         user_return_notifier_unregister(urn);
 207 }
 208
 209 static void shared_msr_update(unsigned slot, u32 msr)
 210 {
 211         u64 value;
 212         unsigned int cpu = smp_processor_id();
 213         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 214
 215         /* only read, and nobody should modify it at this time,
 216          * so don't need lock */
 217         if (slot >= shared_msrs_global.nr) {
 218                 printk(KERN_ERR "kvm: invalid MSR slot!");
 219                 return;
 220         }
 221         rdmsrl_safe(msr, &value);
 222         smsr->values[slot].host = value;
 223         smsr->values[slot].curr = value;
 224 }
 225
 226 void kvm_define_shared_msr(unsigned slot, u32 msr)
 227 {
 228         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 229         shared_msrs_global.msrs[slot] = msr;
 230         if (slot >= shared_msrs_global.nr)
 231                 shared_msrs_global.nr = slot + 1;
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 234
 235 static void kvm_shared_msr_cpu_online(void)
 236 {
 237         unsigned i;
 238
 239         for (i = 0; i < shared_msrs_global.nr; ++i)
 240                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 241 }
 242
 243 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 244 {
 245         unsigned int cpu = smp_processor_id();
 246         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 247         int err;
 248
 249         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 250                 return 0;
 251         smsr->values[slot].curr = value;
 252         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 253         if (err)
 254                 return 1;
 255
 256         if (!smsr->registered) {
 257                 smsr->urn.on_user_return = kvm_on_user_return;
 258                 user_return_notifier_register(&smsr->urn);
 259                 smsr->registered = true;
 260         }
 261         return 0;
 262 }
 263 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 264
 265 static void drop_user_return_notifiers(void)
 266 {
 267         unsigned int cpu = smp_processor_id();
 268         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 269
 270         if (smsr->registered)
 271                 kvm_on_user_return(&smsr->urn);
 272 }
 273
 274 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 275 {
 276         return vcpu->arch.apic_base;
 277 }
 278 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 279
 280 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 281 {
 282         u64 old_state = vcpu->arch.apic_base &
 283                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 284         u64 new_state = msr_info->data &
 285                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 286         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 287                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 288
 289         if (!msr_info->host_initiated &&
 290             ((msr_info->data & reserved_bits) != 0 ||
 291              new_state == X2APIC_ENABLE ||
 292              (new_state == MSR_IA32_APICBASE_ENABLE &&
 293               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 294              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 295               old_state == 0)))
 296                 return 1;
 297
 298         kvm_lapic_set_base(vcpu, msr_info->data);
 299         return 0;
 300 }
 301 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 302
 303 asmlinkage __visible void kvm_spurious_fault(void)
 304 {
 305         /* Fault while not rebooting.  We want the trace. */
 306         BUG();
 307 }
 308 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 309
 310 #define EXCPT_BENIGN            0
 311 #define EXCPT_CONTRIBUTORY      1
 312 #define EXCPT_PF                2
 313
 314 static int exception_class(int vector)
 315 {
 316         switch (vector) {
 317         case PF_VECTOR:
 318                 return EXCPT_PF;
 319         case DE_VECTOR:
 320         case TS_VECTOR:
 321         case NP_VECTOR:
 322         case SS_VECTOR:
 323         case GP_VECTOR:
 324                 return EXCPT_CONTRIBUTORY;
 325         default:
 326                 break;
 327         }
 328         return EXCPT_BENIGN;
 329 }
 330
 331 #define EXCPT_FAULT             0
 332 #define EXCPT_TRAP              1
 333 #define EXCPT_ABORT             2
 334 #define EXCPT_INTERRUPT         3
 335
 336 static int exception_type(int vector)
 337 {
 338         unsigned int mask;
 339
 340         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 341                 return EXCPT_INTERRUPT;
 342
 343         mask = 1 << vector;
 344
 345         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 346         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 347                 return EXCPT_TRAP;
 348
 349         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 350                 return EXCPT_ABORT;
 351
 352         /* Reserved exceptions will result in fault */
 353         return EXCPT_FAULT;
 354 }
 355
 356 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 357                 unsigned nr, bool has_error, u32 error_code,
 358                 bool reinject)
 359 {
 360         u32 prev_nr;
 361         int class1, class2;
 362
 363         kvm_make_request(KVM_REQ_EVENT, vcpu);
 364
 365         if (!vcpu->arch.exception.pending) {
 366         queue:
 367                 if (has_error && !is_protmode(vcpu))
 368                         has_error = false;
 369                 vcpu->arch.exception.pending = true;
 370                 vcpu->arch.exception.has_error_code = has_error;
 371                 vcpu->arch.exception.nr = nr;
 372                 vcpu->arch.exception.error_code = error_code;
 373                 vcpu->arch.exception.reinject = reinject;
 374                 return;
 375         }
 376
 377         /* to check exception */
 378         prev_nr = vcpu->arch.exception.nr;
 379         if (prev_nr == DF_VECTOR) {
 380                 /* triple fault -> shutdown */
 381                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 382                 return;
 383         }
 384         class1 = exception_class(prev_nr);
 385         class2 = exception_class(nr);
 386         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 387                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 388                 /* generate double fault per SDM Table 5-5 */
 389                 vcpu->arch.exception.pending = true;
 390                 vcpu->arch.exception.has_error_code = true;
 391                 vcpu->arch.exception.nr = DF_VECTOR;
 392                 vcpu->arch.exception.error_code = 0;
 393         } else
 394                 /* replace previous exception with a new one in a hope
 395                    that instruction re-execution will regenerate lost
 396                    exception */
 397                 goto queue;
 398 }
 399
 400 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 401 {
 402         kvm_multiple_exception(vcpu, nr, false, 0, false);
 403 }
 404 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 405
 406 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 407 {
 408         kvm_multiple_exception(vcpu, nr, false, 0, true);
 409 }
 410 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 411
 412 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 413 {
 414         if (err)
 415                 kvm_inject_gp(vcpu, 0);
 416         else
 417                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 418 }
 419 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 420
 421 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 422 {
 423         ++vcpu->stat.pf_guest;
 424         vcpu->arch.cr2 = fault->address;
 425         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 426 }
 427 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 428
 429 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 430 {
 431         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 432                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 433         else
 434                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 435
 436         return fault->nested_page_fault;
 437 }
 438
 439 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 440 {
 441         atomic_inc(&vcpu->arch.nmi_queued);
 442         kvm_make_request(KVM_REQ_NMI, vcpu);
 443 }
 444 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 445
 446 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 447 {
 448         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 449 }
 450 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 451
 452 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 453 {
 454         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 455 }
 456 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 457
 458 /*
 459  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 460  * a #GP and return false.
 461  */
 462 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 463 {
 464         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 465                 return true;
 466         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 467         return false;
 468 }
 469 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 470
 471 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 472 {
 473         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 474                 return true;
 475
 476         kvm_queue_exception(vcpu, UD_VECTOR);
 477         return false;
 478 }
 479 EXPORT_SYMBOL_GPL(kvm_require_dr);
 480
 481 /*
 482  * This function will be used to read from the physical memory of the currently
 483  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 484  * can read from guest physical or from the guest's guest physical memory.
 485  */
 486 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 487                             gfn_t ngfn, void *data, int offset, int len,
 488                             u32 access)
 489 {
 490         struct x86_exception exception;
 491         gfn_t real_gfn;
 492         gpa_t ngpa;
 493
 494         ngpa     = gfn_to_gpa(ngfn);
 495         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 496         if (real_gfn == UNMAPPED_GVA)
 497                 return -EFAULT;
 498
 499         real_gfn = gpa_to_gfn(real_gfn);
 500
 501         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 502 }
 503 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 504
 505 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 506                                void *data, int offset, int len, u32 access)
 507 {
 508         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 509                                        data, offset, len, access);
 510 }
 511
 512 /*
 513  * Load the pae pdptrs.  Return true is they are all valid.
 514  */
 515 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 516 {
 517         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 518         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 519         int i;
 520         int ret;
 521         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 522
 523         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 524                                       offset * sizeof(u64), sizeof(pdpte),
 525                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 526         if (ret < 0) {
 527                 ret = 0;
 528                 goto out;
 529         }
 530         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 531                 if (is_present_gpte(pdpte[i]) &&
 532                     (pdpte[i] &
 533                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 534                         ret = 0;
 535                         goto out;
 536                 }
 537         }
 538         ret = 1;
 539
 540         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 541         __set_bit(VCPU_EXREG_PDPTR,
 542                   (unsigned long *)&vcpu->arch.regs_avail);
 543         __set_bit(VCPU_EXREG_PDPTR,
 544                   (unsigned long *)&vcpu->arch.regs_dirty);
 545 out:
 546
 547         return ret;
 548 }
 549 EXPORT_SYMBOL_GPL(load_pdptrs);
 550
 551 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 552 {
 553         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 554         bool changed = true;
 555         int offset;
 556         gfn_t gfn;
 557         int r;
 558
 559         if (is_long_mode(vcpu) || !is_pae(vcpu))
 560                 return false;
 561
 562         if (!test_bit(VCPU_EXREG_PDPTR,
 563                       (unsigned long *)&vcpu->arch.regs_avail))
 564                 return true;
 565
 566         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 567         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 568         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 569                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 570         if (r < 0)
 571                 goto out;
 572         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 573 out:
 574
 575         return changed;
 576 }
 577
 578 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 579 {
 580         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 581         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 582
 583         cr0 |= X86_CR0_ET;
 584
 585 #ifdef CONFIG_X86_64
 586         if (cr0 & 0xffffffff00000000UL)
 587                 return 1;
 588 #endif
 589
 590         cr0 &= ~CR0_RESERVED_BITS;
 591
 592         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 593                 return 1;
 594
 595         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 596                 return 1;
 597
 598         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 599 #ifdef CONFIG_X86_64
 600                 if ((vcpu->arch.efer & EFER_LME)) {
 601                         int cs_db, cs_l;
 602
 603                         if (!is_pae(vcpu))
 604                                 return 1;
 605                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 606                         if (cs_l)
 607                                 return 1;
 608                 } else
 609 #endif
 610                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 611                                                  kvm_read_cr3(vcpu)))
 612                         return 1;
 613         }
 614
 615         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 616                 return 1;
 617
 618         kvm_x86_ops->set_cr0(vcpu, cr0);
 619
 620         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 621                 kvm_clear_async_pf_completion_queue(vcpu);
 622                 kvm_async_pf_hash_reset(vcpu);
 623         }
 624
 625         if ((cr0 ^ old_cr0) & update_bits)
 626                 kvm_mmu_reset_context(vcpu);
 627
 628         if ((cr0 ^ old_cr0) & X86_CR0_CD)
 629                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 630
 631         return 0;
 632 }
 633 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 634
 635 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 636 {
 637         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 638 }
 639 EXPORT_SYMBOL_GPL(kvm_lmsw);
 640
 641 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 642 {
 643         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 644                         !vcpu->guest_xcr0_loaded) {
 645                 /* kvm_set_xcr() also depends on this */
 646                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 647                 vcpu->guest_xcr0_loaded = 1;
 648         }
 649 }
 650
 651 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 652 {
 653         if (vcpu->guest_xcr0_loaded) {
 654                 if (vcpu->arch.xcr0 != host_xcr0)
 655                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 656                 vcpu->guest_xcr0_loaded = 0;
 657         }
 658 }
 659
 660 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 661 {
 662         u64 xcr0 = xcr;
 663         u64 old_xcr0 = vcpu->arch.xcr0;
 664         u64 valid_bits;
 665
 666         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 667         if (index != XCR_XFEATURE_ENABLED_MASK)
 668                 return 1;
 669         if (!(xcr0 & XFEATURE_MASK_FP))
 670                 return 1;
 671         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 672                 return 1;
 673
 674         /*
 675          * Do not allow the guest to set bits that we do not support
 676          * saving.  However, xcr0 bit 0 is always set, even if the
 677          * emulated CPU does not support XSAVE (see fx_init).
 678          */
 679         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 680         if (xcr0 & ~valid_bits)
 681                 return 1;
 682
 683         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 684             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 685                 return 1;
 686
 687         if (xcr0 & XFEATURE_MASK_AVX512) {
 688                 if (!(xcr0 & XFEATURE_MASK_YMM))
 689                         return 1;
 690                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 691                         return 1;
 692         }
 693         kvm_put_guest_xcr0(vcpu);
 694         vcpu->arch.xcr0 = xcr0;
 695
 696         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 697                 kvm_update_cpuid(vcpu);
 698         return 0;
 699 }
 700
 701 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 702 {
 703         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 704             __kvm_set_xcr(vcpu, index, xcr)) {
 705                 kvm_inject_gp(vcpu, 0);
 706                 return 1;
 707         }
 708         return 0;
 709 }
 710 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 711
 712 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 713 {
 714         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 715         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 716                                    X86_CR4_SMEP | X86_CR4_SMAP;
 717
 718         if (cr4 & CR4_RESERVED_BITS)
 719                 return 1;
 720
 721         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 722                 return 1;
 723
 724         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 725                 return 1;
 726
 727         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 728                 return 1;
 729
 730         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 731                 return 1;
 732
 733         if (is_long_mode(vcpu)) {
 734                 if (!(cr4 & X86_CR4_PAE))
 735                         return 1;
 736         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 737                    && ((cr4 ^ old_cr4) & pdptr_bits)
 738                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 739                                    kvm_read_cr3(vcpu)))
 740                 return 1;
 741
 742         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 743                 if (!guest_cpuid_has_pcid(vcpu))
 744                         return 1;
 745
 746                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 747                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 748                         return 1;
 749         }
 750
 751         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 752                 return 1;
 753
 754         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 755             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 756                 kvm_mmu_reset_context(vcpu);
 757
 758         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 759                 kvm_update_cpuid(vcpu);
 760
 761         return 0;
 762 }
 763 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 764
 765 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 766 {
 767 #ifdef CONFIG_X86_64
 768         cr3 &= ~CR3_PCID_INVD;
 769 #endif
 770
 771         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 772                 kvm_mmu_sync_roots(vcpu);
 773                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 774                 return 0;
 775         }
 776
 777         if (is_long_mode(vcpu)) {
 778                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 779                         return 1;
 780         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 781                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 782                 return 1;
 783
 784         vcpu->arch.cr3 = cr3;
 785         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 786         kvm_mmu_new_cr3(vcpu);
 787         return 0;
 788 }
 789 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 790
 791 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 792 {
 793         if (cr8 & CR8_RESERVED_BITS)
 794                 return 1;
 795         if (lapic_in_kernel(vcpu))
 796                 kvm_lapic_set_tpr(vcpu, cr8);
 797         else
 798                 vcpu->arch.cr8 = cr8;
 799         return 0;
 800 }
 801 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 802
 803 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 804 {
 805         if (lapic_in_kernel(vcpu))
 806                 return kvm_lapic_get_cr8(vcpu);
 807         else
 808                 return vcpu->arch.cr8;
 809 }
 810 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 811
 812 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 813 {
 814         int i;
 815
 816         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 817                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 818                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 819                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 820         }
 821 }
 822
 823 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 824 {
 825         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 826                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 827 }
 828
 829 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 830 {
 831         unsigned long dr7;
 832
 833         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 834                 dr7 = vcpu->arch.guest_debug_dr7;
 835         else
 836                 dr7 = vcpu->arch.dr7;
 837         kvm_x86_ops->set_dr7(vcpu, dr7);
 838         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 839         if (dr7 & DR7_BP_EN_MASK)
 840                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 841 }
 842
 843 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 844 {
 845         u64 fixed = DR6_FIXED_1;
 846
 847         if (!guest_cpuid_has_rtm(vcpu))
 848                 fixed |= DR6_RTM;
 849         return fixed;
 850 }
 851
 852 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 853 {
 854         switch (dr) {
 855         case 0 ... 3:
 856                 vcpu->arch.db[dr] = val;
 857                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 858                         vcpu->arch.eff_db[dr] = val;
 859                 break;
 860         case 4:
 861                 /* fall through */
 862         case 6:
 863                 if (val & 0xffffffff00000000ULL)
 864                         return -1; /* #GP */
 865                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 866                 kvm_update_dr6(vcpu);
 867                 break;
 868         case 5:
 869                 /* fall through */
 870         default: /* 7 */
 871                 if (val & 0xffffffff00000000ULL)
 872                         return -1; /* #GP */
 873                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 874                 kvm_update_dr7(vcpu);
 875                 break;
 876         }
 877
 878         return 0;
 879 }
 880
 881 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 882 {
 883         if (__kvm_set_dr(vcpu, dr, val)) {
 884                 kvm_inject_gp(vcpu, 0);
 885                 return 1;
 886         }
 887         return 0;
 888 }
 889 EXPORT_SYMBOL_GPL(kvm_set_dr);
 890
 891 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 892 {
 893         switch (dr) {
 894         case 0 ... 3:
 895                 *val = vcpu->arch.db[dr];
 896                 break;
 897         case 4:
 898                 /* fall through */
 899         case 6:
 900                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 901                         *val = vcpu->arch.dr6;
 902                 else
 903                         *val = kvm_x86_ops->get_dr6(vcpu);
 904                 break;
 905         case 5:
 906                 /* fall through */
 907         default: /* 7 */
 908                 *val = vcpu->arch.dr7;
 909                 break;
 910         }
 911         return 0;
 912 }
 913 EXPORT_SYMBOL_GPL(kvm_get_dr);
 914
 915 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 916 {
 917         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 918         u64 data;
 919         int err;
 920
 921         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 922         if (err)
 923                 return err;
 924         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 925         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 926         return err;
 927 }
 928 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 929
 930 /*
 931  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 932  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 933  *
 934  * This list is modified at module load time to reflect the
 935  * capabilities of the host cpu. This capabilities test skips MSRs that are
 936  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 937  * may depend on host virtualization features rather than host cpu features.
 938  */
 939
 940 static u32 msrs_to_save[] = {
 941         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 942         MSR_STAR,
 943 #ifdef CONFIG_X86_64
 944         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 945 #endif
 946         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 947         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 948 };
 949
 950 static unsigned num_msrs_to_save;
 951
 952 static u32 emulated_msrs[] = {
 953         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 954         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 955         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 956         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 957         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 958         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 959         HV_X64_MSR_RESET,
 960         HV_X64_MSR_VP_INDEX,
 961         HV_X64_MSR_VP_RUNTIME,
 962         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 963         MSR_KVM_PV_EOI_EN,
 964
 965         MSR_IA32_TSC_ADJUST,
 966         MSR_IA32_TSCDEADLINE,
 967         MSR_IA32_MISC_ENABLE,
 968         MSR_IA32_MCG_STATUS,
 969         MSR_IA32_MCG_CTL,
 970         MSR_IA32_SMBASE,
 971 };
 972
 973 static unsigned num_emulated_msrs;
 974
 975 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 976 {
 977         if (efer & efer_reserved_bits)
 978                 return false;
 979
 980         if (efer & EFER_FFXSR) {
 981                 struct kvm_cpuid_entry2 *feat;
 982
 983                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 984                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 985                         return false;
 986         }
 987
 988         if (efer & EFER_SVME) {
 989                 struct kvm_cpuid_entry2 *feat;
 990
 991                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 992                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 993                         return false;
 994         }
 995
 996         return true;
 997 }
 998 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 999
1000 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1001 {
1002         u64 old_efer = vcpu->arch.efer;
1003
1004         if (!kvm_valid_efer(vcpu, efer))
1005                 return 1;
1006
1007         if (is_paging(vcpu)
1008             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1009                 return 1;
1010
1011         efer &= ~EFER_LMA;
1012         efer |= vcpu->arch.efer & EFER_LMA;
1013
1014         kvm_x86_ops->set_efer(vcpu, efer);
1015
1016         /* Update reserved bits */
1017         if ((efer ^ old_efer) & EFER_NX)
1018                 kvm_mmu_reset_context(vcpu);
1019
1020         return 0;
1021 }
1022
1023 void kvm_enable_efer_bits(u64 mask)
1024 {
1025        efer_reserved_bits &= ~mask;
1026 }
1027 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1028
1029 /*
1030  * Writes msr value into into the appropriate "register".
1031  * Returns 0 on success, non-0 otherwise.
1032  * Assumes vcpu_load() was already called.
1033  */
1034 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1035 {
1036         switch (msr->index) {
1037         case MSR_FS_BASE:
1038         case MSR_GS_BASE:
1039         case MSR_KERNEL_GS_BASE:
1040         case MSR_CSTAR:
1041         case MSR_LSTAR:
1042                 if (is_noncanonical_address(msr->data))
1043                         return 1;
1044                 break;
1045         case MSR_IA32_SYSENTER_EIP:
1046         case MSR_IA32_SYSENTER_ESP:
1047                 /*
1048                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1049                  * non-canonical address is written on Intel but not on
1050                  * AMD (which ignores the top 32-bits, because it does
1051                  * not implement 64-bit SYSENTER).
1052                  *
1053                  * 64-bit code should hence be able to write a non-canonical
1054                  * value on AMD.  Making the address canonical ensures that
1055                  * vmentry does not fail on Intel after writing a non-canonical
1056                  * value, and that something deterministic happens if the guest
1057                  * invokes 64-bit SYSENTER.
1058                  */
1059                 msr->data = get_canonical(msr->data);
1060         }
1061         return kvm_x86_ops->set_msr(vcpu, msr);
1062 }
1063 EXPORT_SYMBOL_GPL(kvm_set_msr);
1064
1065 /*
1066  * Adapt set_msr() to msr_io()'s calling convention
1067  */
1068 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1069 {
1070         struct msr_data msr;
1071         int r;
1072
1073         msr.index = index;
1074         msr.host_initiated = true;
1075         r = kvm_get_msr(vcpu, &msr);
1076         if (r)
1077                 return r;
1078
1079         *data = msr.data;
1080         return 0;
1081 }
1082
1083 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1084 {
1085         struct msr_data msr;
1086
1087         msr.data = *data;
1088         msr.index = index;
1089         msr.host_initiated = true;
1090         return kvm_set_msr(vcpu, &msr);
1091 }
1092
1093 #ifdef CONFIG_X86_64
1094 struct pvclock_gtod_data {
1095         seqcount_t      seq;
1096
1097         struct { /* extract of a clocksource struct */
1098                 int vclock_mode;
1099                 cycle_t cycle_last;
1100                 cycle_t mask;
1101                 u32     mult;
1102                 u32     shift;
1103         } clock;
1104
1105         u64             boot_ns;
1106         u64             nsec_base;
1107 };
1108
1109 static struct pvclock_gtod_data pvclock_gtod_data;
1110
1111 static void update_pvclock_gtod(struct timekeeper *tk)
1112 {
1113         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1114         u64 boot_ns;
1115
1116         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1117
1118         write_seqcount_begin(&vdata->seq);
1119
1120         /* copy pvclock gtod data */
1121         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1122         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1123         vdata->clock.mask               = tk->tkr_mono.mask;
1124         vdata->clock.mult               = tk->tkr_mono.mult;
1125         vdata->clock.shift              = tk->tkr_mono.shift;
1126
1127         vdata->boot_ns                  = boot_ns;
1128         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1129
1130         write_seqcount_end(&vdata->seq);
1131 }
1132 #endif
1133
1134 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1135 {
1136         /*
1137          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1138          * vcpu_enter_guest.  This function is only called from
1139          * the physical CPU that is running vcpu.
1140          */
1141         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1142 }
1143
1144 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1145 {
1146         int version;
1147         int r;
1148         struct pvclock_wall_clock wc;
1149         struct timespec boot;
1150
1151         if (!wall_clock)
1152                 return;
1153
1154         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1155         if (r)
1156                 return;
1157
1158         if (version & 1)
1159                 ++version;  /* first time write, random junk */
1160
1161         ++version;
1162
1163         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1164
1165         /*
1166          * The guest calculates current wall clock time by adding
1167          * system time (updated by kvm_guest_time_update below) to the
1168          * wall clock specified here.  guest system time equals host
1169          * system time for us, thus we must fill in host boot time here.
1170          */
1171         getboottime(&boot);
1172
1173         if (kvm->arch.kvmclock_offset) {
1174                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1175                 boot = timespec_sub(boot, ts);
1176         }
1177         wc.sec = boot.tv_sec;
1178         wc.nsec = boot.tv_nsec;
1179         wc.version = version;
1180
1181         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1182
1183         version++;
1184         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1185 }
1186
1187 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1188 {
1189         uint32_t quotient, remainder;
1190
1191         /* Don't try to replace with do_div(), this one calculates
1192          * "(dividend << 32) / divisor" */
1193         __asm__ ( "divl %4"
1194                   : "=a" (quotient), "=d" (remainder)
1195                   : "0" (0), "1" (dividend), "r" (divisor) );
1196         return quotient;
1197 }
1198
1199 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1200                                s8 *pshift, u32 *pmultiplier)
1201 {
1202         uint64_t scaled64;
1203         int32_t  shift = 0;
1204         uint64_t tps64;
1205         uint32_t tps32;
1206
1207         tps64 = base_khz * 1000LL;
1208         scaled64 = scaled_khz * 1000LL;
1209         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1210                 tps64 >>= 1;
1211                 shift--;
1212         }
1213
1214         tps32 = (uint32_t)tps64;
1215         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1216                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1217                         scaled64 >>= 1;
1218                 else
1219                         tps32 <<= 1;
1220                 shift++;
1221         }
1222
1223         *pshift = shift;
1224         *pmultiplier = div_frac(scaled64, tps32);
1225
1226         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1227                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1228 }
1229
1230 #ifdef CONFIG_X86_64
1231 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1232 #endif
1233
1234 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1235 static unsigned long max_tsc_khz;
1236
1237 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1238 {
1239         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1240                                    vcpu->arch.virtual_tsc_shift);
1241 }
1242
1243 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1244 {
1245         u64 v = (u64)khz * (1000000 + ppm);
1246         do_div(v, 1000000);
1247         return v;
1248 }
1249
1250 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1251 {
1252         u32 thresh_lo, thresh_hi;
1253         int use_scaling = 0;
1254
1255         /* tsc_khz can be zero if TSC calibration fails */
1256         if (this_tsc_khz == 0)
1257                 return;
1258
1259         /* Compute a scale to convert nanoseconds in TSC cycles */
1260         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1261                            &vcpu->arch.virtual_tsc_shift,
1262                            &vcpu->arch.virtual_tsc_mult);
1263         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1264
1265         /*
1266          * Compute the variation in TSC rate which is acceptable
1267          * within the range of tolerance and decide if the
1268          * rate being applied is within that bounds of the hardware
1269          * rate.  If so, no scaling or compensation need be done.
1270          */
1271         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1272         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1273         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1274                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1275                 use_scaling = 1;
1276         }
1277         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1278 }
1279
1280 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1281 {
1282         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1283                                       vcpu->arch.virtual_tsc_mult,
1284                                       vcpu->arch.virtual_tsc_shift);
1285         tsc += vcpu->arch.this_tsc_write;
1286         return tsc;
1287 }
1288
1289 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1290 {
1291 #ifdef CONFIG_X86_64
1292         bool vcpus_matched;
1293         struct kvm_arch *ka = &vcpu->kvm->arch;
1294         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1295
1296         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1297                          atomic_read(&vcpu->kvm->online_vcpus));
1298
1299         /*
1300          * Once the masterclock is enabled, always perform request in
1301          * order to update it.
1302          *
1303          * In order to enable masterclock, the host clocksource must be TSC
1304          * and the vcpus need to have matched TSCs.  When that happens,
1305          * perform request to enable masterclock.
1306          */
1307         if (ka->use_master_clock ||
1308             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1309                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1310
1311         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1312                             atomic_read(&vcpu->kvm->online_vcpus),
1313                             ka->use_master_clock, gtod->clock.vclock_mode);
1314 #endif
1315 }
1316
1317 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1318 {
1319         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1320         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1321 }
1322
1323 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1324 {
1325         struct kvm *kvm = vcpu->kvm;
1326         u64 offset, ns, elapsed;
1327         unsigned long flags;
1328         s64 usdiff;
1329         bool matched;
1330         bool already_matched;
1331         u64 data = msr->data;
1332
1333         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1334         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1335         ns = get_kernel_ns();
1336         elapsed = ns - kvm->arch.last_tsc_nsec;
1337
1338         if (vcpu->arch.virtual_tsc_khz) {
1339                 int faulted = 0;
1340
1341                 /* n.b - signed multiplication and division required */
1342                 usdiff = data - kvm->arch.last_tsc_write;
1343 #ifdef CONFIG_X86_64
1344                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1345 #else
1346                 /* do_div() only does unsigned */
1347                 asm("1: idivl %[divisor]\n"
1348                     "2: xor %%edx, %%edx\n"
1349                     "   movl $0, %[faulted]\n"
1350                     "3:\n"
1351                     ".section .fixup,\"ax\"\n"
1352                     "4: movl $1, %[faulted]\n"
1353                     "   jmp  3b\n"
1354                     ".previous\n"
1355
1356                 _ASM_EXTABLE(1b, 4b)
1357
1358                 : "=A"(usdiff), [faulted] "=r" (faulted)
1359                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1360
1361 #endif
1362                 do_div(elapsed, 1000);
1363                 usdiff -= elapsed;
1364                 if (usdiff < 0)
1365                         usdiff = -usdiff;
1366
1367                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1368                 if (faulted)
1369                         usdiff = USEC_PER_SEC;
1370         } else
1371                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1372
1373         /*
1374          * Special case: TSC write with a small delta (1 second) of virtual
1375          * cycle time against real time is interpreted as an attempt to
1376          * synchronize the CPU.
1377          *
1378          * For a reliable TSC, we can match TSC offsets, and for an unstable
1379          * TSC, we add elapsed time in this computation.  We could let the
1380          * compensation code attempt to catch up if we fall behind, but
1381          * it's better to try to match offsets from the beginning.
1382          */
1383         if (usdiff < USEC_PER_SEC &&
1384             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1385                 if (!check_tsc_unstable()) {
1386                         offset = kvm->arch.cur_tsc_offset;
1387                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1388                 } else {
1389                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1390                         data += delta;
1391                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1392                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1393                 }
1394                 matched = true;
1395                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1396         } else {
1397                 /*
1398                  * We split periods of matched TSC writes into generations.
1399                  * For each generation, we track the original measured
1400                  * nanosecond time, offset, and write, so if TSCs are in
1401                  * sync, we can match exact offset, and if not, we can match
1402                  * exact software computation in compute_guest_tsc()
1403                  *
1404                  * These values are tracked in kvm->arch.cur_xxx variables.
1405                  */
1406                 kvm->arch.cur_tsc_generation++;
1407                 kvm->arch.cur_tsc_nsec = ns;
1408                 kvm->arch.cur_tsc_write = data;
1409                 kvm->arch.cur_tsc_offset = offset;
1410                 matched = false;
1411                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1412                          kvm->arch.cur_tsc_generation, data);
1413         }
1414
1415         /*
1416          * We also track th most recent recorded KHZ, write and time to
1417          * allow the matching interval to be extended at each write.
1418          */
1419         kvm->arch.last_tsc_nsec = ns;
1420         kvm->arch.last_tsc_write = data;
1421         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1422
1423         vcpu->arch.last_guest_tsc = data;
1424
1425         /* Keep track of which generation this VCPU has synchronized to */
1426         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1427         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1428         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1429
1430         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1431                 update_ia32_tsc_adjust_msr(vcpu, offset);
1432         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1433         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1434
1435         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1436         if (!matched) {
1437                 kvm->arch.nr_vcpus_matched_tsc = 0;
1438         } else if (!already_matched) {
1439                 kvm->arch.nr_vcpus_matched_tsc++;
1440         }
1441
1442         kvm_track_tsc_matching(vcpu);
1443         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1444 }
1445
1446 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1447
1448 #ifdef CONFIG_X86_64
1449
1450 static cycle_t read_tsc(void)
1451 {
1452         cycle_t ret = (cycle_t)rdtsc_ordered();
1453         u64 last = pvclock_gtod_data.clock.cycle_last;
1454
1455         if (likely(ret >= last))
1456                 return ret;
1457
1458         /*
1459          * GCC likes to generate cmov here, but this branch is extremely
1460          * predictable (it's just a funciton of time and the likely is
1461          * very likely) and there's a data dependence, so force GCC
1462          * to generate a branch instead.  I don't barrier() because
1463          * we don't actually need a barrier, and if this function
1464          * ever gets inlined it will generate worse code.
1465          */
1466         asm volatile ("");
1467         return last;
1468 }
1469
1470 static inline u64 vgettsc(cycle_t *cycle_now)
1471 {
1472         long v;
1473         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1474
1475         *cycle_now = read_tsc();
1476
1477         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1478         return v * gtod->clock.mult;
1479 }
1480
1481 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1482 {
1483         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1484         unsigned long seq;
1485         int mode;
1486         u64 ns;
1487
1488         do {
1489                 seq = read_seqcount_begin(&gtod->seq);
1490                 mode = gtod->clock.vclock_mode;
1491                 ns = gtod->nsec_base;
1492                 ns += vgettsc(cycle_now);
1493                 ns >>= gtod->clock.shift;
1494                 ns += gtod->boot_ns;
1495         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1496         *t = ns;
1497
1498         return mode;
1499 }
1500
1501 /* returns true if host is using tsc clocksource */
1502 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1503 {
1504         /* checked again under seqlock below */
1505         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1506                 return false;
1507
1508         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1509 }
1510 #endif
1511
1512 /*
1513  *
1514  * Assuming a stable TSC across physical CPUS, and a stable TSC
1515  * across virtual CPUs, the following condition is possible.
1516  * Each numbered line represents an event visible to both
1517  * CPUs at the next numbered event.
1518  *
1519  * "timespecX" represents host monotonic time. "tscX" represents
1520  * RDTSC value.
1521  *
1522  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1523  *
1524  * 1.  read timespec0,tsc0
1525  * 2.                                   | timespec1 = timespec0 + N
1526  *                                      | tsc1 = tsc0 + M
1527  * 3. transition to guest               | transition to guest
1528  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1529  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1530  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1531  *
1532  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1533  *
1534  *      - ret0 < ret1
1535  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1536  *              ...
1537  *      - 0 < N - M => M < N
1538  *
1539  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1540  * always the case (the difference between two distinct xtime instances
1541  * might be smaller then the difference between corresponding TSC reads,
1542  * when updating guest vcpus pvclock areas).
1543  *
1544  * To avoid that problem, do not allow visibility of distinct
1545  * system_timestamp/tsc_timestamp values simultaneously: use a master
1546  * copy of host monotonic time values. Update that master copy
1547  * in lockstep.
1548  *
1549  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1550  *
1551  */
1552
1553 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1554 {
1555 #ifdef CONFIG_X86_64
1556         struct kvm_arch *ka = &kvm->arch;
1557         int vclock_mode;
1558         bool host_tsc_clocksource, vcpus_matched;
1559
1560         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1561                         atomic_read(&kvm->online_vcpus));
1562
1563         /*
1564          * If the host uses TSC clock, then passthrough TSC as stable
1565          * to the guest.
1566          */
1567         host_tsc_clocksource = kvm_get_time_and_clockread(
1568                                         &ka->master_kernel_ns,
1569                                         &ka->master_cycle_now);
1570
1571         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1572                                 && !backwards_tsc_observed
1573                                 && !ka->boot_vcpu_runs_old_kvmclock;
1574
1575         if (ka->use_master_clock)
1576                 atomic_set(&kvm_guest_has_master_clock, 1);
1577
1578         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1579         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1580                                         vcpus_matched);
1581 #endif
1582 }
1583
1584 static void kvm_gen_update_masterclock(struct kvm *kvm)
1585 {
1586 #ifdef CONFIG_X86_64
1587         int i;
1588         struct kvm_vcpu *vcpu;
1589         struct kvm_arch *ka = &kvm->arch;
1590
1591         spin_lock(&ka->pvclock_gtod_sync_lock);
1592         kvm_make_mclock_inprogress_request(kvm);
1593         /* no guest entries from this point */
1594         pvclock_update_vm_gtod_copy(kvm);
1595
1596         kvm_for_each_vcpu(i, vcpu, kvm)
1597                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1598
1599         /* guest entries allowed */
1600         kvm_for_each_vcpu(i, vcpu, kvm)
1601                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1602
1603         spin_unlock(&ka->pvclock_gtod_sync_lock);
1604 #endif
1605 }
1606
1607 static int kvm_guest_time_update(struct kvm_vcpu *v)
1608 {
1609         unsigned long flags, this_tsc_khz;
1610         struct kvm_vcpu_arch *vcpu = &v->arch;
1611         struct kvm_arch *ka = &v->kvm->arch;
1612         s64 kernel_ns;
1613         u64 tsc_timestamp, host_tsc;
1614         struct pvclock_vcpu_time_info guest_hv_clock;
1615         u8 pvclock_flags;
1616         bool use_master_clock;
1617
1618         kernel_ns = 0;
1619         host_tsc = 0;
1620
1621         /*
1622          * If the host uses TSC clock, then passthrough TSC as stable
1623          * to the guest.
1624          */
1625         spin_lock(&ka->pvclock_gtod_sync_lock);
1626         use_master_clock = ka->use_master_clock;
1627         if (use_master_clock) {
1628                 host_tsc = ka->master_cycle_now;
1629                 kernel_ns = ka->master_kernel_ns;
1630         }
1631         spin_unlock(&ka->pvclock_gtod_sync_lock);
1632
1633         /* Keep irq disabled to prevent changes to the clock */
1634         local_irq_save(flags);
1635         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1636         if (unlikely(this_tsc_khz == 0)) {
1637                 local_irq_restore(flags);
1638                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1639                 return 1;
1640         }
1641         if (!use_master_clock) {
1642                 host_tsc = rdtsc();
1643                 kernel_ns = get_kernel_ns();
1644         }
1645
1646         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1647
1648         /*
1649          * We may have to catch up the TSC to match elapsed wall clock
1650          * time for two reasons, even if kvmclock is used.
1651          *   1) CPU could have been running below the maximum TSC rate
1652          *   2) Broken TSC compensation resets the base at each VCPU
1653          *      entry to avoid unknown leaps of TSC even when running
1654          *      again on the same CPU.  This may cause apparent elapsed
1655          *      time to disappear, and the guest to stand still or run
1656          *      very slowly.
1657          */
1658         if (vcpu->tsc_catchup) {
1659                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1660                 if (tsc > tsc_timestamp) {
1661                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1662                         tsc_timestamp = tsc;
1663                 }
1664         }
1665
1666         local_irq_restore(flags);
1667
1668         if (!vcpu->pv_time_enabled)
1669                 return 0;
1670
1671         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1672                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1673                                    &vcpu->hv_clock.tsc_shift,
1674                                    &vcpu->hv_clock.tsc_to_system_mul);
1675                 vcpu->hw_tsc_khz = this_tsc_khz;
1676         }
1677
1678         /* With all the info we got, fill in the values */
1679         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1680         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1681         vcpu->last_guest_tsc = tsc_timestamp;
1682
1683         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1684                 &guest_hv_clock, sizeof(guest_hv_clock))))
1685                 return 0;
1686
1687         /* This VCPU is paused, but it's legal for a guest to read another
1688          * VCPU's kvmclock, so we really have to follow the specification where
1689          * it says that version is odd if data is being modified, and even after
1690          * it is consistent.
1691          *
1692          * Version field updates must be kept separate.  This is because
1693          * kvm_write_guest_cached might use a "rep movs" instruction, and
1694          * writes within a string instruction are weakly ordered.  So there
1695          * are three writes overall.
1696          *
1697          * As a small optimization, only write the version field in the first
1698          * and third write.  The vcpu->pv_time cache is still valid, because the
1699          * version field is the first in the struct.
1700          */
1701         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1702
1703         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1704         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1705                                 &vcpu->hv_clock,
1706                                 sizeof(vcpu->hv_clock.version));
1707
1708         smp_wmb();
1709
1710         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1711         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1712
1713         if (vcpu->pvclock_set_guest_stopped_request) {
1714                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1715                 vcpu->pvclock_set_guest_stopped_request = false;
1716         }
1717
1718         /* If the host uses TSC clocksource, then it is stable */
1719         if (use_master_clock)
1720                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1721
1722         vcpu->hv_clock.flags = pvclock_flags;
1723
1724         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1725
1726         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1727                                 &vcpu->hv_clock,
1728                                 sizeof(vcpu->hv_clock));
1729
1730         smp_wmb();
1731
1732         vcpu->hv_clock.version++;
1733         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1734                                 &vcpu->hv_clock,
1735                                 sizeof(vcpu->hv_clock.version));
1736         return 0;
1737 }
1738
1739 /*
1740  * kvmclock updates which are isolated to a given vcpu, such as
1741  * vcpu->cpu migration, should not allow system_timestamp from
1742  * the rest of the vcpus to remain static. Otherwise ntp frequency
1743  * correction applies to one vcpu's system_timestamp but not
1744  * the others.
1745  *
1746  * So in those cases, request a kvmclock update for all vcpus.
1747  * We need to rate-limit these requests though, as they can
1748  * considerably slow guests that have a large number of vcpus.
1749  * The time for a remote vcpu to update its kvmclock is bound
1750  * by the delay we use to rate-limit the updates.
1751  */
1752
1753 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1754
1755 static void kvmclock_update_fn(struct work_struct *work)
1756 {
1757         int i;
1758         struct delayed_work *dwork = to_delayed_work(work);
1759         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1760                                            kvmclock_update_work);
1761         struct kvm *kvm = container_of(ka, struct kvm, arch);
1762         struct kvm_vcpu *vcpu;
1763
1764         kvm_for_each_vcpu(i, vcpu, kvm) {
1765                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1766                 kvm_vcpu_kick(vcpu);
1767         }
1768 }
1769
1770 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1771 {
1772         struct kvm *kvm = v->kvm;
1773
1774         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1775         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1776                                         KVMCLOCK_UPDATE_DELAY);
1777 }
1778
1779 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1780
1781 static void kvmclock_sync_fn(struct work_struct *work)
1782 {
1783         struct delayed_work *dwork = to_delayed_work(work);
1784         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1785                                            kvmclock_sync_work);
1786         struct kvm *kvm = container_of(ka, struct kvm, arch);
1787
1788         if (!kvmclock_periodic_sync)
1789                 return;
1790
1791         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1792         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1793                                         KVMCLOCK_SYNC_PERIOD);
1794 }
1795
1796 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1797 {
1798         u64 mcg_cap = vcpu->arch.mcg_cap;
1799         unsigned bank_num = mcg_cap & 0xff;
1800
1801         switch (msr) {
1802         case MSR_IA32_MCG_STATUS:
1803                 vcpu->arch.mcg_status = data;
1804                 break;
1805         case MSR_IA32_MCG_CTL:
1806                 if (!(mcg_cap & MCG_CTL_P))
1807                         return 1;
1808                 if (data != 0 && data != ~(u64)0)
1809                         return -1;
1810                 vcpu->arch.mcg_ctl = data;
1811                 break;
1812         default:
1813                 if (msr >= MSR_IA32_MC0_CTL &&
1814                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1815                         u32 offset = msr - MSR_IA32_MC0_CTL;
1816                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1817                          * some Linux kernels though clear bit 10 in bank 4 to
1818                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1819                          * this to avoid an uncatched #GP in the guest
1820                          */
1821                         if ((offset & 0x3) == 0 &&
1822                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1823                                 return -1;
1824                         vcpu->arch.mce_banks[offset] = data;
1825                         break;
1826                 }
1827                 return 1;
1828         }
1829         return 0;
1830 }
1831
1832 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1833 {
1834         struct kvm *kvm = vcpu->kvm;
1835         int lm = is_long_mode(vcpu);
1836         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1837                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1838         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1839                 : kvm->arch.xen_hvm_config.blob_size_32;
1840         u32 page_num = data & ~PAGE_MASK;
1841         u64 page_addr = data & PAGE_MASK;
1842         u8 *page;
1843         int r;
1844
1845         r = -E2BIG;
1846         if (page_num >= blob_size)
1847                 goto out;
1848         r = -ENOMEM;
1849         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1850         if (IS_ERR(page)) {
1851                 r = PTR_ERR(page);
1852                 goto out;
1853         }
1854         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1855                 goto out_free;
1856         r = 0;
1857 out_free:
1858         kfree(page);
1859 out:
1860         return r;
1861 }
1862
1863 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1864 {
1865         gpa_t gpa = data & ~0x3f;
1866
1867         /* Bits 2:5 are reserved, Should be zero */
1868         if (data & 0x3c)
1869                 return 1;
1870
1871         vcpu->arch.apf.msr_val = data;
1872
1873         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1874                 kvm_clear_async_pf_completion_queue(vcpu);
1875                 kvm_async_pf_hash_reset(vcpu);
1876                 return 0;
1877         }
1878
1879         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1880                                         sizeof(u32)))
1881                 return 1;
1882
1883         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1884         kvm_async_pf_wakeup_all(vcpu);
1885         return 0;
1886 }
1887
1888 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1889 {
1890         vcpu->arch.pv_time_enabled = false;
1891 }
1892
1893 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1894 {
1895         u64 delta;
1896
1897         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1898                 return;
1899
1900         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1901         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1902         vcpu->arch.st.accum_steal = delta;
1903 }
1904
1905 static void record_steal_time(struct kvm_vcpu *vcpu)
1906 {
1907         accumulate_steal_time(vcpu);
1908
1909         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1910                 return;
1911
1912         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1913                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1914                 return;
1915
1916         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1917         vcpu->arch.st.steal.version += 2;
1918         vcpu->arch.st.accum_steal = 0;
1919
1920         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1921                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1922 }
1923
1924 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1925 {
1926         bool pr = false;
1927         u32 msr = msr_info->index;
1928         u64 data = msr_info->data;
1929
1930         switch (msr) {
1931         case MSR_AMD64_NB_CFG:
1932         case MSR_IA32_UCODE_REV:
1933         case MSR_IA32_UCODE_WRITE:
1934         case MSR_VM_HSAVE_PA:
1935         case MSR_AMD64_PATCH_LOADER:
1936         case MSR_AMD64_BU_CFG2:
1937                 break;
1938
1939         case MSR_EFER:
1940                 return set_efer(vcpu, data);
1941         case MSR_K7_HWCR:
1942                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1943                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1944                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1945                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
1946                 if (data != 0) {
1947                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1948                                     data);
1949                         return 1;
1950                 }
1951                 break;
1952         case MSR_FAM10H_MMIO_CONF_BASE:
1953                 if (data != 0) {
1954                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1955                                     "0x%llx\n", data);
1956                         return 1;
1957                 }
1958                 break;
1959         case MSR_IA32_DEBUGCTLMSR:
1960                 if (!data) {
1961                         /* We support the non-activated case already */
1962                         break;
1963                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1964                         /* Values other than LBR and BTF are vendor-specific,
1965                            thus reserved and should throw a #GP */
1966                         return 1;
1967                 }
1968                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1969                             __func__, data);
1970                 break;
1971         case 0x200 ... 0x2ff:
1972                 return kvm_mtrr_set_msr(vcpu, msr, data);
1973         case MSR_IA32_APICBASE:
1974                 return kvm_set_apic_base(vcpu, msr_info);
1975         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1976                 return kvm_x2apic_msr_write(vcpu, msr, data);
1977         case MSR_IA32_TSCDEADLINE:
1978                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1979                 break;
1980         case MSR_IA32_TSC_ADJUST:
1981                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1982                         if (!msr_info->host_initiated) {
1983                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1984                                 adjust_tsc_offset_guest(vcpu, adj);
1985                         }
1986                         vcpu->arch.ia32_tsc_adjust_msr = data;
1987                 }
1988                 break;
1989         case MSR_IA32_MISC_ENABLE:
1990                 vcpu->arch.ia32_misc_enable_msr = data;
1991                 break;
1992         case MSR_IA32_SMBASE:
1993                 if (!msr_info->host_initiated)
1994                         return 1;
1995                 vcpu->arch.smbase = data;
1996                 break;
1997         case MSR_KVM_WALL_CLOCK_NEW:
1998         case MSR_KVM_WALL_CLOCK:
1999                 vcpu->kvm->arch.wall_clock = data;
2000                 kvm_write_wall_clock(vcpu->kvm, data);
2001                 break;
2002         case MSR_KVM_SYSTEM_TIME_NEW:
2003         case MSR_KVM_SYSTEM_TIME: {
2004                 u64 gpa_offset;
2005                 struct kvm_arch *ka = &vcpu->kvm->arch;
2006
2007                 kvmclock_reset(vcpu);
2008
2009                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2010                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2011
2012                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2013                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2014                                         &vcpu->requests);
2015
2016                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2017                 }
2018
2019                 vcpu->arch.time = data;
2020                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2021
2022                 /* we verify if the enable bit is set... */
2023                 if (!(data & 1))
2024                         break;
2025
2026                 gpa_offset = data & ~(PAGE_MASK | 1);
2027
2028                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2029                      &vcpu->arch.pv_time, data & ~1ULL,
2030                      sizeof(struct pvclock_vcpu_time_info)))
2031                         vcpu->arch.pv_time_enabled = false;
2032                 else
2033                         vcpu->arch.pv_time_enabled = true;
2034
2035                 break;
2036         }
2037         case MSR_KVM_ASYNC_PF_EN:
2038                 if (kvm_pv_enable_async_pf(vcpu, data))
2039                         return 1;
2040                 break;
2041         case MSR_KVM_STEAL_TIME:
2042
2043                 if (unlikely(!sched_info_on()))
2044                         return 1;
2045
2046                 if (data & KVM_STEAL_RESERVED_MASK)
2047                         return 1;
2048
2049                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2050                                                 data & KVM_STEAL_VALID_BITS,
2051                                                 sizeof(struct kvm_steal_time)))
2052                         return 1;
2053
2054                 vcpu->arch.st.msr_val = data;
2055
2056                 if (!(data & KVM_MSR_ENABLED))
2057                         break;
2058
2059                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2060
2061                 break;
2062         case MSR_KVM_PV_EOI_EN:
2063                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2064                         return 1;
2065                 break;
2066
2067         case MSR_IA32_MCG_CTL:
2068         case MSR_IA32_MCG_STATUS:
2069         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2070                 return set_msr_mce(vcpu, msr, data);
2071
2072         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2073         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2074                 pr = true; /* fall through */
2075         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2076         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2077                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2078                         return kvm_pmu_set_msr(vcpu, msr_info);
2079
2080                 if (pr || data != 0)
2081                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2082                                     "0x%x data 0x%llx\n", msr, data);
2083                 break;
2084         case MSR_K7_CLK_CTL:
2085                 /*
2086                  * Ignore all writes to this no longer documented MSR.
2087                  * Writes are only relevant for old K7 processors,
2088                  * all pre-dating SVM, but a recommended workaround from
2089                  * AMD for these chips. It is possible to specify the
2090                  * affected processor models on the command line, hence
2091                  * the need to ignore the workaround.
2092                  */
2093                 break;
2094         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2095         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2096         case HV_X64_MSR_CRASH_CTL:
2097                 return kvm_hv_set_msr_common(vcpu, msr, data,
2098                                              msr_info->host_initiated);
2099         case MSR_IA32_BBL_CR_CTL3:
2100                 /* Drop writes to this legacy MSR -- see rdmsr
2101                  * counterpart for further detail.
2102                  */
2103                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2104                 break;
2105         case MSR_AMD64_OSVW_ID_LENGTH:
2106                 if (!guest_cpuid_has_osvw(vcpu))
2107                         return 1;
2108                 vcpu->arch.osvw.length = data;
2109                 break;
2110         case MSR_AMD64_OSVW_STATUS:
2111                 if (!guest_cpuid_has_osvw(vcpu))
2112                         return 1;
2113                 vcpu->arch.osvw.status = data;
2114                 break;
2115         default:
2116                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2117                         return xen_hvm_config(vcpu, data);
2118                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2119                         return kvm_pmu_set_msr(vcpu, msr_info);
2120                 if (!ignore_msrs) {
2121                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2122                                     msr, data);
2123                         return 1;
2124                 } else {
2125                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2126                                     msr, data);
2127                         break;
2128                 }
2129         }
2130         return 0;
2131 }
2132 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2133
2134
2135 /*
2136  * Reads an msr value (of 'msr_index') into 'pdata'.
2137  * Returns 0 on success, non-0 otherwise.
2138  * Assumes vcpu_load() was already called.
2139  */
2140 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2141 {
2142         return kvm_x86_ops->get_msr(vcpu, msr);
2143 }
2144 EXPORT_SYMBOL_GPL(kvm_get_msr);
2145
2146 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2147 {
2148         u64 data;
2149         u64 mcg_cap = vcpu->arch.mcg_cap;
2150         unsigned bank_num = mcg_cap & 0xff;
2151
2152         switch (msr) {
2153         case MSR_IA32_P5_MC_ADDR:
2154         case MSR_IA32_P5_MC_TYPE:
2155                 data = 0;
2156                 break;
2157         case MSR_IA32_MCG_CAP:
2158                 data = vcpu->arch.mcg_cap;
2159                 break;
2160         case MSR_IA32_MCG_CTL:
2161                 if (!(mcg_cap & MCG_CTL_P))
2162                         return 1;
2163                 data = vcpu->arch.mcg_ctl;
2164                 break;
2165         case MSR_IA32_MCG_STATUS:
2166                 data = vcpu->arch.mcg_status;
2167                 break;
2168         default:
2169                 if (msr >= MSR_IA32_MC0_CTL &&
2170                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2171                         u32 offset = msr - MSR_IA32_MC0_CTL;
2172                         data = vcpu->arch.mce_banks[offset];
2173                         break;
2174                 }
2175                 return 1;
2176         }
2177         *pdata = data;
2178         return 0;
2179 }
2180
2181 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2182 {
2183         switch (msr_info->index) {
2184         case MSR_IA32_PLATFORM_ID:
2185         case MSR_IA32_EBL_CR_POWERON:
2186         case MSR_IA32_DEBUGCTLMSR:
2187         case MSR_IA32_LASTBRANCHFROMIP:
2188         case MSR_IA32_LASTBRANCHTOIP:
2189         case MSR_IA32_LASTINTFROMIP:
2190         case MSR_IA32_LASTINTTOIP:
2191         case MSR_K8_SYSCFG:
2192         case MSR_K8_TSEG_ADDR:
2193         case MSR_K8_TSEG_MASK:
2194         case MSR_K7_HWCR:
2195         case MSR_VM_HSAVE_PA:
2196         case MSR_K8_INT_PENDING_MSG:
2197         case MSR_AMD64_NB_CFG:
2198         case MSR_FAM10H_MMIO_CONF_BASE:
2199         case MSR_AMD64_BU_CFG2:
2200                 msr_info->data = 0;
2201                 break;
2202         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2203         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2204         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2205         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2206                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2207                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2208                 msr_info->data = 0;
2209                 break;
2210         case MSR_IA32_UCODE_REV:
2211                 msr_info->data = 0x100000000ULL;
2212                 break;
2213         case MSR_MTRRcap:
2214         case 0x200 ... 0x2ff:
2215                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2216         case 0xcd: /* fsb frequency */
2217                 msr_info->data = 3;
2218                 break;
2219                 /*
2220                  * MSR_EBC_FREQUENCY_ID
2221                  * Conservative value valid for even the basic CPU models.
2222                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2223                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2224                  * and 266MHz for model 3, or 4. Set Core Clock
2225                  * Frequency to System Bus Frequency Ratio to 1 (bits
2226                  * 31:24) even though these are only valid for CPU
2227                  * models > 2, however guests may end up dividing or
2228                  * multiplying by zero otherwise.
2229                  */
2230         case MSR_EBC_FREQUENCY_ID:
2231                 msr_info->data = 1 << 24;
2232                 break;
2233         case MSR_IA32_APICBASE:
2234                 msr_info->data = kvm_get_apic_base(vcpu);
2235                 break;
2236         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2237                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2238                 break;
2239         case MSR_IA32_TSCDEADLINE:
2240                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2241                 break;
2242         case MSR_IA32_TSC_ADJUST:
2243                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2244                 break;
2245         case MSR_IA32_MISC_ENABLE:
2246                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2247                 break;
2248         case MSR_IA32_SMBASE:
2249                 if (!msr_info->host_initiated)
2250                         return 1;
2251                 msr_info->data = vcpu->arch.smbase;
2252                 break;
2253         case MSR_IA32_PERF_STATUS:
2254                 /* TSC increment by tick */
2255                 msr_info->data = 1000ULL;
2256                 /* CPU multiplier */
2257                 msr_info->data |= (((uint64_t)4ULL) << 40);
2258                 break;
2259         case MSR_EFER:
2260                 msr_info->data = vcpu->arch.efer;
2261                 break;
2262         case MSR_KVM_WALL_CLOCK:
2263         case MSR_KVM_WALL_CLOCK_NEW:
2264                 msr_info->data = vcpu->kvm->arch.wall_clock;
2265                 break;
2266         case MSR_KVM_SYSTEM_TIME:
2267         case MSR_KVM_SYSTEM_TIME_NEW:
2268                 msr_info->data = vcpu->arch.time;
2269                 break;
2270         case MSR_KVM_ASYNC_PF_EN:
2271                 msr_info->data = vcpu->arch.apf.msr_val;
2272                 break;
2273         case MSR_KVM_STEAL_TIME:
2274                 msr_info->data = vcpu->arch.st.msr_val;
2275                 break;
2276         case MSR_KVM_PV_EOI_EN:
2277                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2278                 break;
2279         case MSR_IA32_P5_MC_ADDR:
2280         case MSR_IA32_P5_MC_TYPE:
2281         case MSR_IA32_MCG_CAP:
2282         case MSR_IA32_MCG_CTL:
2283         case MSR_IA32_MCG_STATUS:
2284         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2285                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2286         case MSR_K7_CLK_CTL:
2287                 /*
2288                  * Provide expected ramp-up count for K7. All other
2289                  * are set to zero, indicating minimum divisors for
2290                  * every field.
2291                  *
2292                  * This prevents guest kernels on AMD host with CPU
2293                  * type 6, model 8 and higher from exploding due to
2294                  * the rdmsr failing.
2295                  */
2296                 msr_info->data = 0x20000000;
2297                 break;
2298         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2299         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2300         case HV_X64_MSR_CRASH_CTL:
2301                 return kvm_hv_get_msr_common(vcpu,
2302                                              msr_info->index, &msr_info->data);
2303                 break;
2304         case MSR_IA32_BBL_CR_CTL3:
2305                 /* This legacy MSR exists but isn't fully documented in current
2306                  * silicon.  It is however accessed by winxp in very narrow
2307                  * scenarios where it sets bit #19, itself documented as
2308                  * a "reserved" bit.  Best effort attempt to source coherent
2309                  * read data here should the balance of the register be
2310                  * interpreted by the guest:
2311                  *
2312                  * L2 cache control register 3: 64GB range, 256KB size,
2313                  * enabled, latency 0x1, configured
2314                  */
2315                 msr_info->data = 0xbe702111;
2316                 break;
2317         case MSR_AMD64_OSVW_ID_LENGTH:
2318                 if (!guest_cpuid_has_osvw(vcpu))
2319                         return 1;
2320                 msr_info->data = vcpu->arch.osvw.length;
2321                 break;
2322         case MSR_AMD64_OSVW_STATUS:
2323                 if (!guest_cpuid_has_osvw(vcpu))
2324                         return 1;
2325                 msr_info->data = vcpu->arch.osvw.status;
2326                 break;
2327         default:
2328                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2329                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2330                 if (!ignore_msrs) {
2331                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2332                         return 1;
2333                 } else {
2334                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2335                         msr_info->data = 0;
2336                 }
2337                 break;
2338         }
2339         return 0;
2340 }
2341 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2342
2343 /*
2344  * Read or write a bunch of msrs. All parameters are kernel addresses.
2345  *
2346  * @return number of msrs set successfully.
2347  */
2348 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2349                     struct kvm_msr_entry *entries,
2350                     int (*do_msr)(struct kvm_vcpu *vcpu,
2351                                   unsigned index, u64 *data))
2352 {
2353         int i, idx;
2354
2355         idx = srcu_read_lock(&vcpu->kvm->srcu);
2356         for (i = 0; i < msrs->nmsrs; ++i)
2357                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2358                         break;
2359         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2360
2361         return i;
2362 }
2363
2364 /*
2365  * Read or write a bunch of msrs. Parameters are user addresses.
2366  *
2367  * @return number of msrs set successfully.
2368  */
2369 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2370                   int (*do_msr)(struct kvm_vcpu *vcpu,
2371                                 unsigned index, u64 *data),
2372                   int writeback)
2373 {
2374         struct kvm_msrs msrs;
2375         struct kvm_msr_entry *entries;
2376         int r, n;
2377         unsigned size;
2378
2379         r = -EFAULT;
2380         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2381                 goto out;
2382
2383         r = -E2BIG;
2384         if (msrs.nmsrs >= MAX_IO_MSRS)
2385                 goto out;
2386
2387         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2388         entries = memdup_user(user_msrs->entries, size);
2389         if (IS_ERR(entries)) {
2390                 r = PTR_ERR(entries);
2391                 goto out;
2392         }
2393
2394         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2395         if (r < 0)
2396                 goto out_free;
2397
2398         r = -EFAULT;
2399         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2400                 goto out_free;
2401
2402         r = n;
2403
2404 out_free:
2405         kfree(entries);
2406 out:
2407         return r;
2408 }
2409
2410 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2411 {
2412         int r;
2413
2414         switch (ext) {
2415         case KVM_CAP_IRQCHIP:
2416         case KVM_CAP_HLT:
2417         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2418         case KVM_CAP_SET_TSS_ADDR:
2419         case KVM_CAP_EXT_CPUID:
2420         case KVM_CAP_EXT_EMUL_CPUID:
2421         case KVM_CAP_CLOCKSOURCE:
2422         case KVM_CAP_PIT:
2423         case KVM_CAP_NOP_IO_DELAY:
2424         case KVM_CAP_MP_STATE:
2425         case KVM_CAP_SYNC_MMU:
2426         case KVM_CAP_USER_NMI:
2427         case KVM_CAP_REINJECT_CONTROL:
2428         case KVM_CAP_IRQ_INJECT_STATUS:
2429         case KVM_CAP_IOEVENTFD:
2430         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2431         case KVM_CAP_PIT2:
2432         case KVM_CAP_PIT_STATE2:
2433         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2434         case KVM_CAP_XEN_HVM:
2435         case KVM_CAP_ADJUST_CLOCK:
2436         case KVM_CAP_VCPU_EVENTS:
2437         case KVM_CAP_HYPERV:
2438         case KVM_CAP_HYPERV_VAPIC:
2439         case KVM_CAP_HYPERV_SPIN:
2440         case KVM_CAP_PCI_SEGMENT:
2441         case KVM_CAP_DEBUGREGS:
2442         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2443         case KVM_CAP_XSAVE:
2444         case KVM_CAP_ASYNC_PF:
2445         case KVM_CAP_GET_TSC_KHZ:
2446         case KVM_CAP_KVMCLOCK_CTRL:
2447         case KVM_CAP_READONLY_MEM:
2448         case KVM_CAP_HYPERV_TIME:
2449         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2450         case KVM_CAP_TSC_DEADLINE_TIMER:
2451         case KVM_CAP_ENABLE_CAP_VM:
2452         case KVM_CAP_DISABLE_QUIRKS:
2453         case KVM_CAP_SET_BOOT_CPU_ID:
2454         case KVM_CAP_SPLIT_IRQCHIP:
2455 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2456         case KVM_CAP_ASSIGN_DEV_IRQ:
2457         case KVM_CAP_PCI_2_3:
2458 #endif
2459                 r = 1;
2460                 break;
2461         case KVM_CAP_X86_SMM:
2462                 /* SMBASE is usually relocated above 1M on modern chipsets,
2463                  * and SMM handlers might indeed rely on 4G segment limits,
2464                  * so do not report SMM to be available if real mode is
2465                  * emulated via vm86 mode.  Still, do not go to great lengths
2466                  * to avoid userspace's usage of the feature, because it is a
2467                  * fringe case that is not enabled except via specific settings
2468                  * of the module parameters.
2469                  */
2470                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2471                 break;
2472         case KVM_CAP_COALESCED_MMIO:
2473                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2474                 break;
2475         case KVM_CAP_VAPIC:
2476                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2477                 break;
2478         case KVM_CAP_NR_VCPUS:
2479                 r = KVM_SOFT_MAX_VCPUS;
2480                 break;
2481         case KVM_CAP_MAX_VCPUS:
2482                 r = KVM_MAX_VCPUS;
2483                 break;
2484         case KVM_CAP_NR_MEMSLOTS:
2485                 r = KVM_USER_MEM_SLOTS;
2486                 break;
2487         case KVM_CAP_PV_MMU:    /* obsolete */
2488                 r = 0;
2489                 break;
2490 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2491         case KVM_CAP_IOMMU:
2492                 r = iommu_present(&pci_bus_type);
2493                 break;
2494 #endif
2495         case KVM_CAP_MCE:
2496                 r = KVM_MAX_MCE_BANKS;
2497                 break;
2498         case KVM_CAP_XCRS:
2499                 r = cpu_has_xsave;
2500                 break;
2501         case KVM_CAP_TSC_CONTROL:
2502                 r = kvm_has_tsc_control;
2503                 break;
2504         default:
2505                 r = 0;
2506                 break;
2507         }
2508         return r;
2509
2510 }
2511
2512 long kvm_arch_dev_ioctl(struct file *filp,
2513                         unsigned int ioctl, unsigned long arg)
2514 {
2515         void __user *argp = (void __user *)arg;
2516         long r;
2517
2518         switch (ioctl) {
2519         case KVM_GET_MSR_INDEX_LIST: {
2520                 struct kvm_msr_list __user *user_msr_list = argp;
2521                 struct kvm_msr_list msr_list;
2522                 unsigned n;
2523
2524                 r = -EFAULT;
2525                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2526                         goto out;
2527                 n = msr_list.nmsrs;
2528                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2529                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2530                         goto out;
2531                 r = -E2BIG;
2532                 if (n < msr_list.nmsrs)
2533                         goto out;
2534                 r = -EFAULT;
2535                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2536                                  num_msrs_to_save * sizeof(u32)))
2537                         goto out;
2538                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2539                                  &emulated_msrs,
2540                                  num_emulated_msrs * sizeof(u32)))
2541                         goto out;
2542                 r = 0;
2543                 break;
2544         }
2545         case KVM_GET_SUPPORTED_CPUID:
2546         case KVM_GET_EMULATED_CPUID: {
2547                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2548                 struct kvm_cpuid2 cpuid;
2549
2550                 r = -EFAULT;
2551                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2552                         goto out;
2553
2554                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2555                                             ioctl);
2556                 if (r)
2557                         goto out;
2558
2559                 r = -EFAULT;
2560                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2561                         goto out;
2562                 r = 0;
2563                 break;
2564         }
2565         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2566                 u64 mce_cap;
2567
2568                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2569                 r = -EFAULT;
2570                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2571                         goto out;
2572                 r = 0;
2573                 break;
2574         }
2575         default:
2576                 r = -EINVAL;
2577         }
2578 out:
2579         return r;
2580 }
2581
2582 static void wbinvd_ipi(void *garbage)
2583 {
2584         wbinvd();
2585 }
2586
2587 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2588 {
2589         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2590 }
2591
2592 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2593 {
2594         /* Address WBINVD may be executed by guest */
2595         if (need_emulate_wbinvd(vcpu)) {
2596                 if (kvm_x86_ops->has_wbinvd_exit())
2597                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2598                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2599                         smp_call_function_single(vcpu->cpu,
2600                                         wbinvd_ipi, NULL, 1);
2601         }
2602
2603         kvm_x86_ops->vcpu_load(vcpu, cpu);
2604
2605         /* Apply any externally detected TSC adjustments (due to suspend) */
2606         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2607                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2608                 vcpu->arch.tsc_offset_adjustment = 0;
2609                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2610         }
2611
2612         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2613                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2614                                 rdtsc() - vcpu->arch.last_host_tsc;
2615                 if (tsc_delta < 0)
2616                         mark_tsc_unstable("KVM discovered backwards TSC");
2617                 if (check_tsc_unstable()) {
2618                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2619                                                 vcpu->arch.last_guest_tsc);
2620                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2621                         vcpu->arch.tsc_catchup = 1;
2622                 }
2623                 /*
2624                  * On a host with synchronized TSC, there is no need to update
2625                  * kvmclock on vcpu->cpu migration
2626                  */
2627                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2628                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2629                 if (vcpu->cpu != cpu)
2630                         kvm_migrate_timers(vcpu);
2631                 vcpu->cpu = cpu;
2632         }
2633
2634         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2635 }
2636
2637 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2638 {
2639         kvm_x86_ops->vcpu_put(vcpu);
2640         kvm_put_guest_fpu(vcpu);
2641         vcpu->arch.last_host_tsc = rdtsc();
2642 }
2643
2644 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2645                                     struct kvm_lapic_state *s)
2646 {
2647         kvm_x86_ops->sync_pir_to_irr(vcpu);
2648         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2649
2650         return 0;
2651 }
2652
2653 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2654                                     struct kvm_lapic_state *s)
2655 {
2656         kvm_apic_post_state_restore(vcpu, s);
2657         update_cr8_intercept(vcpu);
2658
2659         return 0;
2660 }
2661
2662 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2663                                     struct kvm_interrupt *irq)
2664 {
2665         if (irq->irq >= KVM_NR_INTERRUPTS)
2666                 return -EINVAL;
2667
2668         if (!irqchip_in_kernel(vcpu->kvm)) {
2669                 kvm_queue_interrupt(vcpu, irq->irq, false);
2670                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2671                 return 0;
2672         }
2673
2674         /*
2675          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2676          * fail for in-kernel 8259.
2677          */
2678         if (pic_in_kernel(vcpu->kvm))
2679                 return -ENXIO;
2680
2681         if (vcpu->arch.pending_external_vector != -1)
2682                 return -EEXIST;
2683
2684         vcpu->arch.pending_external_vector = irq->irq;
2685         return 0;
2686 }
2687
2688 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2689 {
2690         kvm_inject_nmi(vcpu);
2691
2692         return 0;
2693 }
2694
2695 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2696 {
2697         kvm_make_request(KVM_REQ_SMI, vcpu);
2698
2699         return 0;
2700 }
2701
2702 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2703                                            struct kvm_tpr_access_ctl *tac)
2704 {
2705         if (tac->flags)
2706                 return -EINVAL;
2707         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2708         return 0;
2709 }
2710
2711 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2712                                         u64 mcg_cap)
2713 {
2714         int r;
2715         unsigned bank_num = mcg_cap & 0xff, bank;
2716
2717         r = -EINVAL;
2718         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2719                 goto out;
2720         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2721                 goto out;
2722         r = 0;
2723         vcpu->arch.mcg_cap = mcg_cap;
2724         /* Init IA32_MCG_CTL to all 1s */
2725         if (mcg_cap & MCG_CTL_P)
2726                 vcpu->arch.mcg_ctl = ~(u64)0;
2727         /* Init IA32_MCi_CTL to all 1s */
2728         for (bank = 0; bank < bank_num; bank++)
2729                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2730 out:
2731         return r;
2732 }
2733
2734 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2735                                       struct kvm_x86_mce *mce)
2736 {
2737         u64 mcg_cap = vcpu->arch.mcg_cap;
2738         unsigned bank_num = mcg_cap & 0xff;
2739         u64 *banks = vcpu->arch.mce_banks;
2740
2741         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2742                 return -EINVAL;
2743         /*
2744          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2745          * reporting is disabled
2746          */
2747         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2748             vcpu->arch.mcg_ctl != ~(u64)0)
2749                 return 0;
2750         banks += 4 * mce->bank;
2751         /*
2752          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2753          * reporting is disabled for the bank
2754          */
2755         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2756                 return 0;
2757         if (mce->status & MCI_STATUS_UC) {
2758                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2759                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2760                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2761                         return 0;
2762                 }
2763                 if (banks[1] & MCI_STATUS_VAL)
2764                         mce->status |= MCI_STATUS_OVER;
2765                 banks[2] = mce->addr;
2766                 banks[3] = mce->misc;
2767                 vcpu->arch.mcg_status = mce->mcg_status;
2768                 banks[1] = mce->status;
2769                 kvm_queue_exception(vcpu, MC_VECTOR);
2770         } else if (!(banks[1] & MCI_STATUS_VAL)
2771                    || !(banks[1] & MCI_STATUS_UC)) {
2772                 if (banks[1] & MCI_STATUS_VAL)
2773                         mce->status |= MCI_STATUS_OVER;
2774                 banks[2] = mce->addr;
2775                 banks[3] = mce->misc;
2776                 banks[1] = mce->status;
2777         } else
2778                 banks[1] |= MCI_STATUS_OVER;
2779         return 0;
2780 }
2781
2782 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2783                                                struct kvm_vcpu_events *events)
2784 {
2785         process_nmi(vcpu);
2786         events->exception.injected =
2787                 vcpu->arch.exception.pending &&
2788                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2789         events->exception.nr = vcpu->arch.exception.nr;
2790         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2791         events->exception.pad = 0;
2792         events->exception.error_code = vcpu->arch.exception.error_code;
2793
2794         events->interrupt.injected =
2795                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2796         events->interrupt.nr = vcpu->arch.interrupt.nr;
2797         events->interrupt.soft = 0;
2798         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2799
2800         events->nmi.injected = vcpu->arch.nmi_injected;
2801         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2802         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2803         events->nmi.pad = 0;
2804
2805         events->sipi_vector = 0; /* never valid when reporting to user space */
2806
2807         events->smi.smm = is_smm(vcpu);
2808         events->smi.pending = vcpu->arch.smi_pending;
2809         events->smi.smm_inside_nmi =
2810                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2811         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2812
2813         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2814                          | KVM_VCPUEVENT_VALID_SHADOW
2815                          | KVM_VCPUEVENT_VALID_SMM);
2816         memset(&events->reserved, 0, sizeof(events->reserved));
2817 }
2818
2819 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2820                                               struct kvm_vcpu_events *events)
2821 {
2822         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2823                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2824                               | KVM_VCPUEVENT_VALID_SHADOW
2825                               | KVM_VCPUEVENT_VALID_SMM))
2826                 return -EINVAL;
2827
2828         process_nmi(vcpu);
2829         vcpu->arch.exception.pending = events->exception.injected;
2830         vcpu->arch.exception.nr = events->exception.nr;
2831         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2832         vcpu->arch.exception.error_code = events->exception.error_code;
2833
2834         vcpu->arch.interrupt.pending = events->interrupt.injected;
2835         vcpu->arch.interrupt.nr = events->interrupt.nr;
2836         vcpu->arch.interrupt.soft = events->interrupt.soft;
2837         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2838                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2839                                                   events->interrupt.shadow);
2840
2841         vcpu->arch.nmi_injected = events->nmi.injected;
2842         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2843                 vcpu->arch.nmi_pending = events->nmi.pending;
2844         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2845
2846         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2847             kvm_vcpu_has_lapic(vcpu))
2848                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2849
2850         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2851                 if (events->smi.smm)
2852                         vcpu->arch.hflags |= HF_SMM_MASK;
2853                 else
2854                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2855                 vcpu->arch.smi_pending = events->smi.pending;
2856                 if (events->smi.smm_inside_nmi)
2857                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2858                 else
2859                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2860                 if (kvm_vcpu_has_lapic(vcpu)) {
2861                         if (events->smi.latched_init)
2862                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2863                         else
2864                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2865                 }
2866         }
2867
2868         kvm_make_request(KVM_REQ_EVENT, vcpu);
2869
2870         return 0;
2871 }
2872
2873 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2874                                              struct kvm_debugregs *dbgregs)
2875 {
2876         unsigned long val;
2877
2878         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2879         kvm_get_dr(vcpu, 6, &val);
2880         dbgregs->dr6 = val;
2881         dbgregs->dr7 = vcpu->arch.dr7;
2882         dbgregs->flags = 0;
2883         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2884 }
2885
2886 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2887                                             struct kvm_debugregs *dbgregs)
2888 {
2889         if (dbgregs->flags)
2890                 return -EINVAL;
2891
2892         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2893         kvm_update_dr0123(vcpu);
2894         vcpu->arch.dr6 = dbgregs->dr6;
2895         kvm_update_dr6(vcpu);
2896         vcpu->arch.dr7 = dbgregs->dr7;
2897         kvm_update_dr7(vcpu);
2898
2899         return 0;
2900 }
2901
2902 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
2903
2904 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
2905 {
2906         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2907         u64 xstate_bv = xsave->header.xfeatures;
2908         u64 valid;
2909
2910         /*
2911          * Copy legacy XSAVE area, to avoid complications with CPUID
2912          * leaves 0 and 1 in the loop below.
2913          */
2914         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
2915
2916         /* Set XSTATE_BV */
2917         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
2918
2919         /*
2920          * Copy each region from the possibly compacted offset to the
2921          * non-compacted offset.
2922          */
2923         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
2924         while (valid) {
2925                 u64 feature = valid & -valid;
2926                 int index = fls64(feature) - 1;
2927                 void *src = get_xsave_addr(xsave, feature);
2928
2929                 if (src) {
2930                         u32 size, offset, ecx, edx;
2931                         cpuid_count(XSTATE_CPUID, index,
2932                                     &size, &offset, &ecx, &edx);
2933                         memcpy(dest + offset, src, size);
2934                 }
2935
2936                 valid -= feature;
2937         }
2938 }
2939
2940 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
2941 {
2942         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2943         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
2944         u64 valid;
2945
2946         /*
2947          * Copy legacy XSAVE area, to avoid complications with CPUID
2948          * leaves 0 and 1 in the loop below.
2949          */
2950         memcpy(xsave, src, XSAVE_HDR_OFFSET);
2951
2952         /* Set XSTATE_BV and possibly XCOMP_BV.  */
2953         xsave->header.xfeatures = xstate_bv;
2954         if (cpu_has_xsaves)
2955                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
2956
2957         /*
2958          * Copy each region from the non-compacted offset to the
2959          * possibly compacted offset.
2960          */
2961         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
2962         while (valid) {
2963                 u64 feature = valid & -valid;
2964                 int index = fls64(feature) - 1;
2965                 void *dest = get_xsave_addr(xsave, feature);
2966
2967                 if (dest) {
2968                         u32 size, offset, ecx, edx;
2969                         cpuid_count(XSTATE_CPUID, index,
2970                                     &size, &offset, &ecx, &edx);
2971                         memcpy(dest, src + offset, size);
2972                 }
2973
2974                 valid -= feature;
2975         }
2976 }
2977
2978 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2979                                          struct kvm_xsave *guest_xsave)
2980 {
2981         if (cpu_has_xsave) {
2982                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
2983                 fill_xsave((u8 *) guest_xsave->region, vcpu);
2984         } else {
2985                 memcpy(guest_xsave->region,
2986                         &vcpu->arch.guest_fpu.state.fxsave,
2987                         sizeof(struct fxregs_state));
2988                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2989                         XFEATURE_MASK_FPSSE;
2990         }
2991 }
2992
2993 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2994                                         struct kvm_xsave *guest_xsave)
2995 {
2996         u64 xstate_bv =
2997                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2998
2999         if (cpu_has_xsave) {
3000                 /*
3001                  * Here we allow setting states that are not present in
3002                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3003                  * with old userspace.
3004                  */
3005                 if (xstate_bv & ~kvm_supported_xcr0())
3006                         return -EINVAL;
3007                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3008         } else {
3009                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3010                         return -EINVAL;
3011                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3012                         guest_xsave->region, sizeof(struct fxregs_state));
3013         }
3014         return 0;
3015 }
3016
3017 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3018                                         struct kvm_xcrs *guest_xcrs)
3019 {
3020         if (!cpu_has_xsave) {
3021                 guest_xcrs->nr_xcrs = 0;
3022                 return;
3023         }
3024
3025         guest_xcrs->nr_xcrs = 1;
3026         guest_xcrs->flags = 0;
3027         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3028         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3029 }
3030
3031 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3032                                        struct kvm_xcrs *guest_xcrs)
3033 {
3034         int i, r = 0;
3035
3036         if (!cpu_has_xsave)
3037                 return -EINVAL;
3038
3039         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3040                 return -EINVAL;
3041
3042         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3043                 /* Only support XCR0 currently */
3044                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3045                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3046                                 guest_xcrs->xcrs[i].value);
3047                         break;
3048                 }
3049         if (r)
3050                 r = -EINVAL;
3051         return r;
3052 }
3053
3054 /*
3055  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3056  * stopped by the hypervisor.  This function will be called from the host only.
3057  * EINVAL is returned when the host attempts to set the flag for a guest that
3058  * does not support pv clocks.
3059  */
3060 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3061 {
3062         if (!vcpu->arch.pv_time_enabled)
3063                 return -EINVAL;
3064         vcpu->arch.pvclock_set_guest_stopped_request = true;
3065         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3066         return 0;
3067 }
3068
3069 long kvm_arch_vcpu_ioctl(struct file *filp,
3070                          unsigned int ioctl, unsigned long arg)
3071 {
3072         struct kvm_vcpu *vcpu = filp->private_data;
3073         void __user *argp = (void __user *)arg;
3074         int r;
3075         union {
3076                 struct kvm_lapic_state *lapic;
3077                 struct kvm_xsave *xsave;
3078                 struct kvm_xcrs *xcrs;
3079                 void *buffer;
3080         } u;
3081
3082         u.buffer = NULL;
3083         switch (ioctl) {
3084         case KVM_GET_LAPIC: {
3085                 r = -EINVAL;
3086                 if (!vcpu->arch.apic)
3087                         goto out;
3088                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3089
3090                 r = -ENOMEM;
3091                 if (!u.lapic)
3092                         goto out;
3093                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3094                 if (r)
3095                         goto out;
3096                 r = -EFAULT;
3097                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3098                         goto out;
3099                 r = 0;
3100                 break;
3101         }
3102         case KVM_SET_LAPIC: {
3103                 r = -EINVAL;
3104                 if (!vcpu->arch.apic)
3105                         goto out;
3106                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3107                 if (IS_ERR(u.lapic))
3108                         return PTR_ERR(u.lapic);
3109
3110                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3111                 break;
3112         }
3113         case KVM_INTERRUPT: {
3114                 struct kvm_interrupt irq;
3115
3116                 r = -EFAULT;
3117                 if (copy_from_user(&irq, argp, sizeof irq))
3118                         goto out;
3119                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3120                 break;
3121         }
3122         case KVM_NMI: {
3123                 r = kvm_vcpu_ioctl_nmi(vcpu);
3124                 break;
3125         }
3126         case KVM_SMI: {
3127                 r = kvm_vcpu_ioctl_smi(vcpu);
3128                 break;
3129         }
3130         case KVM_SET_CPUID: {
3131                 struct kvm_cpuid __user *cpuid_arg = argp;
3132                 struct kvm_cpuid cpuid;
3133
3134                 r = -EFAULT;
3135                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3136                         goto out;
3137                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3138                 break;
3139         }
3140         case KVM_SET_CPUID2: {
3141                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3142                 struct kvm_cpuid2 cpuid;
3143
3144                 r = -EFAULT;
3145                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3146                         goto out;
3147                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3148                                               cpuid_arg->entries);
3149                 break;
3150         }
3151         case KVM_GET_CPUID2: {
3152                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3153                 struct kvm_cpuid2 cpuid;
3154
3155                 r = -EFAULT;
3156                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3157                         goto out;
3158                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3159                                               cpuid_arg->entries);
3160                 if (r)
3161                         goto out;
3162                 r = -EFAULT;
3163                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3164                         goto out;
3165                 r = 0;
3166                 break;
3167         }
3168         case KVM_GET_MSRS:
3169                 r = msr_io(vcpu, argp, do_get_msr, 1);
3170                 break;
3171         case KVM_SET_MSRS:
3172                 r = msr_io(vcpu, argp, do_set_msr, 0);
3173                 break;
3174         case KVM_TPR_ACCESS_REPORTING: {
3175                 struct kvm_tpr_access_ctl tac;
3176
3177                 r = -EFAULT;
3178                 if (copy_from_user(&tac, argp, sizeof tac))
3179                         goto out;
3180                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3181                 if (r)
3182                         goto out;
3183                 r = -EFAULT;
3184                 if (copy_to_user(argp, &tac, sizeof tac))
3185                         goto out;
3186                 r = 0;
3187                 break;
3188         };
3189         case KVM_SET_VAPIC_ADDR: {
3190                 struct kvm_vapic_addr va;
3191
3192                 r = -EINVAL;
3193                 if (!lapic_in_kernel(vcpu))
3194                         goto out;
3195                 r = -EFAULT;
3196                 if (copy_from_user(&va, argp, sizeof va))
3197                         goto out;
3198                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3199                 break;
3200         }
3201         case KVM_X86_SETUP_MCE: {
3202                 u64 mcg_cap;
3203
3204                 r = -EFAULT;
3205                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3206                         goto out;
3207                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3208                 break;
3209         }
3210         case KVM_X86_SET_MCE: {
3211                 struct kvm_x86_mce mce;
3212
3213                 r = -EFAULT;
3214                 if (copy_from_user(&mce, argp, sizeof mce))
3215                         goto out;
3216                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3217                 break;
3218         }
3219         case KVM_GET_VCPU_EVENTS: {
3220                 struct kvm_vcpu_events events;
3221
3222                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3223
3224                 r = -EFAULT;
3225                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3226                         break;
3227                 r = 0;
3228                 break;
3229         }
3230         case KVM_SET_VCPU_EVENTS: {
3231                 struct kvm_vcpu_events events;
3232
3233                 r = -EFAULT;
3234                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3235                         break;
3236
3237                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3238                 break;
3239         }
3240         case KVM_GET_DEBUGREGS: {
3241                 struct kvm_debugregs dbgregs;
3242
3243                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3244
3245                 r = -EFAULT;
3246                 if (copy_to_user(argp, &dbgregs,
3247                                  sizeof(struct kvm_debugregs)))
3248                         break;
3249                 r = 0;
3250                 break;
3251         }
3252         case KVM_SET_DEBUGREGS: {
3253                 struct kvm_debugregs dbgregs;
3254
3255                 r = -EFAULT;
3256                 if (copy_from_user(&dbgregs, argp,
3257                                    sizeof(struct kvm_debugregs)))
3258                         break;
3259
3260                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3261                 break;
3262         }
3263         case KVM_GET_XSAVE: {
3264                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3265                 r = -ENOMEM;
3266                 if (!u.xsave)
3267                         break;
3268
3269                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3270
3271                 r = -EFAULT;
3272                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3273                         break;
3274                 r = 0;
3275                 break;
3276         }
3277         case KVM_SET_XSAVE: {
3278                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3279                 if (IS_ERR(u.xsave))
3280                         return PTR_ERR(u.xsave);
3281
3282                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3283                 break;
3284         }
3285         case KVM_GET_XCRS: {
3286                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3287                 r = -ENOMEM;
3288                 if (!u.xcrs)
3289                         break;
3290
3291                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3292
3293                 r = -EFAULT;
3294                 if (copy_to_user(argp, u.xcrs,
3295                                  sizeof(struct kvm_xcrs)))
3296                         break;
3297                 r = 0;
3298                 break;
3299         }
3300         case KVM_SET_XCRS: {
3301                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3302                 if (IS_ERR(u.xcrs))
3303                         return PTR_ERR(u.xcrs);
3304
3305                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3306                 break;
3307         }
3308         case KVM_SET_TSC_KHZ: {
3309                 u32 user_tsc_khz;
3310
3311                 r = -EINVAL;
3312                 user_tsc_khz = (u32)arg;
3313
3314                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3315                         goto out;
3316
3317                 if (user_tsc_khz == 0)
3318                         user_tsc_khz = tsc_khz;
3319
3320                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3321
3322                 r = 0;
3323                 goto out;
3324         }
3325         case KVM_GET_TSC_KHZ: {
3326                 r = vcpu->arch.virtual_tsc_khz;
3327                 goto out;
3328         }
3329         case KVM_KVMCLOCK_CTRL: {
3330                 r = kvm_set_guest_paused(vcpu);
3331                 goto out;
3332         }
3333         default:
3334                 r = -EINVAL;
3335         }
3336 out:
3337         kfree(u.buffer);
3338         return r;
3339 }
3340
3341 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3342 {
3343         return VM_FAULT_SIGBUS;
3344 }
3345
3346 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3347 {
3348         int ret;
3349
3350         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3351                 return -EINVAL;
3352         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3353         return ret;
3354 }
3355
3356 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3357                                               u64 ident_addr)
3358 {
3359         kvm->arch.ept_identity_map_addr = ident_addr;
3360         return 0;
3361 }
3362
3363 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3364                                           u32 kvm_nr_mmu_pages)
3365 {
3366         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3367                 return -EINVAL;
3368
3369         mutex_lock(&kvm->slots_lock);
3370
3371         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3372         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3373
3374         mutex_unlock(&kvm->slots_lock);
3375         return 0;
3376 }
3377
3378 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3379 {
3380         return kvm->arch.n_max_mmu_pages;
3381 }
3382
3383 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3384 {
3385         int r;
3386
3387         r = 0;
3388         switch (chip->chip_id) {
3389         case KVM_IRQCHIP_PIC_MASTER:
3390                 memcpy(&chip->chip.pic,
3391                         &pic_irqchip(kvm)->pics[0],
3392                         sizeof(struct kvm_pic_state));
3393                 break;
3394         case KVM_IRQCHIP_PIC_SLAVE:
3395                 memcpy(&chip->chip.pic,
3396                         &pic_irqchip(kvm)->pics[1],
3397                         sizeof(struct kvm_pic_state));
3398                 break;
3399         case KVM_IRQCHIP_IOAPIC:
3400                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3401                 break;
3402         default:
3403                 r = -EINVAL;
3404                 break;
3405         }
3406         return r;
3407 }
3408
3409 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3410 {
3411         int r;
3412
3413         r = 0;
3414         switch (chip->chip_id) {
3415         case KVM_IRQCHIP_PIC_MASTER:
3416                 spin_lock(&pic_irqchip(kvm)->lock);
3417                 memcpy(&pic_irqchip(kvm)->pics[0],
3418                         &chip->chip.pic,
3419                         sizeof(struct kvm_pic_state));
3420                 spin_unlock(&pic_irqchip(kvm)->lock);
3421                 break;
3422         case KVM_IRQCHIP_PIC_SLAVE:
3423                 spin_lock(&pic_irqchip(kvm)->lock);
3424                 memcpy(&pic_irqchip(kvm)->pics[1],
3425                         &chip->chip.pic,
3426                         sizeof(struct kvm_pic_state));
3427                 spin_unlock(&pic_irqchip(kvm)->lock);
3428                 break;
3429         case KVM_IRQCHIP_IOAPIC:
3430                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3431                 break;
3432         default:
3433                 r = -EINVAL;
3434                 break;
3435         }
3436         kvm_pic_update_irq(pic_irqchip(kvm));
3437         return r;
3438 }
3439
3440 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3441 {
3442         int r = 0;
3443
3444         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3445         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3446         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3447         return r;
3448 }
3449
3450 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3451 {
3452         int r = 0;
3453
3454         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3455         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3456         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3457         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3458         return r;
3459 }
3460
3461 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3462 {
3463         int r = 0;
3464
3465         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3466         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3467                 sizeof(ps->channels));
3468         ps->flags = kvm->arch.vpit->pit_state.flags;
3469         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3470         memset(&ps->reserved, 0, sizeof(ps->reserved));
3471         return r;
3472 }
3473
3474 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3475 {
3476         int r = 0, start = 0;
3477         u32 prev_legacy, cur_legacy;
3478         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3479         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3480         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3481         if (!prev_legacy && cur_legacy)
3482                 start = 1;
3483         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3484                sizeof(kvm->arch.vpit->pit_state.channels));
3485         kvm->arch.vpit->pit_state.flags = ps->flags;
3486         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3487         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3488         return r;
3489 }
3490
3491 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3492                                  struct kvm_reinject_control *control)
3493 {
3494         if (!kvm->arch.vpit)
3495                 return -ENXIO;
3496         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3497         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3498         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3499         return 0;
3500 }
3501
3502 /**
3503  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3504  * @kvm: kvm instance
3505  * @log: slot id and address to which we copy the log
3506  *
3507  * Steps 1-4 below provide general overview of dirty page logging. See
3508  * kvm_get_dirty_log_protect() function description for additional details.
3509  *
3510  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3511  * always flush the TLB (step 4) even if previous step failed  and the dirty
3512  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3513  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3514  * writes will be marked dirty for next log read.
3515  *
3516  *   1. Take a snapshot of the bit and clear it if needed.
3517  *   2. Write protect the corresponding page.
3518  *   3. Copy the snapshot to the userspace.
3519  *   4. Flush TLB's if needed.
3520  */
3521 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3522 {
3523         bool is_dirty = false;
3524         int r;
3525
3526         mutex_lock(&kvm->slots_lock);
3527
3528         /*
3529          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3530          */
3531         if (kvm_x86_ops->flush_log_dirty)
3532                 kvm_x86_ops->flush_log_dirty(kvm);
3533
3534         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3535
3536         /*
3537          * All the TLBs can be flushed out of mmu lock, see the comments in
3538          * kvm_mmu_slot_remove_write_access().
3539          */
3540         lockdep_assert_held(&kvm->slots_lock);
3541         if (is_dirty)
3542                 kvm_flush_remote_tlbs(kvm);
3543
3544         mutex_unlock(&kvm->slots_lock);
3545         return r;
3546 }
3547
3548 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3549                         bool line_status)
3550 {
3551         if (!irqchip_in_kernel(kvm))
3552                 return -ENXIO;
3553
3554         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3555                                         irq_event->irq, irq_event->level,
3556                                         line_status);
3557         return 0;
3558 }
3559
3560 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3561                                    struct kvm_enable_cap *cap)
3562 {
3563         int r;
3564
3565         if (cap->flags)
3566                 return -EINVAL;
3567
3568         switch (cap->cap) {
3569         case KVM_CAP_DISABLE_QUIRKS:
3570                 kvm->arch.disabled_quirks = cap->args[0];
3571                 r = 0;
3572                 break;
3573         case KVM_CAP_SPLIT_IRQCHIP: {
3574                 mutex_lock(&kvm->lock);
3575                 r = -EINVAL;
3576                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3577                         goto split_irqchip_unlock;
3578                 r = -EEXIST;
3579                 if (irqchip_in_kernel(kvm))
3580                         goto split_irqchip_unlock;
3581                 if (atomic_read(&kvm->online_vcpus))
3582                         goto split_irqchip_unlock;
3583                 r = kvm_setup_empty_irq_routing(kvm);
3584                 if (r)
3585                         goto split_irqchip_unlock;
3586                 /* Pairs with irqchip_in_kernel. */
3587                 smp_wmb();
3588                 kvm->arch.irqchip_split = true;
3589                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3590                 r = 0;
3591 split_irqchip_unlock:
3592                 mutex_unlock(&kvm->lock);
3593                 break;
3594         }
3595         default:
3596                 r = -EINVAL;
3597                 break;
3598         }
3599         return r;
3600 }
3601
3602 long kvm_arch_vm_ioctl(struct file *filp,
3603                        unsigned int ioctl, unsigned long arg)
3604 {
3605         struct kvm *kvm = filp->private_data;
3606         void __user *argp = (void __user *)arg;
3607         int r = -ENOTTY;
3608         /*
3609          * This union makes it completely explicit to gcc-3.x
3610          * that these two variables' stack usage should be
3611          * combined, not added together.
3612          */
3613         union {
3614                 struct kvm_pit_state ps;
3615                 struct kvm_pit_state2 ps2;
3616                 struct kvm_pit_config pit_config;
3617         } u;
3618
3619         switch (ioctl) {
3620         case KVM_SET_TSS_ADDR:
3621                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3622                 break;
3623         case KVM_SET_IDENTITY_MAP_ADDR: {
3624                 u64 ident_addr;
3625
3626                 r = -EFAULT;
3627                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3628                         goto out;
3629                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3630                 break;
3631         }
3632         case KVM_SET_NR_MMU_PAGES:
3633                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3634                 break;
3635         case KVM_GET_NR_MMU_PAGES:
3636                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3637                 break;
3638         case KVM_CREATE_IRQCHIP: {
3639                 struct kvm_pic *vpic;
3640
3641                 mutex_lock(&kvm->lock);
3642                 r = -EEXIST;
3643                 if (kvm->arch.vpic)
3644                         goto create_irqchip_unlock;
3645                 r = -EINVAL;
3646                 if (atomic_read(&kvm->online_vcpus))
3647                         goto create_irqchip_unlock;
3648                 r = -ENOMEM;
3649                 vpic = kvm_create_pic(kvm);
3650                 if (vpic) {
3651                         r = kvm_ioapic_init(kvm);
3652                         if (r) {
3653                                 mutex_lock(&kvm->slots_lock);
3654                                 kvm_destroy_pic(vpic);
3655                                 mutex_unlock(&kvm->slots_lock);
3656                                 goto create_irqchip_unlock;
3657                         }
3658                 } else
3659                         goto create_irqchip_unlock;
3660                 r = kvm_setup_default_irq_routing(kvm);
3661                 if (r) {
3662                         mutex_lock(&kvm->slots_lock);
3663                         mutex_lock(&kvm->irq_lock);
3664                         kvm_ioapic_destroy(kvm);
3665                         kvm_destroy_pic(vpic);
3666                         mutex_unlock(&kvm->irq_lock);
3667                         mutex_unlock(&kvm->slots_lock);
3668                         goto create_irqchip_unlock;
3669                 }
3670                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3671                 smp_wmb();
3672                 kvm->arch.vpic = vpic;
3673         create_irqchip_unlock:
3674                 mutex_unlock(&kvm->lock);
3675                 break;
3676         }
3677         case KVM_CREATE_PIT:
3678                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3679                 goto create_pit;
3680         case KVM_CREATE_PIT2:
3681                 r = -EFAULT;
3682                 if (copy_from_user(&u.pit_config, argp,
3683                                    sizeof(struct kvm_pit_config)))
3684                         goto out;
3685         create_pit:
3686                 mutex_lock(&kvm->slots_lock);
3687                 r = -EEXIST;
3688                 if (kvm->arch.vpit)
3689                         goto create_pit_unlock;
3690                 r = -ENOMEM;
3691                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3692                 if (kvm->arch.vpit)
3693                         r = 0;
3694         create_pit_unlock:
3695                 mutex_unlock(&kvm->slots_lock);
3696                 break;
3697         case KVM_GET_IRQCHIP: {
3698                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3699                 struct kvm_irqchip *chip;
3700
3701                 chip = memdup_user(argp, sizeof(*chip));
3702                 if (IS_ERR(chip)) {
3703                         r = PTR_ERR(chip);
3704                         goto out;
3705                 }
3706
3707                 r = -ENXIO;
3708                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3709                         goto get_irqchip_out;
3710                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3711                 if (r)
3712                         goto get_irqchip_out;
3713                 r = -EFAULT;
3714                 if (copy_to_user(argp, chip, sizeof *chip))
3715                         goto get_irqchip_out;
3716                 r = 0;
3717         get_irqchip_out:
3718                 kfree(chip);
3719                 break;
3720         }
3721         case KVM_SET_IRQCHIP: {
3722                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3723                 struct kvm_irqchip *chip;
3724
3725                 chip = memdup_user(argp, sizeof(*chip));
3726                 if (IS_ERR(chip)) {
3727                         r = PTR_ERR(chip);
3728                         goto out;
3729                 }
3730
3731                 r = -ENXIO;
3732                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3733                         goto set_irqchip_out;
3734                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3735                 if (r)
3736                         goto set_irqchip_out;
3737                 r = 0;
3738         set_irqchip_out:
3739                 kfree(chip);
3740                 break;
3741         }
3742         case KVM_GET_PIT: {
3743                 r = -EFAULT;
3744                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3745                         goto out;
3746                 r = -ENXIO;
3747                 if (!kvm->arch.vpit)
3748                         goto out;
3749                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3750                 if (r)
3751                         goto out;
3752                 r = -EFAULT;
3753                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3754                         goto out;
3755                 r = 0;
3756                 break;
3757         }
3758         case KVM_SET_PIT: {
3759                 r = -EFAULT;
3760                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3761                         goto out;
3762                 r = -ENXIO;
3763                 if (!kvm->arch.vpit)
3764                         goto out;
3765                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3766                 break;
3767         }
3768         case KVM_GET_PIT2: {
3769                 r = -ENXIO;
3770                 if (!kvm->arch.vpit)
3771                         goto out;
3772                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3773                 if (r)
3774                         goto out;
3775                 r = -EFAULT;
3776                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3777                         goto out;
3778                 r = 0;
3779                 break;
3780         }
3781         case KVM_SET_PIT2: {
3782                 r = -EFAULT;
3783                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3784                         goto out;
3785                 r = -ENXIO;
3786                 if (!kvm->arch.vpit)
3787                         goto out;
3788                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3789                 break;
3790         }
3791         case KVM_REINJECT_CONTROL: {
3792                 struct kvm_reinject_control control;
3793                 r =  -EFAULT;
3794                 if (copy_from_user(&control, argp, sizeof(control)))
3795                         goto out;
3796                 r = kvm_vm_ioctl_reinject(kvm, &control);
3797                 break;
3798         }
3799         case KVM_SET_BOOT_CPU_ID:
3800                 r = 0;
3801                 mutex_lock(&kvm->lock);
3802                 if (atomic_read(&kvm->online_vcpus) != 0)
3803                         r = -EBUSY;
3804                 else
3805                         kvm->arch.bsp_vcpu_id = arg;
3806                 mutex_unlock(&kvm->lock);
3807                 break;
3808         case KVM_XEN_HVM_CONFIG: {
3809                 r = -EFAULT;
3810                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3811                                    sizeof(struct kvm_xen_hvm_config)))
3812                         goto out;
3813                 r = -EINVAL;
3814                 if (kvm->arch.xen_hvm_config.flags)
3815                         goto out;
3816                 r = 0;
3817                 break;
3818         }
3819         case KVM_SET_CLOCK: {
3820                 struct kvm_clock_data user_ns;
3821                 u64 now_ns;
3822                 s64 delta;
3823
3824                 r = -EFAULT;
3825                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3826                         goto out;
3827
3828                 r = -EINVAL;
3829                 if (user_ns.flags)
3830                         goto out;
3831
3832                 r = 0;
3833                 local_irq_disable();
3834                 now_ns = get_kernel_ns();
3835                 delta = user_ns.clock - now_ns;
3836                 local_irq_enable();
3837                 kvm->arch.kvmclock_offset = delta;
3838                 kvm_gen_update_masterclock(kvm);
3839                 break;
3840         }
3841         case KVM_GET_CLOCK: {
3842                 struct kvm_clock_data user_ns;
3843                 u64 now_ns;
3844
3845                 local_irq_disable();
3846                 now_ns = get_kernel_ns();
3847                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3848                 local_irq_enable();
3849                 user_ns.flags = 0;
3850                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3851
3852                 r = -EFAULT;
3853                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3854                         goto out;
3855                 r = 0;
3856                 break;
3857         }
3858         case KVM_ENABLE_CAP: {
3859                 struct kvm_enable_cap cap;
3860
3861                 r = -EFAULT;
3862                 if (copy_from_user(&cap, argp, sizeof(cap)))
3863                         goto out;
3864                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3865                 break;
3866         }
3867         default:
3868                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3869         }
3870 out:
3871         return r;
3872 }
3873
3874 static void kvm_init_msr_list(void)
3875 {
3876         u32 dummy[2];
3877         unsigned i, j;
3878
3879         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
3880                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3881                         continue;
3882
3883                 /*
3884                  * Even MSRs that are valid in the host may not be exposed
3885                  * to the guests in some cases.  We could work around this
3886                  * in VMX with the generic MSR save/load machinery, but it
3887                  * is not really worthwhile since it will really only
3888                  * happen with nested virtualization.
3889                  */
3890                 switch (msrs_to_save[i]) {
3891                 case MSR_IA32_BNDCFGS:
3892                         if (!kvm_x86_ops->mpx_supported())
3893                                 continue;
3894                         break;
3895                 default:
3896                         break;
3897                 }
3898
3899                 if (j < i)
3900                         msrs_to_save[j] = msrs_to_save[i];
3901                 j++;
3902         }
3903         num_msrs_to_save = j;
3904
3905         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
3906                 switch (emulated_msrs[i]) {
3907                 case MSR_IA32_SMBASE:
3908                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
3909                                 continue;
3910                         break;
3911                 default:
3912                         break;
3913                 }
3914
3915                 if (j < i)
3916                         emulated_msrs[j] = emulated_msrs[i];
3917                 j++;
3918         }
3919         num_emulated_msrs = j;
3920 }
3921
3922 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3923                            const void *v)
3924 {
3925         int handled = 0;
3926         int n;
3927
3928         do {
3929                 n = min(len, 8);
3930                 if (!(vcpu->arch.apic &&
3931                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
3932                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
3933                         break;
3934                 handled += n;
3935                 addr += n;
3936                 len -= n;
3937                 v += n;
3938         } while (len);
3939
3940         return handled;
3941 }
3942
3943 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3944 {
3945         int handled = 0;
3946         int n;
3947
3948         do {
3949                 n = min(len, 8);
3950                 if (!(vcpu->arch.apic &&
3951                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
3952                                          addr, n, v))
3953                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
3954                         break;
3955                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3956                 handled += n;
3957                 addr += n;
3958                 len -= n;
3959                 v += n;
3960         } while (len);
3961
3962         return handled;
3963 }
3964
3965 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3966                         struct kvm_segment *var, int seg)
3967 {
3968         kvm_x86_ops->set_segment(vcpu, var, seg);
3969 }
3970
3971 void kvm_get_segment(struct kvm_vcpu *vcpu,
3972                      struct kvm_segment *var, int seg)
3973 {
3974         kvm_x86_ops->get_segment(vcpu, var, seg);
3975 }
3976
3977 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
3978                            struct x86_exception *exception)
3979 {
3980         gpa_t t_gpa;
3981
3982         BUG_ON(!mmu_is_nested(vcpu));
3983
3984         /* NPT walks are always user-walks */
3985         access |= PFERR_USER_MASK;
3986         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
3987
3988         return t_gpa;
3989 }
3990
3991 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3992                               struct x86_exception *exception)
3993 {
3994         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3995         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3996 }
3997
3998  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3999                                 struct x86_exception *exception)
4000 {
4001         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4002         access |= PFERR_FETCH_MASK;
4003         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4004 }
4005
4006 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4007                                struct x86_exception *exception)
4008 {
4009         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4010         access |= PFERR_WRITE_MASK;
4011         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4012 }
4013
4014 /* uses this to access any guest's mapped memory without checking CPL */
4015 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4016                                 struct x86_exception *exception)
4017 {
4018         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4019 }
4020
4021 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4022                                       struct kvm_vcpu *vcpu, u32 access,
4023                                       struct x86_exception *exception)
4024 {
4025         void *data = val;
4026         int r = X86EMUL_CONTINUE;
4027
4028         while (bytes) {
4029                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4030                                                             exception);
4031                 unsigned offset = addr & (PAGE_SIZE-1);
4032                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4033                 int ret;
4034
4035                 if (gpa == UNMAPPED_GVA)
4036                         return X86EMUL_PROPAGATE_FAULT;
4037                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4038                                                offset, toread);
4039                 if (ret < 0) {
4040                         r = X86EMUL_IO_NEEDED;
4041                         goto out;
4042                 }
4043
4044                 bytes -= toread;
4045                 data += toread;
4046                 addr += toread;
4047         }
4048 out:
4049         return r;
4050 }
4051
4052 /* used for instruction fetching */
4053 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4054                                 gva_t addr, void *val, unsigned int bytes,
4055                                 struct x86_exception *exception)
4056 {
4057         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4058         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4059         unsigned offset;
4060         int ret;
4061
4062         /* Inline kvm_read_guest_virt_helper for speed.  */
4063         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4064                                                     exception);
4065         if (unlikely(gpa == UNMAPPED_GVA))
4066                 return X86EMUL_PROPAGATE_FAULT;
4067
4068         offset = addr & (PAGE_SIZE-1);
4069         if (WARN_ON(offset + bytes > PAGE_SIZE))
4070                 bytes = (unsigned)PAGE_SIZE - offset;
4071         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4072                                        offset, bytes);
4073         if (unlikely(ret < 0))
4074                 return X86EMUL_IO_NEEDED;
4075
4076         return X86EMUL_CONTINUE;
4077 }
4078
4079 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4080                                gva_t addr, void *val, unsigned int bytes,
4081                                struct x86_exception *exception)
4082 {
4083         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4084         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4085
4086         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4087                                           exception);
4088 }
4089 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4090
4091 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4092                                       gva_t addr, void *val, unsigned int bytes,
4093                                       struct x86_exception *exception)
4094 {
4095         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4096         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4097 }
4098
4099 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4100                                        gva_t addr, void *val,
4101                                        unsigned int bytes,
4102                                        struct x86_exception *exception)
4103 {
4104         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4105         void *data = val;
4106         int r = X86EMUL_CONTINUE;
4107
4108         while (bytes) {
4109                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4110                                                              PFERR_WRITE_MASK,
4111                                                              exception);
4112                 unsigned offset = addr & (PAGE_SIZE-1);
4113                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4114                 int ret;
4115
4116                 if (gpa == UNMAPPED_GVA)
4117                         return X86EMUL_PROPAGATE_FAULT;
4118                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4119                 if (ret < 0) {
4120                         r = X86EMUL_IO_NEEDED;
4121                         goto out;
4122                 }
4123
4124                 bytes -= towrite;
4125                 data += towrite;
4126                 addr += towrite;
4127         }
4128 out:
4129         return r;
4130 }
4131 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4132
4133 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4134                                 gpa_t *gpa, struct x86_exception *exception,
4135                                 bool write)
4136 {
4137         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4138                 | (write ? PFERR_WRITE_MASK : 0);
4139
4140         if (vcpu_match_mmio_gva(vcpu, gva)
4141             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4142                                  vcpu->arch.access, access)) {
4143                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4144                                         (gva & (PAGE_SIZE - 1));
4145                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4146                 return 1;
4147         }
4148
4149         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4150
4151         if (*gpa == UNMAPPED_GVA)
4152                 return -1;
4153
4154         /* For APIC access vmexit */
4155         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4156                 return 1;
4157
4158         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4159                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4160                 return 1;
4161         }
4162
4163         return 0;
4164 }
4165
4166 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4167                         const void *val, int bytes)
4168 {
4169         int ret;
4170
4171         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4172         if (ret < 0)
4173                 return 0;
4174         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4175         return 1;
4176 }
4177
4178 struct read_write_emulator_ops {
4179         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4180                                   int bytes);
4181         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4182                                   void *val, int bytes);
4183         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4184                                int bytes, void *val);
4185         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4186                                     void *val, int bytes);
4187         bool write;
4188 };
4189
4190 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4191 {
4192         if (vcpu->mmio_read_completed) {
4193                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4194                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4195                 vcpu->mmio_read_completed = 0;
4196                 return 1;
4197         }
4198
4199         return 0;
4200 }
4201
4202 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4203                         void *val, int bytes)
4204 {
4205         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4206 }
4207
4208 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4209                          void *val, int bytes)
4210 {
4211         return emulator_write_phys(vcpu, gpa, val, bytes);
4212 }
4213
4214 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4215 {
4216         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4217         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4218 }
4219
4220 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4221                           void *val, int bytes)
4222 {
4223         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4224         return X86EMUL_IO_NEEDED;
4225 }
4226
4227 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4228                            void *val, int bytes)
4229 {
4230         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4231
4232         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4233         return X86EMUL_CONTINUE;
4234 }
4235
4236 static const struct read_write_emulator_ops read_emultor = {
4237         .read_write_prepare = read_prepare,
4238         .read_write_emulate = read_emulate,
4239         .read_write_mmio = vcpu_mmio_read,
4240         .read_write_exit_mmio = read_exit_mmio,
4241 };
4242
4243 static const struct read_write_emulator_ops write_emultor = {
4244         .read_write_emulate = write_emulate,
4245         .read_write_mmio = write_mmio,
4246         .read_write_exit_mmio = write_exit_mmio,
4247         .write = true,
4248 };
4249
4250 static int emulator_read_write_onepage(unsigned long addr, void *val,
4251                                        unsigned int bytes,
4252                                        struct x86_exception *exception,
4253                                        struct kvm_vcpu *vcpu,
4254                                        const struct read_write_emulator_ops *ops)
4255 {
4256         gpa_t gpa;
4257         int handled, ret;
4258         bool write = ops->write;
4259         struct kvm_mmio_fragment *frag;
4260
4261         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4262
4263         if (ret < 0)
4264                 return X86EMUL_PROPAGATE_FAULT;
4265
4266         /* For APIC access vmexit */
4267         if (ret)
4268                 goto mmio;
4269
4270         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4271                 return X86EMUL_CONTINUE;
4272
4273 mmio:
4274         /*
4275          * Is this MMIO handled locally?
4276          */
4277         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4278         if (handled == bytes)
4279                 return X86EMUL_CONTINUE;
4280
4281         gpa += handled;
4282         bytes -= handled;
4283         val += handled;
4284
4285         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4286         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4287         frag->gpa = gpa;
4288         frag->data = val;
4289         frag->len = bytes;
4290         return X86EMUL_CONTINUE;
4291 }
4292
4293 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4294                         unsigned long addr,
4295                         void *val, unsigned int bytes,
4296                         struct x86_exception *exception,
4297                         const struct read_write_emulator_ops *ops)
4298 {
4299         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4300         gpa_t gpa;
4301         int rc;
4302
4303         if (ops->read_write_prepare &&
4304                   ops->read_write_prepare(vcpu, val, bytes))
4305                 return X86EMUL_CONTINUE;
4306
4307         vcpu->mmio_nr_fragments = 0;
4308
4309         /* Crossing a page boundary? */
4310         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4311                 int now;
4312
4313                 now = -addr & ~PAGE_MASK;
4314                 rc = emulator_read_write_onepage(addr, val, now, exception,
4315                                                  vcpu, ops);
4316
4317                 if (rc != X86EMUL_CONTINUE)
4318                         return rc;
4319                 addr += now;
4320                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4321                         addr = (u32)addr;
4322                 val += now;
4323                 bytes -= now;
4324         }
4325
4326         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4327                                          vcpu, ops);
4328         if (rc != X86EMUL_CONTINUE)
4329                 return rc;
4330
4331         if (!vcpu->mmio_nr_fragments)
4332                 return rc;
4333
4334         gpa = vcpu->mmio_fragments[0].gpa;
4335
4336         vcpu->mmio_needed = 1;
4337         vcpu->mmio_cur_fragment = 0;
4338
4339         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4340         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4341         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4342         vcpu->run->mmio.phys_addr = gpa;
4343
4344         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4345 }
4346
4347 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4348                                   unsigned long addr,
4349                                   void *val,
4350                                   unsigned int bytes,
4351                                   struct x86_exception *exception)
4352 {
4353         return emulator_read_write(ctxt, addr, val, bytes,
4354                                    exception, &read_emultor);
4355 }
4356
4357 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4358                             unsigned long addr,
4359                             const void *val,
4360                             unsigned int bytes,
4361                             struct x86_exception *exception)
4362 {
4363         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4364                                    exception, &write_emultor);
4365 }
4366
4367 #define CMPXCHG_TYPE(t, ptr, old, new) \
4368         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4369
4370 #ifdef CONFIG_X86_64
4371 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4372 #else
4373 #  define CMPXCHG64(ptr, old, new) \
4374         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4375 #endif
4376
4377 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4378                                      unsigned long addr,
4379                                      const void *old,
4380                                      const void *new,
4381                                      unsigned int bytes,
4382                                      struct x86_exception *exception)
4383 {
4384         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4385         gpa_t gpa;
4386         struct page *page;
4387         char *kaddr;
4388         bool exchanged;
4389
4390         /* guests cmpxchg8b have to be emulated atomically */
4391         if (bytes > 8 || (bytes & (bytes - 1)))
4392                 goto emul_write;
4393
4394         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4395
4396         if (gpa == UNMAPPED_GVA ||
4397             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4398                 goto emul_write;
4399
4400         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4401                 goto emul_write;
4402
4403         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4404         if (is_error_page(page))
4405                 goto emul_write;
4406
4407         kaddr = kmap_atomic(page);
4408         kaddr += offset_in_page(gpa);
4409         switch (bytes) {
4410         case 1:
4411                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4412                 break;
4413         case 2:
4414                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4415                 break;
4416         case 4:
4417                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4418                 break;
4419         case 8:
4420                 exchanged = CMPXCHG64(kaddr, old, new);
4421                 break;
4422         default:
4423                 BUG();
4424         }
4425         kunmap_atomic(kaddr);
4426         kvm_release_page_dirty(page);
4427
4428         if (!exchanged)
4429                 return X86EMUL_CMPXCHG_FAILED;
4430
4431         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4432         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4433
4434         return X86EMUL_CONTINUE;
4435
4436 emul_write:
4437         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4438
4439         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4440 }
4441
4442 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4443 {
4444         /* TODO: String I/O for in kernel device */
4445         int r;
4446
4447         if (vcpu->arch.pio.in)
4448                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4449                                     vcpu->arch.pio.size, pd);
4450         else
4451                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4452                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4453                                      pd);
4454         return r;
4455 }
4456
4457 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4458                                unsigned short port, void *val,
4459                                unsigned int count, bool in)
4460 {
4461         vcpu->arch.pio.port = port;
4462         vcpu->arch.pio.in = in;
4463         vcpu->arch.pio.count  = count;
4464         vcpu->arch.pio.size = size;
4465
4466         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4467                 vcpu->arch.pio.count = 0;
4468                 return 1;
4469         }
4470
4471         vcpu->run->exit_reason = KVM_EXIT_IO;
4472         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4473         vcpu->run->io.size = size;
4474         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4475         vcpu->run->io.count = count;
4476         vcpu->run->io.port = port;
4477
4478         return 0;
4479 }
4480
4481 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4482                                     int size, unsigned short port, void *val,
4483                                     unsigned int count)
4484 {
4485         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4486         int ret;
4487
4488         if (vcpu->arch.pio.count)
4489                 goto data_avail;
4490
4491         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4492         if (ret) {
4493 data_avail:
4494                 memcpy(val, vcpu->arch.pio_data, size * count);
4495                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4496                 vcpu->arch.pio.count = 0;
4497                 return 1;
4498         }
4499
4500         return 0;
4501 }
4502
4503 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4504                                      int size, unsigned short port,
4505                                      const void *val, unsigned int count)
4506 {
4507         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4508
4509         memcpy(vcpu->arch.pio_data, val, size * count);
4510         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4511         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4512 }
4513
4514 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4515 {
4516         return kvm_x86_ops->get_segment_base(vcpu, seg);
4517 }
4518
4519 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4520 {
4521         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4522 }
4523
4524 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4525 {
4526         if (!need_emulate_wbinvd(vcpu))
4527                 return X86EMUL_CONTINUE;
4528
4529         if (kvm_x86_ops->has_wbinvd_exit()) {
4530                 int cpu = get_cpu();
4531
4532                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4533                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4534                                 wbinvd_ipi, NULL, 1);
4535                 put_cpu();
4536                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4537         } else
4538                 wbinvd();
4539         return X86EMUL_CONTINUE;
4540 }
4541
4542 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4543 {
4544         kvm_x86_ops->skip_emulated_instruction(vcpu);
4545         return kvm_emulate_wbinvd_noskip(vcpu);
4546 }
4547 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4548
4549
4550
4551 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4552 {
4553         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4554 }
4555
4556 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4557                            unsigned long *dest)
4558 {
4559         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4560 }
4561
4562 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4563                            unsigned long value)
4564 {
4565
4566         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4567 }
4568
4569 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4570 {
4571         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4572 }
4573
4574 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4575 {
4576         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4577         unsigned long value;
4578
4579         switch (cr) {
4580         case 0:
4581                 value = kvm_read_cr0(vcpu);
4582                 break;
4583         case 2:
4584                 value = vcpu->arch.cr2;
4585                 break;
4586         case 3:
4587                 value = kvm_read_cr3(vcpu);
4588                 break;
4589         case 4:
4590                 value = kvm_read_cr4(vcpu);
4591                 break;
4592         case 8:
4593                 value = kvm_get_cr8(vcpu);
4594                 break;
4595         default:
4596                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4597                 return 0;
4598         }
4599
4600         return value;
4601 }
4602
4603 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4604 {
4605         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4606         int res = 0;
4607
4608         switch (cr) {
4609         case 0:
4610                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4611                 break;
4612         case 2:
4613                 vcpu->arch.cr2 = val;
4614                 break;
4615         case 3:
4616                 res = kvm_set_cr3(vcpu, val);
4617                 break;
4618         case 4:
4619                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4620                 break;
4621         case 8:
4622                 res = kvm_set_cr8(vcpu, val);
4623                 break;
4624         default:
4625                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4626                 res = -1;
4627         }
4628
4629         return res;
4630 }
4631
4632 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4633 {
4634         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4635 }
4636
4637 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4638 {
4639         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4640 }
4641
4642 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4643 {
4644         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4645 }
4646
4647 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4648 {
4649         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4650 }
4651
4652 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4653 {
4654         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4655 }
4656
4657 static unsigned long emulator_get_cached_segment_base(
4658         struct x86_emulate_ctxt *ctxt, int seg)
4659 {
4660         return get_segment_base(emul_to_vcpu(ctxt), seg);
4661 }
4662
4663 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4664                                  struct desc_struct *desc, u32 *base3,
4665                                  int seg)
4666 {
4667         struct kvm_segment var;
4668
4669         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4670         *selector = var.selector;
4671
4672         if (var.unusable) {
4673                 memset(desc, 0, sizeof(*desc));
4674                 return false;
4675         }
4676
4677         if (var.g)
4678                 var.limit >>= 12;
4679         set_desc_limit(desc, var.limit);
4680         set_desc_base(desc, (unsigned long)var.base);
4681 #ifdef CONFIG_X86_64
4682         if (base3)
4683                 *base3 = var.base >> 32;
4684 #endif
4685         desc->type = var.type;
4686         desc->s = var.s;
4687         desc->dpl = var.dpl;
4688         desc->p = var.present;
4689         desc->avl = var.avl;
4690         desc->l = var.l;
4691         desc->d = var.db;
4692         desc->g = var.g;
4693
4694         return true;
4695 }
4696
4697 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4698                                  struct desc_struct *desc, u32 base3,
4699                                  int seg)
4700 {
4701         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4702         struct kvm_segment var;
4703
4704         var.selector = selector;
4705         var.base = get_desc_base(desc);
4706 #ifdef CONFIG_X86_64
4707         var.base |= ((u64)base3) << 32;
4708 #endif
4709         var.limit = get_desc_limit(desc);
4710         if (desc->g)
4711                 var.limit = (var.limit << 12) | 0xfff;
4712         var.type = desc->type;
4713         var.dpl = desc->dpl;
4714         var.db = desc->d;
4715         var.s = desc->s;
4716         var.l = desc->l;
4717         var.g = desc->g;
4718         var.avl = desc->avl;
4719         var.present = desc->p;
4720         var.unusable = !var.present;
4721         var.padding = 0;
4722
4723         kvm_set_segment(vcpu, &var, seg);
4724         return;
4725 }
4726
4727 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4728                             u32 msr_index, u64 *pdata)
4729 {
4730         struct msr_data msr;
4731         int r;
4732
4733         msr.index = msr_index;
4734         msr.host_initiated = false;
4735         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4736         if (r)
4737                 return r;
4738
4739         *pdata = msr.data;
4740         return 0;
4741 }
4742
4743 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4744                             u32 msr_index, u64 data)
4745 {
4746         struct msr_data msr;
4747
4748         msr.data = data;
4749         msr.index = msr_index;
4750         msr.host_initiated = false;
4751         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4752 }
4753
4754 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4755 {
4756         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4757
4758         return vcpu->arch.smbase;
4759 }
4760
4761 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4762 {
4763         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4764
4765         vcpu->arch.smbase = smbase;
4766 }
4767
4768 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4769                               u32 pmc)
4770 {
4771         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4772 }
4773
4774 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4775                              u32 pmc, u64 *pdata)
4776 {
4777         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4778 }
4779
4780 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4781 {
4782         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4783 }
4784
4785 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4786 {
4787         preempt_disable();
4788         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4789         /*
4790          * CR0.TS may reference the host fpu state, not the guest fpu state,
4791          * so it may be clear at this point.
4792          */
4793         clts();
4794 }
4795
4796 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4797 {
4798         preempt_enable();
4799 }
4800
4801 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4802                               struct x86_instruction_info *info,
4803                               enum x86_intercept_stage stage)
4804 {
4805         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4806 }
4807
4808 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4809                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4810 {
4811         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4812 }
4813
4814 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4815 {
4816         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4817 }
4818
4819 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4820 {
4821         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4822 }
4823
4824 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4825 {
4826         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4827 }
4828
4829 static const struct x86_emulate_ops emulate_ops = {
4830         .read_gpr            = emulator_read_gpr,
4831         .write_gpr           = emulator_write_gpr,
4832         .read_std            = kvm_read_guest_virt_system,
4833         .write_std           = kvm_write_guest_virt_system,
4834         .fetch               = kvm_fetch_guest_virt,
4835         .read_emulated       = emulator_read_emulated,
4836         .write_emulated      = emulator_write_emulated,
4837         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4838         .invlpg              = emulator_invlpg,
4839         .pio_in_emulated     = emulator_pio_in_emulated,
4840         .pio_out_emulated    = emulator_pio_out_emulated,
4841         .get_segment         = emulator_get_segment,
4842         .set_segment         = emulator_set_segment,
4843         .get_cached_segment_base = emulator_get_cached_segment_base,
4844         .get_gdt             = emulator_get_gdt,
4845         .get_idt             = emulator_get_idt,
4846         .set_gdt             = emulator_set_gdt,
4847         .set_idt             = emulator_set_idt,
4848         .get_cr              = emulator_get_cr,
4849         .set_cr              = emulator_set_cr,
4850         .cpl                 = emulator_get_cpl,
4851         .get_dr              = emulator_get_dr,
4852         .set_dr              = emulator_set_dr,
4853         .get_smbase          = emulator_get_smbase,
4854         .set_smbase          = emulator_set_smbase,
4855         .set_msr             = emulator_set_msr,
4856         .get_msr             = emulator_get_msr,
4857         .check_pmc           = emulator_check_pmc,
4858         .read_pmc            = emulator_read_pmc,
4859         .halt                = emulator_halt,
4860         .wbinvd              = emulator_wbinvd,
4861         .fix_hypercall       = emulator_fix_hypercall,
4862         .get_fpu             = emulator_get_fpu,
4863         .put_fpu             = emulator_put_fpu,
4864         .intercept           = emulator_intercept,
4865         .get_cpuid           = emulator_get_cpuid,
4866         .set_nmi_mask        = emulator_set_nmi_mask,
4867 };
4868
4869 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4870 {
4871         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
4872         /*
4873          * an sti; sti; sequence only disable interrupts for the first
4874          * instruction. So, if the last instruction, be it emulated or
4875          * not, left the system with the INT_STI flag enabled, it
4876          * means that the last instruction is an sti. We should not
4877          * leave the flag on in this case. The same goes for mov ss
4878          */
4879         if (int_shadow & mask)
4880                 mask = 0;
4881         if (unlikely(int_shadow || mask)) {
4882                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4883                 if (!mask)
4884                         kvm_make_request(KVM_REQ_EVENT, vcpu);
4885         }
4886 }
4887
4888 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
4889 {
4890         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4891         if (ctxt->exception.vector == PF_VECTOR)
4892                 return kvm_propagate_fault(vcpu, &ctxt->exception);
4893
4894         if (ctxt->exception.error_code_valid)
4895                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4896                                       ctxt->exception.error_code);
4897         else
4898                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4899         return false;
4900 }
4901
4902 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4903 {
4904         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4905         int cs_db, cs_l;
4906
4907         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4908
4909         ctxt->eflags = kvm_get_rflags(vcpu);
4910         ctxt->eip = kvm_rip_read(vcpu);
4911         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4912                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4913                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
4914                      cs_db                              ? X86EMUL_MODE_PROT32 :
4915                                                           X86EMUL_MODE_PROT16;
4916         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
4917         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
4918         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
4919         ctxt->emul_flags = vcpu->arch.hflags;
4920
4921         init_decode_cache(ctxt);
4922         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4923 }
4924
4925 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4926 {
4927         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4928         int ret;
4929
4930         init_emulate_ctxt(vcpu);
4931
4932         ctxt->op_bytes = 2;
4933         ctxt->ad_bytes = 2;
4934         ctxt->_eip = ctxt->eip + inc_eip;
4935         ret = emulate_int_real(ctxt, irq);
4936
4937         if (ret != X86EMUL_CONTINUE)
4938                 return EMULATE_FAIL;
4939
4940         ctxt->eip = ctxt->_eip;
4941         kvm_rip_write(vcpu, ctxt->eip);
4942         kvm_set_rflags(vcpu, ctxt->eflags);
4943
4944         if (irq == NMI_VECTOR)
4945                 vcpu->arch.nmi_pending = 0;
4946         else
4947                 vcpu->arch.interrupt.pending = false;
4948
4949         return EMULATE_DONE;
4950 }
4951 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4952
4953 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4954 {
4955         int r = EMULATE_DONE;
4956
4957         ++vcpu->stat.insn_emulation_fail;
4958         trace_kvm_emulate_insn_failed(vcpu);
4959         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
4960                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4961                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4962                 vcpu->run->internal.ndata = 0;
4963                 r = EMULATE_FAIL;
4964         }
4965         kvm_queue_exception(vcpu, UD_VECTOR);
4966
4967         return r;
4968 }
4969
4970 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4971                                   bool write_fault_to_shadow_pgtable,
4972                                   int emulation_type)
4973 {
4974         gpa_t gpa = cr2;
4975         pfn_t pfn;
4976
4977         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4978                 return false;
4979
4980         if (!vcpu->arch.mmu.direct_map) {
4981                 /*
4982                  * Write permission should be allowed since only
4983                  * write access need to be emulated.
4984                  */
4985                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4986
4987                 /*
4988                  * If the mapping is invalid in guest, let cpu retry
4989                  * it to generate fault.
4990                  */
4991                 if (gpa == UNMAPPED_GVA)
4992                         return true;
4993         }
4994
4995         /*
4996          * Do not retry the unhandleable instruction if it faults on the
4997          * readonly host memory, otherwise it will goto a infinite loop:
4998          * retry instruction -> write #PF -> emulation fail -> retry
4999          * instruction -> ...
5000          */
5001         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5002
5003         /*
5004          * If the instruction failed on the error pfn, it can not be fixed,
5005          * report the error to userspace.
5006          */
5007         if (is_error_noslot_pfn(pfn))
5008                 return false;
5009
5010         kvm_release_pfn_clean(pfn);
5011
5012         /* The instructions are well-emulated on direct mmu. */
5013         if (vcpu->arch.mmu.direct_map) {
5014                 unsigned int indirect_shadow_pages;
5015
5016                 spin_lock(&vcpu->kvm->mmu_lock);
5017                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5018                 spin_unlock(&vcpu->kvm->mmu_lock);
5019
5020                 if (indirect_shadow_pages)
5021                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5022
5023                 return true;
5024         }
5025
5026         /*
5027          * if emulation was due to access to shadowed page table
5028          * and it failed try to unshadow page and re-enter the
5029          * guest to let CPU execute the instruction.
5030          */
5031         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5032
5033         /*
5034          * If the access faults on its page table, it can not
5035          * be fixed by unprotecting shadow page and it should
5036          * be reported to userspace.
5037          */
5038         return !write_fault_to_shadow_pgtable;
5039 }
5040
5041 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5042                               unsigned long cr2,  int emulation_type)
5043 {
5044         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5045         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5046
5047         last_retry_eip = vcpu->arch.last_retry_eip;
5048         last_retry_addr = vcpu->arch.last_retry_addr;
5049
5050         /*
5051          * If the emulation is caused by #PF and it is non-page_table
5052          * writing instruction, it means the VM-EXIT is caused by shadow
5053          * page protected, we can zap the shadow page and retry this
5054          * instruction directly.
5055          *
5056          * Note: if the guest uses a non-page-table modifying instruction
5057          * on the PDE that points to the instruction, then we will unmap
5058          * the instruction and go to an infinite loop. So, we cache the
5059          * last retried eip and the last fault address, if we meet the eip
5060          * and the address again, we can break out of the potential infinite
5061          * loop.
5062          */
5063         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5064
5065         if (!(emulation_type & EMULTYPE_RETRY))
5066                 return false;
5067
5068         if (x86_page_table_writing_insn(ctxt))
5069                 return false;
5070
5071         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5072                 return false;
5073
5074         vcpu->arch.last_retry_eip = ctxt->eip;
5075         vcpu->arch.last_retry_addr = cr2;
5076
5077         if (!vcpu->arch.mmu.direct_map)
5078                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5079
5080         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5081
5082         return true;
5083 }
5084
5085 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5086 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5087
5088 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5089 {
5090         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5091                 /* This is a good place to trace that we are exiting SMM.  */
5092                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5093
5094                 if (unlikely(vcpu->arch.smi_pending)) {
5095                         kvm_make_request(KVM_REQ_SMI, vcpu);
5096                         vcpu->arch.smi_pending = 0;
5097                 } else {
5098                         /* Process a latched INIT, if any.  */
5099                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5100                 }
5101         }
5102
5103         kvm_mmu_reset_context(vcpu);
5104 }
5105
5106 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5107 {
5108         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5109
5110         vcpu->arch.hflags = emul_flags;
5111
5112         if (changed & HF_SMM_MASK)
5113                 kvm_smm_changed(vcpu);
5114 }
5115
5116 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5117                                 unsigned long *db)
5118 {
5119         u32 dr6 = 0;
5120         int i;
5121         u32 enable, rwlen;
5122
5123         enable = dr7;
5124         rwlen = dr7 >> 16;
5125         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5126                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5127                         dr6 |= (1 << i);
5128         return dr6;
5129 }
5130
5131 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5132 {
5133         struct kvm_run *kvm_run = vcpu->run;
5134
5135         /*
5136          * rflags is the old, "raw" value of the flags.  The new value has
5137          * not been saved yet.
5138          *
5139          * This is correct even for TF set by the guest, because "the
5140          * processor will not generate this exception after the instruction
5141          * that sets the TF flag".
5142          */
5143         if (unlikely(rflags & X86_EFLAGS_TF)) {
5144                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5145                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5146                                                   DR6_RTM;
5147                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5148                         kvm_run->debug.arch.exception = DB_VECTOR;
5149                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5150                         *r = EMULATE_USER_EXIT;
5151                 } else {
5152                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5153                         /*
5154                          * "Certain debug exceptions may clear bit 0-3.  The
5155                          * remaining contents of the DR6 register are never
5156                          * cleared by the processor".
5157                          */
5158                         vcpu->arch.dr6 &= ~15;
5159                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5160                         kvm_queue_exception(vcpu, DB_VECTOR);
5161                 }
5162         }
5163 }
5164
5165 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5166 {
5167         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5168             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5169                 struct kvm_run *kvm_run = vcpu->run;
5170                 unsigned long eip = kvm_get_linear_rip(vcpu);
5171                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5172                                            vcpu->arch.guest_debug_dr7,
5173                                            vcpu->arch.eff_db);
5174
5175                 if (dr6 != 0) {
5176                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5177                         kvm_run->debug.arch.pc = eip;
5178                         kvm_run->debug.arch.exception = DB_VECTOR;
5179                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5180                         *r = EMULATE_USER_EXIT;
5181                         return true;
5182                 }
5183         }
5184
5185         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5186             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5187                 unsigned long eip = kvm_get_linear_rip(vcpu);
5188                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5189                                            vcpu->arch.dr7,
5190                                            vcpu->arch.db);
5191
5192                 if (dr6 != 0) {
5193                         vcpu->arch.dr6 &= ~15;
5194                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5195                         kvm_queue_exception(vcpu, DB_VECTOR);
5196                         *r = EMULATE_DONE;
5197                         return true;
5198                 }
5199         }
5200
5201         return false;
5202 }
5203
5204 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5205                             unsigned long cr2,
5206                             int emulation_type,
5207                             void *insn,
5208                             int insn_len)
5209 {
5210         int r;
5211         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5212         bool writeback = true;
5213         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5214
5215         /*
5216          * Clear write_fault_to_shadow_pgtable here to ensure it is
5217          * never reused.
5218          */
5219         vcpu->arch.write_fault_to_shadow_pgtable = false;
5220         kvm_clear_exception_queue(vcpu);
5221
5222         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5223                 init_emulate_ctxt(vcpu);
5224
5225                 /*
5226                  * We will reenter on the same instruction since
5227                  * we do not set complete_userspace_io.  This does not
5228                  * handle watchpoints yet, those would be handled in
5229                  * the emulate_ops.
5230                  */
5231                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5232                         return r;
5233
5234                 ctxt->interruptibility = 0;
5235                 ctxt->have_exception = false;
5236                 ctxt->exception.vector = -1;
5237                 ctxt->perm_ok = false;
5238
5239                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5240
5241                 r = x86_decode_insn(ctxt, insn, insn_len);
5242
5243                 trace_kvm_emulate_insn_start(vcpu);
5244                 ++vcpu->stat.insn_emulation;
5245                 if (r != EMULATION_OK)  {
5246                         if (emulation_type & EMULTYPE_TRAP_UD)
5247                                 return EMULATE_FAIL;
5248                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5249                                                 emulation_type))
5250                                 return EMULATE_DONE;
5251                         if (emulation_type & EMULTYPE_SKIP)
5252                                 return EMULATE_FAIL;
5253                         return handle_emulation_failure(vcpu);
5254                 }
5255         }
5256
5257         if (emulation_type & EMULTYPE_SKIP) {
5258                 kvm_rip_write(vcpu, ctxt->_eip);
5259                 if (ctxt->eflags & X86_EFLAGS_RF)
5260                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5261                 return EMULATE_DONE;
5262         }
5263
5264         if (retry_instruction(ctxt, cr2, emulation_type))
5265                 return EMULATE_DONE;
5266
5267         /* this is needed for vmware backdoor interface to work since it
5268            changes registers values  during IO operation */
5269         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5270                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5271                 emulator_invalidate_register_cache(ctxt);
5272         }
5273
5274 restart:
5275         r = x86_emulate_insn(ctxt);
5276
5277         if (r == EMULATION_INTERCEPTED)
5278                 return EMULATE_DONE;
5279
5280         if (r == EMULATION_FAILED) {
5281                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5282                                         emulation_type))
5283                         return EMULATE_DONE;
5284
5285                 return handle_emulation_failure(vcpu);
5286         }
5287
5288         if (ctxt->have_exception) {
5289                 r = EMULATE_DONE;
5290                 if (inject_emulated_exception(vcpu))
5291                         return r;
5292         } else if (vcpu->arch.pio.count) {
5293                 if (!vcpu->arch.pio.in) {
5294                         /* FIXME: return into emulator if single-stepping.  */
5295                         vcpu->arch.pio.count = 0;
5296                 } else {
5297                         writeback = false;
5298                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5299                 }
5300                 r = EMULATE_USER_EXIT;
5301         } else if (vcpu->mmio_needed) {
5302                 if (!vcpu->mmio_is_write)
5303                         writeback = false;
5304                 r = EMULATE_USER_EXIT;
5305                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5306         } else if (r == EMULATION_RESTART)
5307                 goto restart;
5308         else
5309                 r = EMULATE_DONE;
5310
5311         if (writeback) {
5312                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5313                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5314                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5315                 if (vcpu->arch.hflags != ctxt->emul_flags)
5316                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5317                 kvm_rip_write(vcpu, ctxt->eip);
5318                 if (r == EMULATE_DONE)
5319                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5320                 if (!ctxt->have_exception ||
5321                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5322                         __kvm_set_rflags(vcpu, ctxt->eflags);
5323
5324                 /*
5325                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5326                  * do nothing, and it will be requested again as soon as
5327                  * the shadow expires.  But we still need to check here,
5328                  * because POPF has no interrupt shadow.
5329                  */
5330                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5331                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5332         } else
5333                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5334
5335         return r;
5336 }
5337 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5338
5339 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5340 {
5341         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5342         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5343                                             size, port, &val, 1);
5344         /* do not return to emulator after return from userspace */
5345         vcpu->arch.pio.count = 0;
5346         return ret;
5347 }
5348 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5349
5350 static void tsc_bad(void *info)
5351 {
5352         __this_cpu_write(cpu_tsc_khz, 0);
5353 }
5354
5355 static void tsc_khz_changed(void *data)
5356 {
5357         struct cpufreq_freqs *freq = data;
5358         unsigned long khz = 0;
5359
5360         if (data)
5361                 khz = freq->new;
5362         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5363                 khz = cpufreq_quick_get(raw_smp_processor_id());
5364         if (!khz)
5365                 khz = tsc_khz;
5366         __this_cpu_write(cpu_tsc_khz, khz);
5367 }
5368
5369 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5370                                      void *data)
5371 {
5372         struct cpufreq_freqs *freq = data;
5373         struct kvm *kvm;
5374         struct kvm_vcpu *vcpu;
5375         int i, send_ipi = 0;
5376
5377         /*
5378          * We allow guests to temporarily run on slowing clocks,
5379          * provided we notify them after, or to run on accelerating
5380          * clocks, provided we notify them before.  Thus time never
5381          * goes backwards.
5382          *
5383          * However, we have a problem.  We can't atomically update
5384          * the frequency of a given CPU from this function; it is
5385          * merely a notifier, which can be called from any CPU.
5386          * Changing the TSC frequency at arbitrary points in time
5387          * requires a recomputation of local variables related to
5388          * the TSC for each VCPU.  We must flag these local variables
5389          * to be updated and be sure the update takes place with the
5390          * new frequency before any guests proceed.
5391          *
5392          * Unfortunately, the combination of hotplug CPU and frequency
5393          * change creates an intractable locking scenario; the order
5394          * of when these callouts happen is undefined with respect to
5395          * CPU hotplug, and they can race with each other.  As such,
5396          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5397          * undefined; you can actually have a CPU frequency change take
5398          * place in between the computation of X and the setting of the
5399          * variable.  To protect against this problem, all updates of
5400          * the per_cpu tsc_khz variable are done in an interrupt
5401          * protected IPI, and all callers wishing to update the value
5402          * must wait for a synchronous IPI to complete (which is trivial
5403          * if the caller is on the CPU already).  This establishes the
5404          * necessary total order on variable updates.
5405          *
5406          * Note that because a guest time update may take place
5407          * anytime after the setting of the VCPU's request bit, the
5408          * correct TSC value must be set before the request.  However,
5409          * to ensure the update actually makes it to any guest which
5410          * starts running in hardware virtualization between the set
5411          * and the acquisition of the spinlock, we must also ping the
5412          * CPU after setting the request bit.
5413          *
5414          */
5415
5416         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5417                 return 0;
5418         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5419                 return 0;
5420
5421         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5422
5423         spin_lock(&kvm_lock);
5424         list_for_each_entry(kvm, &vm_list, vm_list) {
5425                 kvm_for_each_vcpu(i, vcpu, kvm) {
5426                         if (vcpu->cpu != freq->cpu)
5427                                 continue;
5428                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5429                         if (vcpu->cpu != smp_processor_id())
5430                                 send_ipi = 1;
5431                 }
5432         }
5433         spin_unlock(&kvm_lock);
5434
5435         if (freq->old < freq->new && send_ipi) {
5436                 /*
5437                  * We upscale the frequency.  Must make the guest
5438                  * doesn't see old kvmclock values while running with
5439                  * the new frequency, otherwise we risk the guest sees
5440                  * time go backwards.
5441                  *
5442                  * In case we update the frequency for another cpu
5443                  * (which might be in guest context) send an interrupt
5444                  * to kick the cpu out of guest context.  Next time
5445                  * guest context is entered kvmclock will be updated,
5446                  * so the guest will not see stale values.
5447                  */
5448                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5449         }
5450         return 0;
5451 }
5452
5453 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5454         .notifier_call  = kvmclock_cpufreq_notifier
5455 };
5456
5457 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5458                                         unsigned long action, void *hcpu)
5459 {
5460         unsigned int cpu = (unsigned long)hcpu;
5461
5462         switch (action) {
5463                 case CPU_ONLINE:
5464                 case CPU_DOWN_FAILED:
5465                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5466                         break;
5467                 case CPU_DOWN_PREPARE:
5468                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5469                         break;
5470         }
5471         return NOTIFY_OK;
5472 }
5473
5474 static struct notifier_block kvmclock_cpu_notifier_block = {
5475         .notifier_call  = kvmclock_cpu_notifier,
5476         .priority = -INT_MAX
5477 };
5478
5479 static void kvm_timer_init(void)
5480 {
5481         int cpu;
5482
5483         max_tsc_khz = tsc_khz;
5484
5485         cpu_notifier_register_begin();
5486         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5487 #ifdef CONFIG_CPU_FREQ
5488                 struct cpufreq_policy policy;
5489                 memset(&policy, 0, sizeof(policy));
5490                 cpu = get_cpu();
5491                 cpufreq_get_policy(&policy, cpu);
5492                 if (policy.cpuinfo.max_freq)
5493                         max_tsc_khz = policy.cpuinfo.max_freq;
5494                 put_cpu();
5495 #endif
5496                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5497                                           CPUFREQ_TRANSITION_NOTIFIER);
5498         }
5499         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5500         for_each_online_cpu(cpu)
5501                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5502
5503         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5504         cpu_notifier_register_done();
5505
5506 }
5507
5508 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5509
5510 int kvm_is_in_guest(void)
5511 {
5512         return __this_cpu_read(current_vcpu) != NULL;
5513 }
5514
5515 static int kvm_is_user_mode(void)
5516 {
5517         int user_mode = 3;
5518
5519         if (__this_cpu_read(current_vcpu))
5520                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5521
5522         return user_mode != 0;
5523 }
5524
5525 static unsigned long kvm_get_guest_ip(void)
5526 {
5527         unsigned long ip = 0;
5528
5529         if (__this_cpu_read(current_vcpu))
5530                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5531
5532         return ip;
5533 }
5534
5535 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5536         .is_in_guest            = kvm_is_in_guest,
5537         .is_user_mode           = kvm_is_user_mode,
5538         .get_guest_ip           = kvm_get_guest_ip,
5539 };
5540
5541 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5542 {
5543         __this_cpu_write(current_vcpu, vcpu);
5544 }
5545 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5546
5547 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5548 {
5549         __this_cpu_write(current_vcpu, NULL);
5550 }
5551 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5552
5553 static void kvm_set_mmio_spte_mask(void)
5554 {
5555         u64 mask;
5556         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5557
5558         /*
5559          * Set the reserved bits and the present bit of an paging-structure
5560          * entry to generate page fault with PFER.RSV = 1.
5561          */
5562          /* Mask the reserved physical address bits. */
5563         mask = rsvd_bits(maxphyaddr, 51);
5564
5565         /* Bit 62 is always reserved for 32bit host. */
5566         mask |= 0x3ull << 62;
5567
5568         /* Set the present bit. */
5569         mask |= 1ull;
5570
5571 #ifdef CONFIG_X86_64
5572         /*
5573          * If reserved bit is not supported, clear the present bit to disable
5574          * mmio page fault.
5575          */
5576         if (maxphyaddr == 52)
5577                 mask &= ~1ull;
5578 #endif
5579
5580         kvm_mmu_set_mmio_spte_mask(mask);
5581 }
5582
5583 #ifdef CONFIG_X86_64
5584 static void pvclock_gtod_update_fn(struct work_struct *work)
5585 {
5586         struct kvm *kvm;
5587
5588         struct kvm_vcpu *vcpu;
5589         int i;
5590
5591         spin_lock(&kvm_lock);
5592         list_for_each_entry(kvm, &vm_list, vm_list)
5593                 kvm_for_each_vcpu(i, vcpu, kvm)
5594                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5595         atomic_set(&kvm_guest_has_master_clock, 0);
5596         spin_unlock(&kvm_lock);
5597 }
5598
5599 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5600
5601 /*
5602  * Notification about pvclock gtod data update.
5603  */
5604 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5605                                void *priv)
5606 {
5607         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5608         struct timekeeper *tk = priv;
5609
5610         update_pvclock_gtod(tk);
5611
5612         /* disable master clock if host does not trust, or does not
5613          * use, TSC clocksource
5614          */
5615         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5616             atomic_read(&kvm_guest_has_master_clock) != 0)
5617                 queue_work(system_long_wq, &pvclock_gtod_work);
5618
5619         return 0;
5620 }
5621
5622 static struct notifier_block pvclock_gtod_notifier = {
5623         .notifier_call = pvclock_gtod_notify,
5624 };
5625 #endif
5626
5627 int kvm_arch_init(void *opaque)
5628 {
5629         int r;
5630         struct kvm_x86_ops *ops = opaque;
5631
5632         if (kvm_x86_ops) {
5633                 printk(KERN_ERR "kvm: already loaded the other module\n");
5634                 r = -EEXIST;
5635                 goto out;
5636         }
5637
5638         if (!ops->cpu_has_kvm_support()) {
5639                 printk(KERN_ERR "kvm: no hardware support\n");
5640                 r = -EOPNOTSUPP;
5641                 goto out;
5642         }
5643         if (ops->disabled_by_bios()) {
5644                 printk(KERN_ERR "kvm: disabled by bios\n");
5645                 r = -EOPNOTSUPP;
5646                 goto out;
5647         }
5648
5649         r = -ENOMEM;
5650         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5651         if (!shared_msrs) {
5652                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5653                 goto out;
5654         }
5655
5656         r = kvm_mmu_module_init();
5657         if (r)
5658                 goto out_free_percpu;
5659
5660         kvm_set_mmio_spte_mask();
5661
5662         kvm_x86_ops = ops;
5663
5664         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5665                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5666
5667         kvm_timer_init();
5668
5669         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5670
5671         if (cpu_has_xsave)
5672                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5673
5674         kvm_lapic_init();
5675 #ifdef CONFIG_X86_64
5676         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5677 #endif
5678
5679         return 0;
5680
5681 out_free_percpu:
5682         free_percpu(shared_msrs);
5683 out:
5684         return r;
5685 }
5686
5687 void kvm_arch_exit(void)
5688 {
5689         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5690
5691         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5692                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5693                                             CPUFREQ_TRANSITION_NOTIFIER);
5694         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5695 #ifdef CONFIG_X86_64
5696         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5697 #endif
5698         kvm_x86_ops = NULL;
5699         kvm_mmu_module_exit();
5700         free_percpu(shared_msrs);
5701 }
5702
5703 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5704 {
5705         ++vcpu->stat.halt_exits;
5706         if (lapic_in_kernel(vcpu)) {
5707                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5708                 return 1;
5709         } else {
5710                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5711                 return 0;
5712         }
5713 }
5714 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5715
5716 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5717 {
5718         kvm_x86_ops->skip_emulated_instruction(vcpu);
5719         return kvm_vcpu_halt(vcpu);
5720 }
5721 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5722
5723 /*
5724  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5725  *
5726  * @apicid - apicid of vcpu to be kicked.
5727  */
5728 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5729 {
5730         struct kvm_lapic_irq lapic_irq;
5731
5732         lapic_irq.shorthand = 0;
5733         lapic_irq.dest_mode = 0;
5734         lapic_irq.dest_id = apicid;
5735         lapic_irq.msi_redir_hint = false;
5736
5737         lapic_irq.delivery_mode = APIC_DM_REMRD;
5738         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5739 }
5740
5741 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5742 {
5743         unsigned long nr, a0, a1, a2, a3, ret;
5744         int op_64_bit, r = 1;
5745
5746         kvm_x86_ops->skip_emulated_instruction(vcpu);
5747
5748         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5749                 return kvm_hv_hypercall(vcpu);
5750
5751         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5752         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5753         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5754         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5755         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5756
5757         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5758
5759         op_64_bit = is_64_bit_mode(vcpu);
5760         if (!op_64_bit) {
5761                 nr &= 0xFFFFFFFF;
5762                 a0 &= 0xFFFFFFFF;
5763                 a1 &= 0xFFFFFFFF;
5764                 a2 &= 0xFFFFFFFF;
5765                 a3 &= 0xFFFFFFFF;
5766         }
5767
5768         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5769                 ret = -KVM_EPERM;
5770                 goto out;
5771         }
5772
5773         switch (nr) {
5774         case KVM_HC_VAPIC_POLL_IRQ:
5775                 ret = 0;
5776                 break;
5777         case KVM_HC_KICK_CPU:
5778                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5779                 ret = 0;
5780                 break;
5781         default:
5782                 ret = -KVM_ENOSYS;
5783                 break;
5784         }
5785 out:
5786         if (!op_64_bit)
5787                 ret = (u32)ret;
5788         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5789         ++vcpu->stat.hypercalls;
5790         return r;
5791 }
5792 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5793
5794 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5795 {
5796         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5797         char instruction[3];
5798         unsigned long rip = kvm_rip_read(vcpu);
5799
5800         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5801
5802         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5803 }
5804
5805 /*
5806  * Check if userspace requested an interrupt window, and that the
5807  * interrupt window is open.
5808  *
5809  * No need to exit to userspace if we already have an interrupt queued.
5810  */
5811 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5812 {
5813         if (!vcpu->run->request_interrupt_window || pic_in_kernel(vcpu->kvm))
5814                 return false;
5815
5816         if (kvm_cpu_has_interrupt(vcpu))
5817                 return false;
5818
5819         return (irqchip_split(vcpu->kvm)
5820                 ? kvm_apic_accept_pic_intr(vcpu)
5821                 : kvm_arch_interrupt_allowed(vcpu));
5822 }
5823
5824 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5825 {
5826         struct kvm_run *kvm_run = vcpu->run;
5827
5828         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5829         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5830         kvm_run->cr8 = kvm_get_cr8(vcpu);
5831         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5832         if (!irqchip_in_kernel(vcpu->kvm))
5833                 kvm_run->ready_for_interrupt_injection =
5834                         kvm_arch_interrupt_allowed(vcpu) &&
5835                         !kvm_cpu_has_interrupt(vcpu) &&
5836                         !kvm_event_needs_reinjection(vcpu);
5837         else if (!pic_in_kernel(vcpu->kvm))
5838                 kvm_run->ready_for_interrupt_injection =
5839                         kvm_apic_accept_pic_intr(vcpu) &&
5840                         !kvm_cpu_has_interrupt(vcpu);
5841         else
5842                 kvm_run->ready_for_interrupt_injection = 1;
5843 }
5844
5845 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5846 {
5847         int max_irr, tpr;
5848
5849         if (!kvm_x86_ops->update_cr8_intercept)
5850                 return;
5851
5852         if (!vcpu->arch.apic)
5853                 return;
5854
5855         if (!vcpu->arch.apic->vapic_addr)
5856                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5857         else
5858                 max_irr = -1;
5859
5860         if (max_irr != -1)
5861                 max_irr >>= 4;
5862
5863         tpr = kvm_lapic_get_cr8(vcpu);
5864
5865         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5866 }
5867
5868 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5869 {
5870         int r;
5871
5872         /* try to reinject previous events if any */
5873         if (vcpu->arch.exception.pending) {
5874                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5875                                         vcpu->arch.exception.has_error_code,
5876                                         vcpu->arch.exception.error_code);
5877
5878                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5879                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5880                                              X86_EFLAGS_RF);
5881
5882                 if (vcpu->arch.exception.nr == DB_VECTOR &&
5883                     (vcpu->arch.dr7 & DR7_GD)) {
5884                         vcpu->arch.dr7 &= ~DR7_GD;
5885                         kvm_update_dr7(vcpu);
5886                 }
5887
5888                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5889                                           vcpu->arch.exception.has_error_code,
5890                                           vcpu->arch.exception.error_code,
5891                                           vcpu->arch.exception.reinject);
5892                 return 0;
5893         }
5894
5895         if (vcpu->arch.nmi_injected) {
5896                 kvm_x86_ops->set_nmi(vcpu);
5897                 return 0;
5898         }
5899
5900         if (vcpu->arch.interrupt.pending) {
5901                 kvm_x86_ops->set_irq(vcpu);
5902                 return 0;
5903         }
5904
5905         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5906                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5907                 if (r != 0)
5908                         return r;
5909         }
5910
5911         /* try to inject new event if pending */
5912         if (vcpu->arch.nmi_pending) {
5913                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5914                         --vcpu->arch.nmi_pending;
5915                         vcpu->arch.nmi_injected = true;
5916                         kvm_x86_ops->set_nmi(vcpu);
5917                 }
5918         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5919                 /*
5920                  * Because interrupts can be injected asynchronously, we are
5921                  * calling check_nested_events again here to avoid a race condition.
5922                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5923                  * proposal and current concerns.  Perhaps we should be setting
5924                  * KVM_REQ_EVENT only on certain events and not unconditionally?
5925                  */
5926                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5927                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5928                         if (r != 0)
5929                                 return r;
5930                 }
5931                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5932                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5933                                             false);
5934                         kvm_x86_ops->set_irq(vcpu);
5935                 }
5936         }
5937         return 0;
5938 }
5939
5940 static void process_nmi(struct kvm_vcpu *vcpu)
5941 {
5942         unsigned limit = 2;
5943
5944         /*
5945          * x86 is limited to one NMI running, and one NMI pending after it.
5946          * If an NMI is already in progress, limit further NMIs to just one.
5947          * Otherwise, allow two (and we'll inject the first one immediately).
5948          */
5949         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5950                 limit = 1;
5951
5952         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5953         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5954         kvm_make_request(KVM_REQ_EVENT, vcpu);
5955 }
5956
5957 #define put_smstate(type, buf, offset, val)                       \
5958         *(type *)((buf) + (offset) - 0x7e00) = val
5959
5960 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
5961 {
5962         u32 flags = 0;
5963         flags |= seg->g       << 23;
5964         flags |= seg->db      << 22;
5965         flags |= seg->l       << 21;
5966         flags |= seg->avl     << 20;
5967         flags |= seg->present << 15;
5968         flags |= seg->dpl     << 13;
5969         flags |= seg->s       << 12;
5970         flags |= seg->type    << 8;
5971         return flags;
5972 }
5973
5974 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
5975 {
5976         struct kvm_segment seg;
5977         int offset;
5978
5979         kvm_get_segment(vcpu, &seg, n);
5980         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
5981
5982         if (n < 3)
5983                 offset = 0x7f84 + n * 12;
5984         else
5985                 offset = 0x7f2c + (n - 3) * 12;
5986
5987         put_smstate(u32, buf, offset + 8, seg.base);
5988         put_smstate(u32, buf, offset + 4, seg.limit);
5989         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
5990 }
5991
5992 #ifdef CONFIG_X86_64
5993 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
5994 {
5995         struct kvm_segment seg;
5996         int offset;
5997         u16 flags;
5998
5999         kvm_get_segment(vcpu, &seg, n);
6000         offset = 0x7e00 + n * 16;
6001
6002         flags = process_smi_get_segment_flags(&seg) >> 8;
6003         put_smstate(u16, buf, offset, seg.selector);
6004         put_smstate(u16, buf, offset + 2, flags);
6005         put_smstate(u32, buf, offset + 4, seg.limit);
6006         put_smstate(u64, buf, offset + 8, seg.base);
6007 }
6008 #endif
6009
6010 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6011 {
6012         struct desc_ptr dt;
6013         struct kvm_segment seg;
6014         unsigned long val;
6015         int i;
6016
6017         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6018         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6019         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6020         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6021
6022         for (i = 0; i < 8; i++)
6023                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6024
6025         kvm_get_dr(vcpu, 6, &val);
6026         put_smstate(u32, buf, 0x7fcc, (u32)val);
6027         kvm_get_dr(vcpu, 7, &val);
6028         put_smstate(u32, buf, 0x7fc8, (u32)val);
6029
6030         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6031         put_smstate(u32, buf, 0x7fc4, seg.selector);
6032         put_smstate(u32, buf, 0x7f64, seg.base);
6033         put_smstate(u32, buf, 0x7f60, seg.limit);
6034         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6035
6036         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6037         put_smstate(u32, buf, 0x7fc0, seg.selector);
6038         put_smstate(u32, buf, 0x7f80, seg.base);
6039         put_smstate(u32, buf, 0x7f7c, seg.limit);
6040         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6041
6042         kvm_x86_ops->get_gdt(vcpu, &dt);
6043         put_smstate(u32, buf, 0x7f74, dt.address);
6044         put_smstate(u32, buf, 0x7f70, dt.size);
6045
6046         kvm_x86_ops->get_idt(vcpu, &dt);
6047         put_smstate(u32, buf, 0x7f58, dt.address);
6048         put_smstate(u32, buf, 0x7f54, dt.size);
6049
6050         for (i = 0; i < 6; i++)
6051                 process_smi_save_seg_32(vcpu, buf, i);
6052
6053         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6054
6055         /* revision id */
6056         put_smstate(u32, buf, 0x7efc, 0x00020000);
6057         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6058 }
6059
6060 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6061 {
6062 #ifdef CONFIG_X86_64
6063         struct desc_ptr dt;
6064         struct kvm_segment seg;
6065         unsigned long val;
6066         int i;
6067
6068         for (i = 0; i < 16; i++)
6069                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6070
6071         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6072         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6073
6074         kvm_get_dr(vcpu, 6, &val);
6075         put_smstate(u64, buf, 0x7f68, val);
6076         kvm_get_dr(vcpu, 7, &val);
6077         put_smstate(u64, buf, 0x7f60, val);
6078
6079         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6080         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6081         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6082
6083         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6084
6085         /* revision id */
6086         put_smstate(u32, buf, 0x7efc, 0x00020064);
6087
6088         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6089
6090         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6091         put_smstate(u16, buf, 0x7e90, seg.selector);
6092         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6093         put_smstate(u32, buf, 0x7e94, seg.limit);
6094         put_smstate(u64, buf, 0x7e98, seg.base);
6095
6096         kvm_x86_ops->get_idt(vcpu, &dt);
6097         put_smstate(u32, buf, 0x7e84, dt.size);
6098         put_smstate(u64, buf, 0x7e88, dt.address);
6099
6100         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6101         put_smstate(u16, buf, 0x7e70, seg.selector);
6102         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6103         put_smstate(u32, buf, 0x7e74, seg.limit);
6104         put_smstate(u64, buf, 0x7e78, seg.base);
6105
6106         kvm_x86_ops->get_gdt(vcpu, &dt);
6107         put_smstate(u32, buf, 0x7e64, dt.size);
6108         put_smstate(u64, buf, 0x7e68, dt.address);
6109
6110         for (i = 0; i < 6; i++)
6111                 process_smi_save_seg_64(vcpu, buf, i);
6112 #else
6113         WARN_ON_ONCE(1);
6114 #endif
6115 }
6116
6117 static void process_smi(struct kvm_vcpu *vcpu)
6118 {
6119         struct kvm_segment cs, ds;
6120         struct desc_ptr dt;
6121         char buf[512];
6122         u32 cr0;
6123
6124         if (is_smm(vcpu)) {
6125                 vcpu->arch.smi_pending = true;
6126                 return;
6127         }
6128
6129         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6130         vcpu->arch.hflags |= HF_SMM_MASK;
6131         memset(buf, 0, 512);
6132         if (guest_cpuid_has_longmode(vcpu))
6133                 process_smi_save_state_64(vcpu, buf);
6134         else
6135                 process_smi_save_state_32(vcpu, buf);
6136
6137         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6138
6139         if (kvm_x86_ops->get_nmi_mask(vcpu))
6140                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6141         else
6142                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6143
6144         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6145         kvm_rip_write(vcpu, 0x8000);
6146
6147         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6148         kvm_x86_ops->set_cr0(vcpu, cr0);
6149         vcpu->arch.cr0 = cr0;
6150
6151         kvm_x86_ops->set_cr4(vcpu, 0);
6152
6153         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6154         dt.address = dt.size = 0;
6155         kvm_x86_ops->set_idt(vcpu, &dt);
6156
6157         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6158
6159         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6160         cs.base = vcpu->arch.smbase;
6161
6162         ds.selector = 0;
6163         ds.base = 0;
6164
6165         cs.limit    = ds.limit = 0xffffffff;
6166         cs.type     = ds.type = 0x3;
6167         cs.dpl      = ds.dpl = 0;
6168         cs.db       = ds.db = 0;
6169         cs.s        = ds.s = 1;
6170         cs.l        = ds.l = 0;
6171         cs.g        = ds.g = 1;
6172         cs.avl      = ds.avl = 0;
6173         cs.present  = ds.present = 1;
6174         cs.unusable = ds.unusable = 0;
6175         cs.padding  = ds.padding = 0;
6176
6177         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6178         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6179         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6180         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6181         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6182         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6183
6184         if (guest_cpuid_has_longmode(vcpu))
6185                 kvm_x86_ops->set_efer(vcpu, 0);
6186
6187         kvm_update_cpuid(vcpu);
6188         kvm_mmu_reset_context(vcpu);
6189 }
6190
6191 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6192 {
6193         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6194                 return;
6195
6196         memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6197
6198         if (irqchip_split(vcpu->kvm))
6199                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6200         else {
6201                 kvm_x86_ops->sync_pir_to_irr(vcpu);
6202                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6203         }
6204         kvm_x86_ops->load_eoi_exitmap(vcpu);
6205 }
6206
6207 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6208 {
6209         ++vcpu->stat.tlb_flush;
6210         kvm_x86_ops->tlb_flush(vcpu);
6211 }
6212
6213 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6214 {
6215         struct page *page = NULL;
6216
6217         if (!lapic_in_kernel(vcpu))
6218                 return;
6219
6220         if (!kvm_x86_ops->set_apic_access_page_addr)
6221                 return;
6222
6223         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6224         if (is_error_page(page))
6225                 return;
6226         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6227
6228         /*
6229          * Do not pin apic access page in memory, the MMU notifier
6230          * will call us again if it is migrated or swapped out.
6231          */
6232         put_page(page);
6233 }
6234 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6235
6236 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6237                                            unsigned long address)
6238 {
6239         /*
6240          * The physical address of apic access page is stored in the VMCS.
6241          * Update it when it becomes invalid.
6242          */
6243         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6244                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6245 }
6246
6247 /*
6248  * Returns 1 to let vcpu_run() continue the guest execution loop without
6249  * exiting to the userspace.  Otherwise, the value will be returned to the
6250  * userspace.
6251  */
6252 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6253 {
6254         int r;
6255         bool req_int_win = !lapic_in_kernel(vcpu) &&
6256                 vcpu->run->request_interrupt_window;
6257         bool req_immediate_exit = false;
6258
6259         if (vcpu->requests) {
6260                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6261                         kvm_mmu_unload(vcpu);
6262                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6263                         __kvm_migrate_timers(vcpu);
6264                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6265                         kvm_gen_update_masterclock(vcpu->kvm);
6266                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6267                         kvm_gen_kvmclock_update(vcpu);
6268                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6269                         r = kvm_guest_time_update(vcpu);
6270                         if (unlikely(r))
6271                                 goto out;
6272                 }
6273                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6274                         kvm_mmu_sync_roots(vcpu);
6275                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6276                         kvm_vcpu_flush_tlb(vcpu);
6277                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6278                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6279                         r = 0;
6280                         goto out;
6281                 }
6282                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6283                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6284                         r = 0;
6285                         goto out;
6286                 }
6287                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6288                         vcpu->fpu_active = 0;
6289                         kvm_x86_ops->fpu_deactivate(vcpu);
6290                 }
6291                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6292                         /* Page is swapped out. Do synthetic halt */
6293                         vcpu->arch.apf.halted = true;
6294                         r = 1;
6295                         goto out;
6296                 }
6297                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6298                         record_steal_time(vcpu);
6299                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6300                         process_smi(vcpu);
6301                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6302                         process_nmi(vcpu);
6303                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6304                         kvm_pmu_handle_event(vcpu);
6305                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6306                         kvm_pmu_deliver_pmi(vcpu);
6307                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6308                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6309                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6310                                      (void *) vcpu->arch.eoi_exit_bitmap)) {
6311                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6312                                 vcpu->run->eoi.vector =
6313                                                 vcpu->arch.pending_ioapic_eoi;
6314                                 r = 0;
6315                                 goto out;
6316                         }
6317                 }
6318                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6319                         vcpu_scan_ioapic(vcpu);
6320                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6321                         kvm_vcpu_reload_apic_access_page(vcpu);
6322                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6323                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6324                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6325                         r = 0;
6326                         goto out;
6327                 }
6328                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6329                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6330                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6331                         r = 0;
6332                         goto out;
6333                 }
6334         }
6335
6336         /*
6337          * KVM_REQ_EVENT is not set when posted interrupts are set by
6338          * VT-d hardware, so we have to update RVI unconditionally.
6339          */
6340         if (kvm_lapic_enabled(vcpu)) {
6341                 /*
6342                  * Update architecture specific hints for APIC
6343                  * virtual interrupt delivery.
6344                  */
6345                 if (kvm_x86_ops->hwapic_irr_update)
6346                         kvm_x86_ops->hwapic_irr_update(vcpu,
6347                                 kvm_lapic_find_highest_irr(vcpu));
6348         }
6349
6350         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6351                 kvm_apic_accept_events(vcpu);
6352                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6353                         r = 1;
6354                         goto out;
6355                 }
6356
6357                 if (inject_pending_event(vcpu, req_int_win) != 0)
6358                         req_immediate_exit = true;
6359                 /* enable NMI/IRQ window open exits if needed */
6360                 else if (vcpu->arch.nmi_pending)
6361                         kvm_x86_ops->enable_nmi_window(vcpu);
6362                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6363                         kvm_x86_ops->enable_irq_window(vcpu);
6364
6365                 if (kvm_lapic_enabled(vcpu)) {
6366                         update_cr8_intercept(vcpu);
6367                         kvm_lapic_sync_to_vapic(vcpu);
6368                 }
6369         }
6370
6371         r = kvm_mmu_reload(vcpu);
6372         if (unlikely(r)) {
6373                 goto cancel_injection;
6374         }
6375
6376         preempt_disable();
6377
6378         kvm_x86_ops->prepare_guest_switch(vcpu);
6379         if (vcpu->fpu_active)
6380                 kvm_load_guest_fpu(vcpu);
6381         kvm_load_guest_xcr0(vcpu);
6382
6383         vcpu->mode = IN_GUEST_MODE;
6384
6385         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6386
6387         /* We should set ->mode before check ->requests,
6388          * see the comment in make_all_cpus_request.
6389          */
6390         smp_mb__after_srcu_read_unlock();
6391
6392         local_irq_disable();
6393
6394         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6395             || need_resched() || signal_pending(current)) {
6396                 vcpu->mode = OUTSIDE_GUEST_MODE;
6397                 smp_wmb();
6398                 local_irq_enable();
6399                 preempt_enable();
6400                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6401                 r = 1;
6402                 goto cancel_injection;
6403         }
6404
6405         if (req_immediate_exit)
6406                 smp_send_reschedule(vcpu->cpu);
6407
6408         __kvm_guest_enter();
6409
6410         if (unlikely(vcpu->arch.switch_db_regs)) {
6411                 set_debugreg(0, 7);
6412                 set_debugreg(vcpu->arch.eff_db[0], 0);
6413                 set_debugreg(vcpu->arch.eff_db[1], 1);
6414                 set_debugreg(vcpu->arch.eff_db[2], 2);
6415                 set_debugreg(vcpu->arch.eff_db[3], 3);
6416                 set_debugreg(vcpu->arch.dr6, 6);
6417                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6418         }
6419
6420         trace_kvm_entry(vcpu->vcpu_id);
6421         wait_lapic_expire(vcpu);
6422         kvm_x86_ops->run(vcpu);
6423
6424         /*
6425          * Do this here before restoring debug registers on the host.  And
6426          * since we do this before handling the vmexit, a DR access vmexit
6427          * can (a) read the correct value of the debug registers, (b) set
6428          * KVM_DEBUGREG_WONT_EXIT again.
6429          */
6430         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6431                 int i;
6432
6433                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6434                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6435                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6436                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6437         }
6438
6439         /*
6440          * If the guest has used debug registers, at least dr7
6441          * will be disabled while returning to the host.
6442          * If we don't have active breakpoints in the host, we don't
6443          * care about the messed up debug address registers. But if
6444          * we have some of them active, restore the old state.
6445          */
6446         if (hw_breakpoint_active())
6447                 hw_breakpoint_restore();
6448
6449         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6450                                                            rdtsc());
6451
6452         vcpu->mode = OUTSIDE_GUEST_MODE;
6453         smp_wmb();
6454
6455         /* Interrupt is enabled by handle_external_intr() */
6456         kvm_x86_ops->handle_external_intr(vcpu);
6457
6458         ++vcpu->stat.exits;
6459
6460         /*
6461          * We must have an instruction between local_irq_enable() and
6462          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6463          * the interrupt shadow.  The stat.exits increment will do nicely.
6464          * But we need to prevent reordering, hence this barrier():
6465          */
6466         barrier();
6467
6468         kvm_guest_exit();
6469
6470         preempt_enable();
6471
6472         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6473
6474         /*
6475          * Profile KVM exit RIPs:
6476          */
6477         if (unlikely(prof_on == KVM_PROFILING)) {
6478                 unsigned long rip = kvm_rip_read(vcpu);
6479                 profile_hit(KVM_PROFILING, (void *)rip);
6480         }
6481
6482         if (unlikely(vcpu->arch.tsc_always_catchup))
6483                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6484
6485         if (vcpu->arch.apic_attention)
6486                 kvm_lapic_sync_from_vapic(vcpu);
6487
6488         r = kvm_x86_ops->handle_exit(vcpu);
6489         return r;
6490
6491 cancel_injection:
6492         kvm_x86_ops->cancel_injection(vcpu);
6493         if (unlikely(vcpu->arch.apic_attention))
6494                 kvm_lapic_sync_from_vapic(vcpu);
6495 out:
6496         return r;
6497 }
6498
6499 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6500 {
6501         if (!kvm_arch_vcpu_runnable(vcpu) &&
6502             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6503                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6504                 kvm_vcpu_block(vcpu);
6505                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6506
6507                 if (kvm_x86_ops->post_block)
6508                         kvm_x86_ops->post_block(vcpu);
6509
6510                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6511                         return 1;
6512         }
6513
6514         kvm_apic_accept_events(vcpu);
6515         switch(vcpu->arch.mp_state) {
6516         case KVM_MP_STATE_HALTED:
6517                 vcpu->arch.pv.pv_unhalted = false;
6518                 vcpu->arch.mp_state =
6519                         KVM_MP_STATE_RUNNABLE;
6520         case KVM_MP_STATE_RUNNABLE:
6521                 vcpu->arch.apf.halted = false;
6522                 break;
6523         case KVM_MP_STATE_INIT_RECEIVED:
6524                 break;
6525         default:
6526                 return -EINTR;
6527                 break;
6528         }
6529         return 1;
6530 }
6531
6532 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6533 {
6534         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6535                 !vcpu->arch.apf.halted);
6536 }
6537
6538 static int vcpu_run(struct kvm_vcpu *vcpu)
6539 {
6540         int r;
6541         struct kvm *kvm = vcpu->kvm;
6542
6543         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6544
6545         for (;;) {
6546                 if (kvm_vcpu_running(vcpu)) {
6547                         r = vcpu_enter_guest(vcpu);
6548                 } else {
6549                         r = vcpu_block(kvm, vcpu);
6550                 }
6551
6552                 if (r <= 0)
6553                         break;
6554
6555                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6556                 if (kvm_cpu_has_pending_timer(vcpu))
6557                         kvm_inject_pending_timer_irqs(vcpu);
6558
6559                 if (dm_request_for_irq_injection(vcpu)) {
6560                         r = 0;
6561                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6562                         ++vcpu->stat.request_irq_exits;
6563                         break;
6564                 }
6565
6566                 kvm_check_async_pf_completion(vcpu);
6567
6568                 if (signal_pending(current)) {
6569                         r = -EINTR;
6570                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6571                         ++vcpu->stat.signal_exits;
6572                         break;
6573                 }
6574                 if (need_resched()) {
6575                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6576                         cond_resched();
6577                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6578                 }
6579         }
6580
6581         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6582
6583         return r;
6584 }
6585
6586 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6587 {
6588         int r;
6589         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6590         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6591         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6592         if (r != EMULATE_DONE)
6593                 return 0;
6594         return 1;
6595 }
6596
6597 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6598 {
6599         BUG_ON(!vcpu->arch.pio.count);
6600
6601         return complete_emulated_io(vcpu);
6602 }
6603
6604 /*
6605  * Implements the following, as a state machine:
6606  *
6607  * read:
6608  *   for each fragment
6609  *     for each mmio piece in the fragment
6610  *       write gpa, len
6611  *       exit
6612  *       copy data
6613  *   execute insn
6614  *
6615  * write:
6616  *   for each fragment
6617  *     for each mmio piece in the fragment
6618  *       write gpa, len
6619  *       copy data
6620  *       exit
6621  */
6622 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6623 {
6624         struct kvm_run *run = vcpu->run;
6625         struct kvm_mmio_fragment *frag;
6626         unsigned len;
6627
6628         BUG_ON(!vcpu->mmio_needed);
6629
6630         /* Complete previous fragment */
6631         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6632         len = min(8u, frag->len);
6633         if (!vcpu->mmio_is_write)
6634                 memcpy(frag->data, run->mmio.data, len);
6635
6636         if (frag->len <= 8) {
6637                 /* Switch to the next fragment. */
6638                 frag++;
6639                 vcpu->mmio_cur_fragment++;
6640         } else {
6641                 /* Go forward to the next mmio piece. */
6642                 frag->data += len;
6643                 frag->gpa += len;
6644                 frag->len -= len;
6645         }
6646
6647         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6648                 vcpu->mmio_needed = 0;
6649
6650                 /* FIXME: return into emulator if single-stepping.  */
6651                 if (vcpu->mmio_is_write)
6652                         return 1;
6653                 vcpu->mmio_read_completed = 1;
6654                 return complete_emulated_io(vcpu);
6655         }
6656
6657         run->exit_reason = KVM_EXIT_MMIO;
6658         run->mmio.phys_addr = frag->gpa;
6659         if (vcpu->mmio_is_write)
6660                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6661         run->mmio.len = min(8u, frag->len);
6662         run->mmio.is_write = vcpu->mmio_is_write;
6663         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6664         return 0;
6665 }
6666
6667
6668 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6669 {
6670         struct fpu *fpu = &current->thread.fpu;
6671         int r;
6672         sigset_t sigsaved;
6673
6674         fpu__activate_curr(fpu);
6675
6676         if (vcpu->sigset_active)
6677                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6678
6679         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6680                 kvm_vcpu_block(vcpu);
6681                 kvm_apic_accept_events(vcpu);
6682                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6683                 r = -EAGAIN;
6684                 goto out;
6685         }
6686
6687         /* re-sync apic's tpr */
6688         if (!lapic_in_kernel(vcpu)) {
6689                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6690                         r = -EINVAL;
6691                         goto out;
6692                 }
6693         }
6694
6695         if (unlikely(vcpu->arch.complete_userspace_io)) {
6696                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6697                 vcpu->arch.complete_userspace_io = NULL;
6698                 r = cui(vcpu);
6699                 if (r <= 0)
6700                         goto out;
6701         } else
6702                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6703
6704         r = vcpu_run(vcpu);
6705
6706 out:
6707         post_kvm_run_save(vcpu);
6708         if (vcpu->sigset_active)
6709                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6710
6711         return r;
6712 }
6713
6714 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6715 {
6716         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6717                 /*
6718                  * We are here if userspace calls get_regs() in the middle of
6719                  * instruction emulation. Registers state needs to be copied
6720                  * back from emulation context to vcpu. Userspace shouldn't do
6721                  * that usually, but some bad designed PV devices (vmware
6722                  * backdoor interface) need this to work
6723                  */
6724                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6725                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6726         }
6727         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6728         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6729         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6730         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6731         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6732         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6733         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6734         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6735 #ifdef CONFIG_X86_64
6736         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6737         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6738         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6739         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6740         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6741         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6742         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6743         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6744 #endif
6745
6746         regs->rip = kvm_rip_read(vcpu);
6747         regs->rflags = kvm_get_rflags(vcpu);
6748
6749         return 0;
6750 }
6751
6752 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6753 {
6754         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6755         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6756
6757         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6758         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6759         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6760         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6761         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6762         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6763         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6764         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6765 #ifdef CONFIG_X86_64
6766         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6767         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6768         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6769         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6770         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6771         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6772         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6773         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6774 #endif
6775
6776         kvm_rip_write(vcpu, regs->rip);
6777         kvm_set_rflags(vcpu, regs->rflags);
6778
6779         vcpu->arch.exception.pending = false;
6780
6781         kvm_make_request(KVM_REQ_EVENT, vcpu);
6782
6783         return 0;
6784 }
6785
6786 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6787 {
6788         struct kvm_segment cs;
6789
6790         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6791         *db = cs.db;
6792         *l = cs.l;
6793 }
6794 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6795
6796 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6797                                   struct kvm_sregs *sregs)
6798 {
6799         struct desc_ptr dt;
6800
6801         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6802         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6803         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6804         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6805         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6806         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6807
6808         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6809         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6810
6811         kvm_x86_ops->get_idt(vcpu, &dt);
6812         sregs->idt.limit = dt.size;
6813         sregs->idt.base = dt.address;
6814         kvm_x86_ops->get_gdt(vcpu, &dt);
6815         sregs->gdt.limit = dt.size;
6816         sregs->gdt.base = dt.address;
6817
6818         sregs->cr0 = kvm_read_cr0(vcpu);
6819         sregs->cr2 = vcpu->arch.cr2;
6820         sregs->cr3 = kvm_read_cr3(vcpu);
6821         sregs->cr4 = kvm_read_cr4(vcpu);
6822         sregs->cr8 = kvm_get_cr8(vcpu);
6823         sregs->efer = vcpu->arch.efer;
6824         sregs->apic_base = kvm_get_apic_base(vcpu);
6825
6826         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6827
6828         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6829                 set_bit(vcpu->arch.interrupt.nr,
6830                         (unsigned long *)sregs->interrupt_bitmap);
6831
6832         return 0;
6833 }
6834
6835 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6836                                     struct kvm_mp_state *mp_state)
6837 {
6838         kvm_apic_accept_events(vcpu);
6839         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6840                                         vcpu->arch.pv.pv_unhalted)
6841                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6842         else
6843                 mp_state->mp_state = vcpu->arch.mp_state;
6844
6845         return 0;
6846 }
6847
6848 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6849                                     struct kvm_mp_state *mp_state)
6850 {
6851         if (!kvm_vcpu_has_lapic(vcpu) &&
6852             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6853                 return -EINVAL;
6854
6855         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6856                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6857                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6858         } else
6859                 vcpu->arch.mp_state = mp_state->mp_state;
6860         kvm_make_request(KVM_REQ_EVENT, vcpu);
6861         return 0;
6862 }
6863
6864 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6865                     int reason, bool has_error_code, u32 error_code)
6866 {
6867         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6868         int ret;
6869
6870         init_emulate_ctxt(vcpu);
6871
6872         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6873                                    has_error_code, error_code);
6874
6875         if (ret)
6876                 return EMULATE_FAIL;
6877
6878         kvm_rip_write(vcpu, ctxt->eip);
6879         kvm_set_rflags(vcpu, ctxt->eflags);
6880         kvm_make_request(KVM_REQ_EVENT, vcpu);
6881         return EMULATE_DONE;
6882 }
6883 EXPORT_SYMBOL_GPL(kvm_task_switch);
6884
6885 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6886                                   struct kvm_sregs *sregs)
6887 {
6888         struct msr_data apic_base_msr;
6889         int mmu_reset_needed = 0;
6890         int pending_vec, max_bits, idx;
6891         struct desc_ptr dt;
6892
6893         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6894                 return -EINVAL;
6895
6896         dt.size = sregs->idt.limit;
6897         dt.address = sregs->idt.base;
6898         kvm_x86_ops->set_idt(vcpu, &dt);
6899         dt.size = sregs->gdt.limit;
6900         dt.address = sregs->gdt.base;
6901         kvm_x86_ops->set_gdt(vcpu, &dt);
6902
6903         vcpu->arch.cr2 = sregs->cr2;
6904         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6905         vcpu->arch.cr3 = sregs->cr3;
6906         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6907
6908         kvm_set_cr8(vcpu, sregs->cr8);
6909
6910         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6911         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6912         apic_base_msr.data = sregs->apic_base;
6913         apic_base_msr.host_initiated = true;
6914         kvm_set_apic_base(vcpu, &apic_base_msr);
6915
6916         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6917         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6918         vcpu->arch.cr0 = sregs->cr0;
6919
6920         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6921         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6922         if (sregs->cr4 & X86_CR4_OSXSAVE)
6923                 kvm_update_cpuid(vcpu);
6924
6925         idx = srcu_read_lock(&vcpu->kvm->srcu);
6926         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6927                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6928                 mmu_reset_needed = 1;
6929         }
6930         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6931
6932         if (mmu_reset_needed)
6933                 kvm_mmu_reset_context(vcpu);
6934
6935         max_bits = KVM_NR_INTERRUPTS;
6936         pending_vec = find_first_bit(
6937                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6938         if (pending_vec < max_bits) {
6939                 kvm_queue_interrupt(vcpu, pending_vec, false);
6940                 pr_debug("Set back pending irq %d\n", pending_vec);
6941         }
6942
6943         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6944         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6945         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6946         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6947         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6948         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6949
6950         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6951         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6952
6953         update_cr8_intercept(vcpu);
6954
6955         /* Older userspace won't unhalt the vcpu on reset. */
6956         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6957             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6958             !is_protmode(vcpu))
6959                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6960
6961         kvm_make_request(KVM_REQ_EVENT, vcpu);
6962
6963         return 0;
6964 }
6965
6966 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6967                                         struct kvm_guest_debug *dbg)
6968 {
6969         unsigned long rflags;
6970         int i, r;
6971
6972         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6973                 r = -EBUSY;
6974                 if (vcpu->arch.exception.pending)
6975                         goto out;
6976                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6977                         kvm_queue_exception(vcpu, DB_VECTOR);
6978                 else
6979                         kvm_queue_exception(vcpu, BP_VECTOR);
6980         }
6981
6982         /*
6983          * Read rflags as long as potentially injected trace flags are still
6984          * filtered out.
6985          */
6986         rflags = kvm_get_rflags(vcpu);
6987
6988         vcpu->guest_debug = dbg->control;
6989         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6990                 vcpu->guest_debug = 0;
6991
6992         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6993                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6994                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6995                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6996         } else {
6997                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6998                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6999         }
7000         kvm_update_dr7(vcpu);
7001
7002         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7003                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7004                         get_segment_base(vcpu, VCPU_SREG_CS);
7005
7006         /*
7007          * Trigger an rflags update that will inject or remove the trace
7008          * flags.
7009          */
7010         kvm_set_rflags(vcpu, rflags);
7011
7012         kvm_x86_ops->update_db_bp_intercept(vcpu);
7013
7014         r = 0;
7015
7016 out:
7017
7018         return r;
7019 }
7020
7021 /*
7022  * Translate a guest virtual address to a guest physical address.
7023  */
7024 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7025                                     struct kvm_translation *tr)
7026 {
7027         unsigned long vaddr = tr->linear_address;
7028         gpa_t gpa;
7029         int idx;
7030
7031         idx = srcu_read_lock(&vcpu->kvm->srcu);
7032         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7033         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7034         tr->physical_address = gpa;
7035         tr->valid = gpa != UNMAPPED_GVA;
7036         tr->writeable = 1;
7037         tr->usermode = 0;
7038
7039         return 0;
7040 }
7041
7042 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7043 {
7044         struct fxregs_state *fxsave =
7045                         &vcpu->arch.guest_fpu.state.fxsave;
7046
7047         memcpy(fpu->fpr, fxsave->st_space, 128);
7048         fpu->fcw = fxsave->cwd;
7049         fpu->fsw = fxsave->swd;
7050         fpu->ftwx = fxsave->twd;
7051         fpu->last_opcode = fxsave->fop;
7052         fpu->last_ip = fxsave->rip;
7053         fpu->last_dp = fxsave->rdp;
7054         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7055
7056         return 0;
7057 }
7058
7059 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7060 {
7061         struct fxregs_state *fxsave =
7062                         &vcpu->arch.guest_fpu.state.fxsave;
7063
7064         memcpy(fxsave->st_space, fpu->fpr, 128);
7065         fxsave->cwd = fpu->fcw;
7066         fxsave->swd = fpu->fsw;
7067         fxsave->twd = fpu->ftwx;
7068         fxsave->fop = fpu->last_opcode;
7069         fxsave->rip = fpu->last_ip;
7070         fxsave->rdp = fpu->last_dp;
7071         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7072
7073         return 0;
7074 }
7075
7076 static void fx_init(struct kvm_vcpu *vcpu)
7077 {
7078         fpstate_init(&vcpu->arch.guest_fpu.state);
7079         if (cpu_has_xsaves)
7080                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7081                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7082
7083         /*
7084          * Ensure guest xcr0 is valid for loading
7085          */
7086         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7087
7088         vcpu->arch.cr0 |= X86_CR0_ET;
7089 }
7090
7091 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7092 {
7093         if (vcpu->guest_fpu_loaded)
7094                 return;
7095
7096         /*
7097          * Restore all possible states in the guest,
7098          * and assume host would use all available bits.
7099          * Guest xcr0 would be loaded later.
7100          */
7101         kvm_put_guest_xcr0(vcpu);
7102         vcpu->guest_fpu_loaded = 1;
7103         __kernel_fpu_begin();
7104         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7105         trace_kvm_fpu(1);
7106 }
7107
7108 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7109 {
7110         kvm_put_guest_xcr0(vcpu);
7111
7112         if (!vcpu->guest_fpu_loaded) {
7113                 vcpu->fpu_counter = 0;
7114                 return;
7115         }
7116
7117         vcpu->guest_fpu_loaded = 0;
7118         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7119         __kernel_fpu_end();
7120         ++vcpu->stat.fpu_reload;
7121         /*
7122          * If using eager FPU mode, or if the guest is a frequent user
7123          * of the FPU, just leave the FPU active for next time.
7124          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7125          * the FPU in bursts will revert to loading it on demand.
7126          */
7127         if (!vcpu->arch.eager_fpu) {
7128                 if (++vcpu->fpu_counter < 5)
7129                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7130         }
7131         trace_kvm_fpu(0);
7132 }
7133
7134 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7135 {
7136         kvmclock_reset(vcpu);
7137
7138         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7139         kvm_x86_ops->vcpu_free(vcpu);
7140 }
7141
7142 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7143                                                 unsigned int id)
7144 {
7145         struct kvm_vcpu *vcpu;
7146
7147         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7148                 printk_once(KERN_WARNING
7149                 "kvm: SMP vm created on host with unstable TSC; "
7150                 "guest TSC will not be reliable\n");
7151
7152         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7153
7154         return vcpu;
7155 }
7156
7157 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7158 {
7159         int r;
7160
7161         kvm_vcpu_mtrr_init(vcpu);
7162         r = vcpu_load(vcpu);
7163         if (r)
7164                 return r;
7165         kvm_vcpu_reset(vcpu, false);
7166         kvm_mmu_setup(vcpu);
7167         vcpu_put(vcpu);
7168         return r;
7169 }
7170
7171 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7172 {
7173         struct msr_data msr;
7174         struct kvm *kvm = vcpu->kvm;
7175
7176         if (vcpu_load(vcpu))
7177                 return;
7178         msr.data = 0x0;
7179         msr.index = MSR_IA32_TSC;
7180         msr.host_initiated = true;
7181         kvm_write_tsc(vcpu, &msr);
7182         vcpu_put(vcpu);
7183
7184         if (!kvmclock_periodic_sync)
7185                 return;
7186
7187         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7188                                         KVMCLOCK_SYNC_PERIOD);
7189 }
7190
7191 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7192 {
7193         int r;
7194         vcpu->arch.apf.msr_val = 0;
7195
7196         r = vcpu_load(vcpu);
7197         BUG_ON(r);
7198         kvm_mmu_unload(vcpu);
7199         vcpu_put(vcpu);
7200
7201         kvm_x86_ops->vcpu_free(vcpu);
7202 }
7203
7204 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7205 {
7206         vcpu->arch.hflags = 0;
7207
7208         atomic_set(&vcpu->arch.nmi_queued, 0);
7209         vcpu->arch.nmi_pending = 0;
7210         vcpu->arch.nmi_injected = false;
7211         kvm_clear_interrupt_queue(vcpu);
7212         kvm_clear_exception_queue(vcpu);
7213
7214         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7215         kvm_update_dr0123(vcpu);
7216         vcpu->arch.dr6 = DR6_INIT;
7217         kvm_update_dr6(vcpu);
7218         vcpu->arch.dr7 = DR7_FIXED_1;
7219         kvm_update_dr7(vcpu);
7220
7221         vcpu->arch.cr2 = 0;
7222
7223         kvm_make_request(KVM_REQ_EVENT, vcpu);
7224         vcpu->arch.apf.msr_val = 0;
7225         vcpu->arch.st.msr_val = 0;
7226
7227         kvmclock_reset(vcpu);
7228
7229         kvm_clear_async_pf_completion_queue(vcpu);
7230         kvm_async_pf_hash_reset(vcpu);
7231         vcpu->arch.apf.halted = false;
7232
7233         if (!init_event) {
7234                 kvm_pmu_reset(vcpu);
7235                 vcpu->arch.smbase = 0x30000;
7236         }
7237
7238         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7239         vcpu->arch.regs_avail = ~0;
7240         vcpu->arch.regs_dirty = ~0;
7241
7242         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7243 }
7244
7245 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7246 {
7247         struct kvm_segment cs;
7248
7249         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7250         cs.selector = vector << 8;
7251         cs.base = vector << 12;
7252         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7253         kvm_rip_write(vcpu, 0);
7254 }
7255
7256 int kvm_arch_hardware_enable(void)
7257 {
7258         struct kvm *kvm;
7259         struct kvm_vcpu *vcpu;
7260         int i;
7261         int ret;
7262         u64 local_tsc;
7263         u64 max_tsc = 0;
7264         bool stable, backwards_tsc = false;
7265
7266         kvm_shared_msr_cpu_online();
7267         ret = kvm_x86_ops->hardware_enable();
7268         if (ret != 0)
7269                 return ret;
7270
7271         local_tsc = rdtsc();
7272         stable = !check_tsc_unstable();
7273         list_for_each_entry(kvm, &vm_list, vm_list) {
7274                 kvm_for_each_vcpu(i, vcpu, kvm) {
7275                         if (!stable && vcpu->cpu == smp_processor_id())
7276                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7277                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7278                                 backwards_tsc = true;
7279                                 if (vcpu->arch.last_host_tsc > max_tsc)
7280                                         max_tsc = vcpu->arch.last_host_tsc;
7281                         }
7282                 }
7283         }
7284
7285         /*
7286          * Sometimes, even reliable TSCs go backwards.  This happens on
7287          * platforms that reset TSC during suspend or hibernate actions, but
7288          * maintain synchronization.  We must compensate.  Fortunately, we can
7289          * detect that condition here, which happens early in CPU bringup,
7290          * before any KVM threads can be running.  Unfortunately, we can't
7291          * bring the TSCs fully up to date with real time, as we aren't yet far
7292          * enough into CPU bringup that we know how much real time has actually
7293          * elapsed; our helper function, get_kernel_ns() will be using boot
7294          * variables that haven't been updated yet.
7295          *
7296          * So we simply find the maximum observed TSC above, then record the
7297          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7298          * the adjustment will be applied.  Note that we accumulate
7299          * adjustments, in case multiple suspend cycles happen before some VCPU
7300          * gets a chance to run again.  In the event that no KVM threads get a
7301          * chance to run, we will miss the entire elapsed period, as we'll have
7302          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7303          * loose cycle time.  This isn't too big a deal, since the loss will be
7304          * uniform across all VCPUs (not to mention the scenario is extremely
7305          * unlikely). It is possible that a second hibernate recovery happens
7306          * much faster than a first, causing the observed TSC here to be
7307          * smaller; this would require additional padding adjustment, which is
7308          * why we set last_host_tsc to the local tsc observed here.
7309          *
7310          * N.B. - this code below runs only on platforms with reliable TSC,
7311          * as that is the only way backwards_tsc is set above.  Also note
7312          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7313          * have the same delta_cyc adjustment applied if backwards_tsc
7314          * is detected.  Note further, this adjustment is only done once,
7315          * as we reset last_host_tsc on all VCPUs to stop this from being
7316          * called multiple times (one for each physical CPU bringup).
7317          *
7318          * Platforms with unreliable TSCs don't have to deal with this, they
7319          * will be compensated by the logic in vcpu_load, which sets the TSC to
7320          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7321          * guarantee that they stay in perfect synchronization.
7322          */
7323         if (backwards_tsc) {
7324                 u64 delta_cyc = max_tsc - local_tsc;
7325                 backwards_tsc_observed = true;
7326                 list_for_each_entry(kvm, &vm_list, vm_list) {
7327                         kvm_for_each_vcpu(i, vcpu, kvm) {
7328                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7329                                 vcpu->arch.last_host_tsc = local_tsc;
7330                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7331                         }
7332
7333                         /*
7334                          * We have to disable TSC offset matching.. if you were
7335                          * booting a VM while issuing an S4 host suspend....
7336                          * you may have some problem.  Solving this issue is
7337                          * left as an exercise to the reader.
7338                          */
7339                         kvm->arch.last_tsc_nsec = 0;
7340                         kvm->arch.last_tsc_write = 0;
7341                 }
7342
7343         }
7344         return 0;
7345 }
7346
7347 void kvm_arch_hardware_disable(void)
7348 {
7349         kvm_x86_ops->hardware_disable();
7350         drop_user_return_notifiers();
7351 }
7352
7353 int kvm_arch_hardware_setup(void)
7354 {
7355         int r;
7356
7357         r = kvm_x86_ops->hardware_setup();
7358         if (r != 0)
7359                 return r;
7360
7361         kvm_init_msr_list();
7362         return 0;
7363 }
7364
7365 void kvm_arch_hardware_unsetup(void)
7366 {
7367         kvm_x86_ops->hardware_unsetup();
7368 }
7369
7370 void kvm_arch_check_processor_compat(void *rtn)
7371 {
7372         kvm_x86_ops->check_processor_compatibility(rtn);
7373 }
7374
7375 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7376 {
7377         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7378 }
7379 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7380
7381 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7382 {
7383         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7384 }
7385
7386 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7387 {
7388         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7389 }
7390
7391 struct static_key kvm_no_apic_vcpu __read_mostly;
7392
7393 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7394 {
7395         struct page *page;
7396         struct kvm *kvm;
7397         int r;
7398
7399         BUG_ON(vcpu->kvm == NULL);
7400         kvm = vcpu->kvm;
7401
7402         vcpu->arch.pv.pv_unhalted = false;
7403         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7404         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7405                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7406         else
7407                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7408
7409         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7410         if (!page) {
7411                 r = -ENOMEM;
7412                 goto fail;
7413         }
7414         vcpu->arch.pio_data = page_address(page);
7415
7416         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7417
7418         r = kvm_mmu_create(vcpu);
7419         if (r < 0)
7420                 goto fail_free_pio_data;
7421
7422         if (irqchip_in_kernel(kvm)) {
7423                 r = kvm_create_lapic(vcpu);
7424                 if (r < 0)
7425                         goto fail_mmu_destroy;
7426         } else
7427                 static_key_slow_inc(&kvm_no_apic_vcpu);
7428
7429         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7430                                        GFP_KERNEL);
7431         if (!vcpu->arch.mce_banks) {
7432                 r = -ENOMEM;
7433                 goto fail_free_lapic;
7434         }
7435         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7436
7437         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7438                 r = -ENOMEM;
7439                 goto fail_free_mce_banks;
7440         }
7441
7442         fx_init(vcpu);
7443
7444         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7445         vcpu->arch.pv_time_enabled = false;
7446
7447         vcpu->arch.guest_supported_xcr0 = 0;
7448         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7449
7450         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7451
7452         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7453
7454         kvm_async_pf_hash_reset(vcpu);
7455         kvm_pmu_init(vcpu);
7456
7457         vcpu->arch.pending_external_vector = -1;
7458
7459         return 0;
7460
7461 fail_free_mce_banks:
7462         kfree(vcpu->arch.mce_banks);
7463 fail_free_lapic:
7464         kvm_free_lapic(vcpu);
7465 fail_mmu_destroy:
7466         kvm_mmu_destroy(vcpu);
7467 fail_free_pio_data:
7468         free_page((unsigned long)vcpu->arch.pio_data);
7469 fail:
7470         return r;
7471 }
7472
7473 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7474 {
7475         int idx;
7476
7477         kvm_pmu_destroy(vcpu);
7478         kfree(vcpu->arch.mce_banks);
7479         kvm_free_lapic(vcpu);
7480         idx = srcu_read_lock(&vcpu->kvm->srcu);
7481         kvm_mmu_destroy(vcpu);
7482         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7483         free_page((unsigned long)vcpu->arch.pio_data);
7484         if (!lapic_in_kernel(vcpu))
7485                 static_key_slow_dec(&kvm_no_apic_vcpu);
7486 }
7487
7488 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7489 {
7490         kvm_x86_ops->sched_in(vcpu, cpu);
7491 }
7492
7493 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7494 {
7495         if (type)
7496                 return -EINVAL;
7497
7498         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7499         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7500         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7501         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7502         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7503
7504         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7505         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7506         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7507         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7508                 &kvm->arch.irq_sources_bitmap);
7509
7510         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7511         mutex_init(&kvm->arch.apic_map_lock);
7512         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7513
7514         pvclock_update_vm_gtod_copy(kvm);
7515
7516         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7517         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7518
7519         return 0;
7520 }
7521
7522 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7523 {
7524         int r;
7525         r = vcpu_load(vcpu);
7526         BUG_ON(r);
7527         kvm_mmu_unload(vcpu);
7528         vcpu_put(vcpu);
7529 }
7530
7531 static void kvm_free_vcpus(struct kvm *kvm)
7532 {
7533         unsigned int i;
7534         struct kvm_vcpu *vcpu;
7535
7536         /*
7537          * Unpin any mmu pages first.
7538          */
7539         kvm_for_each_vcpu(i, vcpu, kvm) {
7540                 kvm_clear_async_pf_completion_queue(vcpu);
7541                 kvm_unload_vcpu_mmu(vcpu);
7542         }
7543         kvm_for_each_vcpu(i, vcpu, kvm)
7544                 kvm_arch_vcpu_free(vcpu);
7545
7546         mutex_lock(&kvm->lock);
7547         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7548                 kvm->vcpus[i] = NULL;
7549
7550         atomic_set(&kvm->online_vcpus, 0);
7551         mutex_unlock(&kvm->lock);
7552 }
7553
7554 void kvm_arch_sync_events(struct kvm *kvm)
7555 {
7556         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7557         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7558         kvm_free_all_assigned_devices(kvm);
7559         kvm_free_pit(kvm);
7560 }
7561
7562 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7563 {
7564         int i, r;
7565         unsigned long hva;
7566         struct kvm_memslots *slots = kvm_memslots(kvm);
7567         struct kvm_memory_slot *slot, old;
7568
7569         /* Called with kvm->slots_lock held.  */
7570         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7571                 return -EINVAL;
7572
7573         slot = id_to_memslot(slots, id);
7574         if (size) {
7575                 if (WARN_ON(slot->npages))
7576                         return -EEXIST;
7577
7578                 /*
7579                  * MAP_SHARED to prevent internal slot pages from being moved
7580                  * by fork()/COW.
7581                  */
7582                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7583                               MAP_SHARED | MAP_ANONYMOUS, 0);
7584                 if (IS_ERR((void *)hva))
7585                         return PTR_ERR((void *)hva);
7586         } else {
7587                 if (!slot->npages)
7588                         return 0;
7589
7590                 hva = 0;
7591         }
7592
7593         old = *slot;
7594         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7595                 struct kvm_userspace_memory_region m;
7596
7597                 m.slot = id | (i << 16);
7598                 m.flags = 0;
7599                 m.guest_phys_addr = gpa;
7600                 m.userspace_addr = hva;
7601                 m.memory_size = size;
7602                 r = __kvm_set_memory_region(kvm, &m);
7603                 if (r < 0)
7604                         return r;
7605         }
7606
7607         if (!size) {
7608                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7609                 WARN_ON(r < 0);
7610         }
7611
7612         return 0;
7613 }
7614 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7615
7616 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7617 {
7618         int r;
7619
7620         mutex_lock(&kvm->slots_lock);
7621         r = __x86_set_memory_region(kvm, id, gpa, size);
7622         mutex_unlock(&kvm->slots_lock);
7623
7624         return r;
7625 }
7626 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7627
7628 void kvm_arch_destroy_vm(struct kvm *kvm)
7629 {
7630         if (current->mm == kvm->mm) {
7631                 /*
7632                  * Free memory regions allocated on behalf of userspace,
7633                  * unless the the memory map has changed due to process exit
7634                  * or fd copying.
7635                  */
7636                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7637                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7638                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7639         }
7640         kvm_iommu_unmap_guest(kvm);
7641         kfree(kvm->arch.vpic);
7642         kfree(kvm->arch.vioapic);
7643         kvm_free_vcpus(kvm);
7644         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7645 }
7646
7647 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7648                            struct kvm_memory_slot *dont)
7649 {
7650         int i;
7651
7652         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7653                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7654                         kvfree(free->arch.rmap[i]);
7655                         free->arch.rmap[i] = NULL;
7656                 }
7657                 if (i == 0)
7658                         continue;
7659
7660                 if (!dont || free->arch.lpage_info[i - 1] !=
7661                              dont->arch.lpage_info[i - 1]) {
7662                         kvfree(free->arch.lpage_info[i - 1]);
7663                         free->arch.lpage_info[i - 1] = NULL;
7664                 }
7665         }
7666 }
7667
7668 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7669                             unsigned long npages)
7670 {
7671         int i;
7672
7673         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7674                 unsigned long ugfn;
7675                 int lpages;
7676                 int level = i + 1;
7677
7678                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7679                                       slot->base_gfn, level) + 1;
7680
7681                 slot->arch.rmap[i] =
7682                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7683                 if (!slot->arch.rmap[i])
7684                         goto out_free;
7685                 if (i == 0)
7686                         continue;
7687
7688                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7689                                         sizeof(*slot->arch.lpage_info[i - 1]));
7690                 if (!slot->arch.lpage_info[i - 1])
7691                         goto out_free;
7692
7693                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7694                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7695                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7696                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7697                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7698                 /*
7699                  * If the gfn and userspace address are not aligned wrt each
7700                  * other, or if explicitly asked to, disable large page
7701                  * support for this slot
7702                  */
7703                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7704                     !kvm_largepages_enabled()) {
7705                         unsigned long j;
7706
7707                         for (j = 0; j < lpages; ++j)
7708                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7709                 }
7710         }
7711
7712         return 0;
7713
7714 out_free:
7715         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7716                 kvfree(slot->arch.rmap[i]);
7717                 slot->arch.rmap[i] = NULL;
7718                 if (i == 0)
7719                         continue;
7720
7721                 kvfree(slot->arch.lpage_info[i - 1]);
7722                 slot->arch.lpage_info[i - 1] = NULL;
7723         }
7724         return -ENOMEM;
7725 }
7726
7727 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7728 {
7729         /*
7730          * memslots->generation has been incremented.
7731          * mmio generation may have reached its maximum value.
7732          */
7733         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7734 }
7735
7736 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7737                                 struct kvm_memory_slot *memslot,
7738                                 const struct kvm_userspace_memory_region *mem,
7739                                 enum kvm_mr_change change)
7740 {
7741         return 0;
7742 }
7743
7744 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7745                                      struct kvm_memory_slot *new)
7746 {
7747         /* Still write protect RO slot */
7748         if (new->flags & KVM_MEM_READONLY) {
7749                 kvm_mmu_slot_remove_write_access(kvm, new);
7750                 return;
7751         }
7752
7753         /*
7754          * Call kvm_x86_ops dirty logging hooks when they are valid.
7755          *
7756          * kvm_x86_ops->slot_disable_log_dirty is called when:
7757          *
7758          *  - KVM_MR_CREATE with dirty logging is disabled
7759          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7760          *
7761          * The reason is, in case of PML, we need to set D-bit for any slots
7762          * with dirty logging disabled in order to eliminate unnecessary GPA
7763          * logging in PML buffer (and potential PML buffer full VMEXT). This
7764          * guarantees leaving PML enabled during guest's lifetime won't have
7765          * any additonal overhead from PML when guest is running with dirty
7766          * logging disabled for memory slots.
7767          *
7768          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7769          * to dirty logging mode.
7770          *
7771          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7772          *
7773          * In case of write protect:
7774          *
7775          * Write protect all pages for dirty logging.
7776          *
7777          * All the sptes including the large sptes which point to this
7778          * slot are set to readonly. We can not create any new large
7779          * spte on this slot until the end of the logging.
7780          *
7781          * See the comments in fast_page_fault().
7782          */
7783         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7784                 if (kvm_x86_ops->slot_enable_log_dirty)
7785                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7786                 else
7787                         kvm_mmu_slot_remove_write_access(kvm, new);
7788         } else {
7789                 if (kvm_x86_ops->slot_disable_log_dirty)
7790                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7791         }
7792 }
7793
7794 void kvm_arch_commit_memory_region(struct kvm *kvm,
7795                                 const struct kvm_userspace_memory_region *mem,
7796                                 const struct kvm_memory_slot *old,
7797                                 const struct kvm_memory_slot *new,
7798                                 enum kvm_mr_change change)
7799 {
7800         int nr_mmu_pages = 0;
7801
7802         if (!kvm->arch.n_requested_mmu_pages)
7803                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7804
7805         if (nr_mmu_pages)
7806                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7807
7808         /*
7809          * Dirty logging tracks sptes in 4k granularity, meaning that large
7810          * sptes have to be split.  If live migration is successful, the guest
7811          * in the source machine will be destroyed and large sptes will be
7812          * created in the destination. However, if the guest continues to run
7813          * in the source machine (for example if live migration fails), small
7814          * sptes will remain around and cause bad performance.
7815          *
7816          * Scan sptes if dirty logging has been stopped, dropping those
7817          * which can be collapsed into a single large-page spte.  Later
7818          * page faults will create the large-page sptes.
7819          */
7820         if ((change != KVM_MR_DELETE) &&
7821                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7822                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7823                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7824
7825         /*
7826          * Set up write protection and/or dirty logging for the new slot.
7827          *
7828          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7829          * been zapped so no dirty logging staff is needed for old slot. For
7830          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7831          * new and it's also covered when dealing with the new slot.
7832          *
7833          * FIXME: const-ify all uses of struct kvm_memory_slot.
7834          */
7835         if (change != KVM_MR_DELETE)
7836                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7837 }
7838
7839 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7840 {
7841         kvm_mmu_invalidate_zap_all_pages(kvm);
7842 }
7843
7844 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7845                                    struct kvm_memory_slot *slot)
7846 {
7847         kvm_mmu_invalidate_zap_all_pages(kvm);
7848 }
7849
7850 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
7851 {
7852         if (!list_empty_careful(&vcpu->async_pf.done))
7853                 return true;
7854
7855         if (kvm_apic_has_events(vcpu))
7856                 return true;
7857
7858         if (vcpu->arch.pv.pv_unhalted)
7859                 return true;
7860
7861         if (atomic_read(&vcpu->arch.nmi_queued))
7862                 return true;
7863
7864         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
7865                 return true;
7866
7867         if (kvm_arch_interrupt_allowed(vcpu) &&
7868             kvm_cpu_has_interrupt(vcpu))
7869                 return true;
7870
7871         return false;
7872 }
7873
7874 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7875 {
7876         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7877                 kvm_x86_ops->check_nested_events(vcpu, false);
7878
7879         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
7880 }
7881
7882 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7883 {
7884         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7885 }
7886
7887 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7888 {
7889         return kvm_x86_ops->interrupt_allowed(vcpu);
7890 }
7891
7892 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
7893 {
7894         if (is_64_bit_mode(vcpu))
7895                 return kvm_rip_read(vcpu);
7896         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
7897                      kvm_rip_read(vcpu));
7898 }
7899 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
7900
7901 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7902 {
7903         return kvm_get_linear_rip(vcpu) == linear_rip;
7904 }
7905 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7906
7907 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7908 {
7909         unsigned long rflags;
7910
7911         rflags = kvm_x86_ops->get_rflags(vcpu);
7912         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7913                 rflags &= ~X86_EFLAGS_TF;
7914         return rflags;
7915 }
7916 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7917
7918 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7919 {
7920         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7921             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7922                 rflags |= X86_EFLAGS_TF;
7923         kvm_x86_ops->set_rflags(vcpu, rflags);
7924 }
7925
7926 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7927 {
7928         __kvm_set_rflags(vcpu, rflags);
7929         kvm_make_request(KVM_REQ_EVENT, vcpu);
7930 }
7931 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7932
7933 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7934 {
7935         int r;
7936
7937         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7938               work->wakeup_all)
7939                 return;
7940
7941         r = kvm_mmu_reload(vcpu);
7942         if (unlikely(r))
7943                 return;
7944
7945         if (!vcpu->arch.mmu.direct_map &&
7946               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7947                 return;
7948
7949         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7950 }
7951
7952 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7953 {
7954         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7955 }
7956
7957 static inline u32 kvm_async_pf_next_probe(u32 key)
7958 {
7959         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7960 }
7961
7962 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7963 {
7964         u32 key = kvm_async_pf_hash_fn(gfn);
7965
7966         while (vcpu->arch.apf.gfns[key] != ~0)
7967                 key = kvm_async_pf_next_probe(key);
7968
7969         vcpu->arch.apf.gfns[key] = gfn;
7970 }
7971
7972 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7973 {
7974         int i;
7975         u32 key = kvm_async_pf_hash_fn(gfn);
7976
7977         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7978                      (vcpu->arch.apf.gfns[key] != gfn &&
7979                       vcpu->arch.apf.gfns[key] != ~0); i++)
7980                 key = kvm_async_pf_next_probe(key);
7981
7982         return key;
7983 }
7984
7985 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7986 {
7987         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7988 }
7989
7990 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7991 {
7992         u32 i, j, k;
7993
7994         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7995         while (true) {
7996                 vcpu->arch.apf.gfns[i] = ~0;
7997                 do {
7998                         j = kvm_async_pf_next_probe(j);
7999                         if (vcpu->arch.apf.gfns[j] == ~0)
8000                                 return;
8001                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8002                         /*
8003                          * k lies cyclically in ]i,j]
8004                          * |    i.k.j |
8005                          * |....j i.k.| or  |.k..j i...|
8006                          */
8007                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8008                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8009                 i = j;
8010         }
8011 }
8012
8013 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8014 {
8015
8016         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8017                                       sizeof(val));
8018 }
8019
8020 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8021                                      struct kvm_async_pf *work)
8022 {
8023         struct x86_exception fault;
8024
8025         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8026         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8027
8028         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8029             (vcpu->arch.apf.send_user_only &&
8030              kvm_x86_ops->get_cpl(vcpu) == 0))
8031                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8032         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8033                 fault.vector = PF_VECTOR;
8034                 fault.error_code_valid = true;
8035                 fault.error_code = 0;
8036                 fault.nested_page_fault = false;
8037                 fault.address = work->arch.token;
8038                 kvm_inject_page_fault(vcpu, &fault);
8039         }
8040 }
8041
8042 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8043                                  struct kvm_async_pf *work)
8044 {
8045         struct x86_exception fault;
8046
8047         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8048         if (work->wakeup_all)
8049                 work->arch.token = ~0; /* broadcast wakeup */
8050         else
8051                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8052
8053         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8054             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8055                 fault.vector = PF_VECTOR;
8056                 fault.error_code_valid = true;
8057                 fault.error_code = 0;
8058                 fault.nested_page_fault = false;
8059                 fault.address = work->arch.token;
8060                 kvm_inject_page_fault(vcpu, &fault);
8061         }
8062         vcpu->arch.apf.halted = false;
8063         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8064 }
8065
8066 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8067 {
8068         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8069                 return true;
8070         else
8071                 return !kvm_event_needs_reinjection(vcpu) &&
8072                         kvm_x86_ops->interrupt_allowed(vcpu);
8073 }
8074
8075 void kvm_arch_start_assignment(struct kvm *kvm)
8076 {
8077         atomic_inc(&kvm->arch.assigned_device_count);
8078 }
8079 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8080
8081 void kvm_arch_end_assignment(struct kvm *kvm)
8082 {
8083         atomic_dec(&kvm->arch.assigned_device_count);
8084 }
8085 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8086
8087 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8088 {
8089         return atomic_read(&kvm->arch.assigned_device_count);
8090 }
8091 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8092
8093 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8094 {
8095         atomic_inc(&kvm->arch.noncoherent_dma_count);
8096 }
8097 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8098
8099 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8100 {
8101         atomic_dec(&kvm->arch.noncoherent_dma_count);
8102 }
8103 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8104
8105 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8106 {
8107         return atomic_read(&kvm->arch.noncoherent_dma_count);
8108 }
8109 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8110
8111 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8112                                       struct irq_bypass_producer *prod)
8113 {
8114         struct kvm_kernel_irqfd *irqfd =
8115                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8116
8117         if (kvm_x86_ops->update_pi_irte) {
8118                 irqfd->producer = prod;
8119                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8120                                 prod->irq, irqfd->gsi, 1);
8121         }
8122
8123         return -EINVAL;
8124 }
8125
8126 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8127                                       struct irq_bypass_producer *prod)
8128 {
8129         int ret;
8130         struct kvm_kernel_irqfd *irqfd =
8131                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8132
8133         if (!kvm_x86_ops->update_pi_irte) {
8134                 WARN_ON(irqfd->producer != NULL);
8135                 return;
8136         }
8137
8138         WARN_ON(irqfd->producer != prod);
8139         irqfd->producer = NULL;
8140
8141         /*
8142          * When producer of consumer is unregistered, we change back to
8143          * remapped mode, so we can re-use the current implementation
8144          * when the irq is masked/disabed or the consumer side (KVM
8145          * int this case doesn't want to receive the interrupts.
8146         */
8147         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8148         if (ret)
8149                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8150                        " fails: %d\n", irqfd->consumer.token, ret);
8151 }
8152
8153 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8154                                    uint32_t guest_irq, bool set)
8155 {
8156         if (!kvm_x86_ops->update_pi_irte)
8157                 return -EINVAL;
8158
8159         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8160 }
8161
8162 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8163 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8164 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8165 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8166 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8167 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8168 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8169 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8170 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8171 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8172 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8173 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8174 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8175 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8176 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8177 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8178 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);