drivers/block/cciss.c

   1 /*
   2  *    Disk Array driver for HP Smart Array controllers.
   3  *    (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; version 2 of the License.
   8  *
   9  *    This program is distributed in the hope that it will be useful,
  10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12  *    General Public License for more details.
  13  *
  14  *    You should have received a copy of the GNU General Public License
  15  *    along with this program; if not, write to the Free Software
  16  *    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  17  *    02111-1307, USA.
  18  *
  19  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  20  *
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/types.h>
  26 #include <linux/pci.h>
  27 #include <linux/pci-aspm.h>
  28 #include <linux/kernel.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/major.h>
  32 #include <linux/fs.h>
  33 #include <linux/bio.h>
  34 #include <linux/blkpg.h>
  35 #include <linux/timer.h>
  36 #include <linux/proc_fs.h>
  37 #include <linux/seq_file.h>
  38 #include <linux/init.h>
  39 #include <linux/jiffies.h>
  40 #include <linux/hdreg.h>
  41 #include <linux/spinlock.h>
  42 #include <linux/compat.h>
  43 #include <linux/mutex.h>
  44 #include <linux/bitmap.h>
  45 #include <linux/io.h>
  46 #include <linux/uaccess.h>
  47
  48 #include <linux/dma-mapping.h>
  49 #include <linux/blkdev.h>
  50 #include <linux/genhd.h>
  51 #include <linux/completion.h>
  52 #include <scsi/scsi.h>
  53 #include <scsi/sg.h>
  54 #include <scsi/scsi_ioctl.h>
  55 #include <scsi/scsi_request.h>
  56 #include <linux/cdrom.h>
  57 #include <linux/scatterlist.h>
  58 #include <linux/kthread.h>
  59
  60 #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
  61 #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
  62 #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
  63
  64 /* Embedded module documentation macros - see modules.h */
  65 MODULE_AUTHOR("Hewlett-Packard Company");
  66 MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
  67 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  68 MODULE_VERSION("3.6.26");
  69 MODULE_LICENSE("GPL");
  70 static int cciss_tape_cmds = 6;
  71 module_param(cciss_tape_cmds, int, 0644);
  72 MODULE_PARM_DESC(cciss_tape_cmds,
  73         "number of commands to allocate for tape devices (default: 6)");
  74 static int cciss_simple_mode;
  75 module_param(cciss_simple_mode, int, S_IRUGO|S_IWUSR);
  76 MODULE_PARM_DESC(cciss_simple_mode,
  77         "Use 'simple mode' rather than 'performant mode'");
  78
  79 static int cciss_allow_hpsa;
  80 module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
  81 MODULE_PARM_DESC(cciss_allow_hpsa,
  82         "Prevent cciss driver from accessing hardware known to be "
  83         " supported by the hpsa driver");
  84
  85 static DEFINE_MUTEX(cciss_mutex);
  86 static struct proc_dir_entry *proc_cciss;
  87
  88 #include "cciss_cmd.h"
  89 #include "cciss.h"
  90 #include <linux/cciss_ioctl.h>
  91
  92 /* define the PCI info for the cards we can control */
  93 static const struct pci_device_id cciss_pci_device_id[] = {
  94         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS,  0x0E11, 0x4070},
  95         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
  96         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
  97         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
  98         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
  99         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
 100         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
 101         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
 102         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
 103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSA,     0x103C, 0x3225},
 104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3223},
 105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3234},
 106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3235},
 107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3211},
 108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3212},
 109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3213},
 110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3214},
 111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3215},
 112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3237},
 113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x323D},
 114         {0,}
 115 };
 116
 117 MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
 118
 119 /*  board_id = Subsystem Device ID & Vendor ID
 120  *  product = Marketing Name for the board
 121  *  access = Address of the struct of function pointers
 122  */
 123 static struct board_type products[] = {
 124         {0x40700E11, "Smart Array 5300", &SA5_access},
 125         {0x40800E11, "Smart Array 5i", &SA5B_access},
 126         {0x40820E11, "Smart Array 532", &SA5B_access},
 127         {0x40830E11, "Smart Array 5312", &SA5B_access},
 128         {0x409A0E11, "Smart Array 641", &SA5_access},
 129         {0x409B0E11, "Smart Array 642", &SA5_access},
 130         {0x409C0E11, "Smart Array 6400", &SA5_access},
 131         {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
 132         {0x40910E11, "Smart Array 6i", &SA5_access},
 133         {0x3225103C, "Smart Array P600", &SA5_access},
 134         {0x3223103C, "Smart Array P800", &SA5_access},
 135         {0x3234103C, "Smart Array P400", &SA5_access},
 136         {0x3235103C, "Smart Array P400i", &SA5_access},
 137         {0x3211103C, "Smart Array E200i", &SA5_access},
 138         {0x3212103C, "Smart Array E200", &SA5_access},
 139         {0x3213103C, "Smart Array E200i", &SA5_access},
 140         {0x3214103C, "Smart Array E200i", &SA5_access},
 141         {0x3215103C, "Smart Array E200i", &SA5_access},
 142         {0x3237103C, "Smart Array E500", &SA5_access},
 143         {0x323D103C, "Smart Array P700m", &SA5_access},
 144 };
 145
 146 /* How long to wait (in milliseconds) for board to go into simple mode */
 147 #define MAX_CONFIG_WAIT 30000
 148 #define MAX_IOCTL_CONFIG_WAIT 1000
 149
 150 /*define how many times we will try a command because of bus resets */
 151 #define MAX_CMD_RETRIES 3
 152
 153 #define MAX_CTLR        32
 154
 155 /* Originally cciss driver only supports 8 major numbers */
 156 #define MAX_CTLR_ORIG   8
 157
 158 static ctlr_info_t *hba[MAX_CTLR];
 159
 160 static struct task_struct *cciss_scan_thread;
 161 static DEFINE_MUTEX(scan_mutex);
 162 static LIST_HEAD(scan_q);
 163
 164 static void do_cciss_request(struct request_queue *q);
 165 static irqreturn_t do_cciss_intx(int irq, void *dev_id);
 166 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
 167 static int cciss_open(struct block_device *bdev, fmode_t mode);
 168 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
 169 static void cciss_release(struct gendisk *disk, fmode_t mode);
 170 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
 171                        unsigned int cmd, unsigned long arg);
 172 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
 173
 174 static int cciss_revalidate(struct gendisk *disk);
 175 static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
 176 static int deregister_disk(ctlr_info_t *h, int drv_index,
 177                            int clear_all, int via_ioctl);
 178
 179 static void cciss_read_capacity(ctlr_info_t *h, int logvol,
 180                         sector_t *total_size, unsigned int *block_size);
 181 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
 182                         sector_t *total_size, unsigned int *block_size);
 183 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
 184                         sector_t total_size,
 185                         unsigned int block_size, InquiryData_struct *inq_buff,
 186                                    drive_info_struct *drv);
 187 static void cciss_interrupt_mode(ctlr_info_t *);
 188 static int cciss_enter_simple_mode(struct ctlr_info *h);
 189 static void start_io(ctlr_info_t *h);
 190 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
 191                         __u8 page_code, unsigned char scsi3addr[],
 192                         int cmd_type);
 193 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
 194         int attempt_retry);
 195 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
 196
 197 static int add_to_scan_list(struct ctlr_info *h);
 198 static int scan_thread(void *data);
 199 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
 200 static void cciss_hba_release(struct device *dev);
 201 static void cciss_device_release(struct device *dev);
 202 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
 203 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
 204 static inline u32 next_command(ctlr_info_t *h);
 205 static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 206                                 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 207                                 u64 *cfg_offset);
 208 static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
 209                                      unsigned long *memory_bar);
 210 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
 211 static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable);
 212
 213 /* performant mode helper functions */
 214 static void  calc_bucket_map(int *bucket, int num_buckets, int nsgs,
 215                                 int *bucket_map);
 216 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
 217
 218 #ifdef CONFIG_PROC_FS
 219 static void cciss_procinit(ctlr_info_t *h);
 220 #else
 221 static void cciss_procinit(ctlr_info_t *h)
 222 {
 223 }
 224 #endif                          /* CONFIG_PROC_FS */
 225
 226 #ifdef CONFIG_COMPAT
 227 static int cciss_compat_ioctl(struct block_device *, fmode_t,
 228                               unsigned, unsigned long);
 229 #endif
 230
 231 static const struct block_device_operations cciss_fops = {
 232         .owner = THIS_MODULE,
 233         .open = cciss_unlocked_open,
 234         .release = cciss_release,
 235         .ioctl = cciss_ioctl,
 236         .getgeo = cciss_getgeo,
 237 #ifdef CONFIG_COMPAT
 238         .compat_ioctl = cciss_compat_ioctl,
 239 #endif
 240         .revalidate_disk = cciss_revalidate,
 241 };
 242
 243 /* set_performant_mode: Modify the tag for cciss performant
 244  * set bit 0 for pull model, bits 3-1 for block fetch
 245  * register number
 246  */
 247 static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
 248 {
 249         if (likely(h->transMethod & CFGTBL_Trans_Performant))
 250                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 251 }
 252
 253 /*
 254  * Enqueuing and dequeuing functions for cmdlists.
 255  */
 256 static inline void addQ(struct list_head *list, CommandList_struct *c)
 257 {
 258         list_add_tail(&c->list, list);
 259 }
 260
 261 static inline void removeQ(CommandList_struct *c)
 262 {
 263         /*
 264          * After kexec/dump some commands might still
 265          * be in flight, which the firmware will try
 266          * to complete. Resetting the firmware doesn't work
 267          * with old fw revisions, so we have to mark
 268          * them off as 'stale' to prevent the driver from
 269          * falling over.
 270          */
 271         if (WARN_ON(list_empty(&c->list))) {
 272                 c->cmd_type = CMD_MSG_STALE;
 273                 return;
 274         }
 275
 276         list_del_init(&c->list);
 277 }
 278
 279 static void enqueue_cmd_and_start_io(ctlr_info_t *h,
 280         CommandList_struct *c)
 281 {
 282         unsigned long flags;
 283         set_performant_mode(h, c);
 284         spin_lock_irqsave(&h->lock, flags);
 285         addQ(&h->reqQ, c);
 286         h->Qdepth++;
 287         if (h->Qdepth > h->maxQsinceinit)
 288                 h->maxQsinceinit = h->Qdepth;
 289         start_io(h);
 290         spin_unlock_irqrestore(&h->lock, flags);
 291 }
 292
 293 static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
 294         int nr_cmds)
 295 {
 296         int i;
 297
 298         if (!cmd_sg_list)
 299                 return;
 300         for (i = 0; i < nr_cmds; i++) {
 301                 kfree(cmd_sg_list[i]);
 302                 cmd_sg_list[i] = NULL;
 303         }
 304         kfree(cmd_sg_list);
 305 }
 306
 307 static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
 308         ctlr_info_t *h, int chainsize, int nr_cmds)
 309 {
 310         int j;
 311         SGDescriptor_struct **cmd_sg_list;
 312
 313         if (chainsize <= 0)
 314                 return NULL;
 315
 316         cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
 317         if (!cmd_sg_list)
 318                 return NULL;
 319
 320         /* Build up chain blocks for each command */
 321         for (j = 0; j < nr_cmds; j++) {
 322                 /* Need a block of chainsized s/g elements. */
 323                 cmd_sg_list[j] = kmalloc((chainsize *
 324                         sizeof(*cmd_sg_list[j])), GFP_KERNEL);
 325                 if (!cmd_sg_list[j]) {
 326                         dev_err(&h->pdev->dev, "Cannot get memory "
 327                                 "for s/g chains.\n");
 328                         goto clean;
 329                 }
 330         }
 331         return cmd_sg_list;
 332 clean:
 333         cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
 334         return NULL;
 335 }
 336
 337 static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
 338 {
 339         SGDescriptor_struct *chain_sg;
 340         u64bit temp64;
 341
 342         if (c->Header.SGTotal <= h->max_cmd_sgentries)
 343                 return;
 344
 345         chain_sg = &c->SG[h->max_cmd_sgentries - 1];
 346         temp64.val32.lower = chain_sg->Addr.lower;
 347         temp64.val32.upper = chain_sg->Addr.upper;
 348         pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
 349 }
 350
 351 static int cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
 352         SGDescriptor_struct *chain_block, int len)
 353 {
 354         SGDescriptor_struct *chain_sg;
 355         u64bit temp64;
 356
 357         chain_sg = &c->SG[h->max_cmd_sgentries - 1];
 358         chain_sg->Ext = CCISS_SG_CHAIN;
 359         chain_sg->Len = len;
 360         temp64.val = pci_map_single(h->pdev, chain_block, len,
 361                                 PCI_DMA_TODEVICE);
 362         if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
 363                 dev_warn(&h->pdev->dev,
 364                         "%s: error mapping chain block for DMA\n",
 365                         __func__);
 366                 return -1;
 367         }
 368         chain_sg->Addr.lower = temp64.val32.lower;
 369         chain_sg->Addr.upper = temp64.val32.upper;
 370
 371         return 0;
 372 }
 373
 374 #include "cciss_scsi.c"         /* For SCSI tape support */
 375
 376 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
 377         "UNKNOWN"
 378 };
 379 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
 380
 381 #ifdef CONFIG_PROC_FS
 382
 383 /*
 384  * Report information about this controller.
 385  */
 386 #define ENG_GIG 1000000000
 387 #define ENG_GIG_FACTOR (ENG_GIG/512)
 388 #define ENGAGE_SCSI     "engage scsi"
 389
 390 static void cciss_seq_show_header(struct seq_file *seq)
 391 {
 392         ctlr_info_t *h = seq->private;
 393
 394         seq_printf(seq, "%s: HP %s Controller\n"
 395                 "Board ID: 0x%08lx\n"
 396                 "Firmware Version: %c%c%c%c\n"
 397                 "IRQ: %d\n"
 398                 "Logical drives: %d\n"
 399                 "Current Q depth: %d\n"
 400                 "Current # commands on controller: %d\n"
 401                 "Max Q depth since init: %d\n"
 402                 "Max # commands on controller since init: %d\n"
 403                 "Max SG entries since init: %d\n",
 404                 h->devname,
 405                 h->product_name,
 406                 (unsigned long)h->board_id,
 407                 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
 408                 h->firm_ver[3], (unsigned int)h->intr[h->intr_mode],
 409                 h->num_luns,
 410                 h->Qdepth, h->commands_outstanding,
 411                 h->maxQsinceinit, h->max_outstanding, h->maxSG);
 412
 413 #ifdef CONFIG_CISS_SCSI_TAPE
 414         cciss_seq_tape_report(seq, h);
 415 #endif /* CONFIG_CISS_SCSI_TAPE */
 416 }
 417
 418 static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
 419 {
 420         ctlr_info_t *h = seq->private;
 421         unsigned long flags;
 422
 423         /* prevent displaying bogus info during configuration
 424          * or deconfiguration of a logical volume
 425          */
 426         spin_lock_irqsave(&h->lock, flags);
 427         if (h->busy_configuring) {
 428                 spin_unlock_irqrestore(&h->lock, flags);
 429                 return ERR_PTR(-EBUSY);
 430         }
 431         h->busy_configuring = 1;
 432         spin_unlock_irqrestore(&h->lock, flags);
 433
 434         if (*pos == 0)
 435                 cciss_seq_show_header(seq);
 436
 437         return pos;
 438 }
 439
 440 static int cciss_seq_show(struct seq_file *seq, void *v)
 441 {
 442         sector_t vol_sz, vol_sz_frac;
 443         ctlr_info_t *h = seq->private;
 444         unsigned ctlr = h->ctlr;
 445         loff_t *pos = v;
 446         drive_info_struct *drv = h->drv[*pos];
 447
 448         if (*pos > h->highest_lun)
 449                 return 0;
 450
 451         if (drv == NULL) /* it's possible for h->drv[] to have holes. */
 452                 return 0;
 453
 454         if (drv->heads == 0)
 455                 return 0;
 456
 457         vol_sz = drv->nr_blocks;
 458         vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
 459         vol_sz_frac *= 100;
 460         sector_div(vol_sz_frac, ENG_GIG_FACTOR);
 461
 462         if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
 463                 drv->raid_level = RAID_UNKNOWN;
 464         seq_printf(seq, "cciss/c%dd%d:"
 465                         "\t%4u.%02uGB\tRAID %s\n",
 466                         ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
 467                         raid_label[drv->raid_level]);
 468         return 0;
 469 }
 470
 471 static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
 472 {
 473         ctlr_info_t *h = seq->private;
 474
 475         if (*pos > h->highest_lun)
 476                 return NULL;
 477         *pos += 1;
 478
 479         return pos;
 480 }
 481
 482 static void cciss_seq_stop(struct seq_file *seq, void *v)
 483 {
 484         ctlr_info_t *h = seq->private;
 485
 486         /* Only reset h->busy_configuring if we succeeded in setting
 487          * it during cciss_seq_start. */
 488         if (v == ERR_PTR(-EBUSY))
 489                 return;
 490
 491         h->busy_configuring = 0;
 492 }
 493
 494 static const struct seq_operations cciss_seq_ops = {
 495         .start = cciss_seq_start,
 496         .show  = cciss_seq_show,
 497         .next  = cciss_seq_next,
 498         .stop  = cciss_seq_stop,
 499 };
 500
 501 static int cciss_seq_open(struct inode *inode, struct file *file)
 502 {
 503         int ret = seq_open(file, &cciss_seq_ops);
 504         struct seq_file *seq = file->private_data;
 505
 506         if (!ret)
 507                 seq->private = PDE_DATA(inode);
 508
 509         return ret;
 510 }
 511
 512 static ssize_t
 513 cciss_proc_write(struct file *file, const char __user *buf,
 514                  size_t length, loff_t *ppos)
 515 {
 516         int err;
 517         char *buffer;
 518
 519 #ifndef CONFIG_CISS_SCSI_TAPE
 520         return -EINVAL;
 521 #endif
 522
 523         if (!buf || length > PAGE_SIZE - 1)
 524                 return -EINVAL;
 525
 526         buffer = memdup_user_nul(buf, length);
 527         if (IS_ERR(buffer))
 528                 return PTR_ERR(buffer);
 529
 530 #ifdef CONFIG_CISS_SCSI_TAPE
 531         if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
 532                 struct seq_file *seq = file->private_data;
 533                 ctlr_info_t *h = seq->private;
 534
 535                 err = cciss_engage_scsi(h);
 536                 if (err == 0)
 537                         err = length;
 538         } else
 539 #endif /* CONFIG_CISS_SCSI_TAPE */
 540                 err = -EINVAL;
 541         /* might be nice to have "disengage" too, but it's not
 542            safely possible. (only 1 module use count, lock issues.) */
 543
 544         kfree(buffer);
 545         return err;
 546 }
 547
 548 static const struct file_operations cciss_proc_fops = {
 549         .owner   = THIS_MODULE,
 550         .open    = cciss_seq_open,
 551         .read    = seq_read,
 552         .llseek  = seq_lseek,
 553         .release = seq_release,
 554         .write   = cciss_proc_write,
 555 };
 556
 557 static void cciss_procinit(ctlr_info_t *h)
 558 {
 559         struct proc_dir_entry *pde;
 560
 561         if (proc_cciss == NULL)
 562                 proc_cciss = proc_mkdir("driver/cciss", NULL);
 563         if (!proc_cciss)
 564                 return;
 565         pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
 566                                         S_IROTH, proc_cciss,
 567                                         &cciss_proc_fops, h);
 568 }
 569 #endif                          /* CONFIG_PROC_FS */
 570
 571 #define MAX_PRODUCT_NAME_LEN 19
 572
 573 #define to_hba(n) container_of(n, struct ctlr_info, dev)
 574 #define to_drv(n) container_of(n, drive_info_struct, dev)
 575
 576 /* List of controllers which cannot be hard reset on kexec with reset_devices */
 577 static u32 unresettable_controller[] = {
 578         0x3223103C, /* Smart Array P800 */
 579         0x3234103C, /* Smart Array P400 */
 580         0x3235103C, /* Smart Array P400i */
 581         0x3211103C, /* Smart Array E200i */
 582         0x3212103C, /* Smart Array E200 */
 583         0x3213103C, /* Smart Array E200i */
 584         0x3214103C, /* Smart Array E200i */
 585         0x3215103C, /* Smart Array E200i */
 586         0x3237103C, /* Smart Array E500 */
 587         0x323D103C, /* Smart Array P700m */
 588         0x40800E11, /* Smart Array 5i */
 589         0x409C0E11, /* Smart Array 6400 */
 590         0x409D0E11, /* Smart Array 6400 EM */
 591         0x40700E11, /* Smart Array 5300 */
 592         0x40820E11, /* Smart Array 532 */
 593         0x40830E11, /* Smart Array 5312 */
 594         0x409A0E11, /* Smart Array 641 */
 595         0x409B0E11, /* Smart Array 642 */
 596         0x40910E11, /* Smart Array 6i */
 597 };
 598
 599 /* List of controllers which cannot even be soft reset */
 600 static u32 soft_unresettable_controller[] = {
 601         0x40800E11, /* Smart Array 5i */
 602         0x40700E11, /* Smart Array 5300 */
 603         0x40820E11, /* Smart Array 532 */
 604         0x40830E11, /* Smart Array 5312 */
 605         0x409A0E11, /* Smart Array 641 */
 606         0x409B0E11, /* Smart Array 642 */
 607         0x40910E11, /* Smart Array 6i */
 608         /* Exclude 640x boards.  These are two pci devices in one slot
 609          * which share a battery backed cache module.  One controls the
 610          * cache, the other accesses the cache through the one that controls
 611          * it.  If we reset the one controlling the cache, the other will
 612          * likely not be happy.  Just forbid resetting this conjoined mess.
 613          */
 614         0x409C0E11, /* Smart Array 6400 */
 615         0x409D0E11, /* Smart Array 6400 EM */
 616 };
 617
 618 static int ctlr_is_hard_resettable(u32 board_id)
 619 {
 620         int i;
 621
 622         for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
 623                 if (unresettable_controller[i] == board_id)
 624                         return 0;
 625         return 1;
 626 }
 627
 628 static int ctlr_is_soft_resettable(u32 board_id)
 629 {
 630         int i;
 631
 632         for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
 633                 if (soft_unresettable_controller[i] == board_id)
 634                         return 0;
 635         return 1;
 636 }
 637
 638 static int ctlr_is_resettable(u32 board_id)
 639 {
 640         return ctlr_is_hard_resettable(board_id) ||
 641                 ctlr_is_soft_resettable(board_id);
 642 }
 643
 644 static ssize_t host_show_resettable(struct device *dev,
 645                                     struct device_attribute *attr,
 646                                     char *buf)
 647 {
 648         struct ctlr_info *h = to_hba(dev);
 649
 650         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 651 }
 652 static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
 653
 654 static ssize_t host_store_rescan(struct device *dev,
 655                                  struct device_attribute *attr,
 656                                  const char *buf, size_t count)
 657 {
 658         struct ctlr_info *h = to_hba(dev);
 659
 660         add_to_scan_list(h);
 661         wake_up_process(cciss_scan_thread);
 662         wait_for_completion_interruptible(&h->scan_wait);
 663
 664         return count;
 665 }
 666 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 667
 668 static ssize_t host_show_transport_mode(struct device *dev,
 669                                  struct device_attribute *attr,
 670                                  char *buf)
 671 {
 672         struct ctlr_info *h = to_hba(dev);
 673
 674         return snprintf(buf, 20, "%s\n",
 675                 h->transMethod & CFGTBL_Trans_Performant ?
 676                         "performant" : "simple");
 677 }
 678 static DEVICE_ATTR(transport_mode, S_IRUGO, host_show_transport_mode, NULL);
 679
 680 static ssize_t dev_show_unique_id(struct device *dev,
 681                                  struct device_attribute *attr,
 682                                  char *buf)
 683 {
 684         drive_info_struct *drv = to_drv(dev);
 685         struct ctlr_info *h = to_hba(drv->dev.parent);
 686         __u8 sn[16];
 687         unsigned long flags;
 688         int ret = 0;
 689
 690         spin_lock_irqsave(&h->lock, flags);
 691         if (h->busy_configuring)
 692                 ret = -EBUSY;
 693         else
 694                 memcpy(sn, drv->serial_no, sizeof(sn));
 695         spin_unlock_irqrestore(&h->lock, flags);
 696
 697         if (ret)
 698                 return ret;
 699         else
 700                 return snprintf(buf, 16 * 2 + 2,
 701                                 "%02X%02X%02X%02X%02X%02X%02X%02X"
 702                                 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 703                                 sn[0], sn[1], sn[2], sn[3],
 704                                 sn[4], sn[5], sn[6], sn[7],
 705                                 sn[8], sn[9], sn[10], sn[11],
 706                                 sn[12], sn[13], sn[14], sn[15]);
 707 }
 708 static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
 709
 710 static ssize_t dev_show_vendor(struct device *dev,
 711                                struct device_attribute *attr,
 712                                char *buf)
 713 {
 714         drive_info_struct *drv = to_drv(dev);
 715         struct ctlr_info *h = to_hba(drv->dev.parent);
 716         char vendor[VENDOR_LEN + 1];
 717         unsigned long flags;
 718         int ret = 0;
 719
 720         spin_lock_irqsave(&h->lock, flags);
 721         if (h->busy_configuring)
 722                 ret = -EBUSY;
 723         else
 724                 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
 725         spin_unlock_irqrestore(&h->lock, flags);
 726
 727         if (ret)
 728                 return ret;
 729         else
 730                 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
 731 }
 732 static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
 733
 734 static ssize_t dev_show_model(struct device *dev,
 735                               struct device_attribute *attr,
 736                               char *buf)
 737 {
 738         drive_info_struct *drv = to_drv(dev);
 739         struct ctlr_info *h = to_hba(drv->dev.parent);
 740         char model[MODEL_LEN + 1];
 741         unsigned long flags;
 742         int ret = 0;
 743
 744         spin_lock_irqsave(&h->lock, flags);
 745         if (h->busy_configuring)
 746                 ret = -EBUSY;
 747         else
 748                 memcpy(model, drv->model, MODEL_LEN + 1);
 749         spin_unlock_irqrestore(&h->lock, flags);
 750
 751         if (ret)
 752                 return ret;
 753         else
 754                 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
 755 }
 756 static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
 757
 758 static ssize_t dev_show_rev(struct device *dev,
 759                             struct device_attribute *attr,
 760                             char *buf)
 761 {
 762         drive_info_struct *drv = to_drv(dev);
 763         struct ctlr_info *h = to_hba(drv->dev.parent);
 764         char rev[REV_LEN + 1];
 765         unsigned long flags;
 766         int ret = 0;
 767
 768         spin_lock_irqsave(&h->lock, flags);
 769         if (h->busy_configuring)
 770                 ret = -EBUSY;
 771         else
 772                 memcpy(rev, drv->rev, REV_LEN + 1);
 773         spin_unlock_irqrestore(&h->lock, flags);
 774
 775         if (ret)
 776                 return ret;
 777         else
 778                 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
 779 }
 780 static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
 781
 782 static ssize_t cciss_show_lunid(struct device *dev,
 783                                 struct device_attribute *attr, char *buf)
 784 {
 785         drive_info_struct *drv = to_drv(dev);
 786         struct ctlr_info *h = to_hba(drv->dev.parent);
 787         unsigned long flags;
 788         unsigned char lunid[8];
 789
 790         spin_lock_irqsave(&h->lock, flags);
 791         if (h->busy_configuring) {
 792                 spin_unlock_irqrestore(&h->lock, flags);
 793                 return -EBUSY;
 794         }
 795         if (!drv->heads) {
 796                 spin_unlock_irqrestore(&h->lock, flags);
 797                 return -ENOTTY;
 798         }
 799         memcpy(lunid, drv->LunID, sizeof(lunid));
 800         spin_unlock_irqrestore(&h->lock, flags);
 801         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 802                 lunid[0], lunid[1], lunid[2], lunid[3],
 803                 lunid[4], lunid[5], lunid[6], lunid[7]);
 804 }
 805 static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
 806
 807 static ssize_t cciss_show_raid_level(struct device *dev,
 808                                      struct device_attribute *attr, char *buf)
 809 {
 810         drive_info_struct *drv = to_drv(dev);
 811         struct ctlr_info *h = to_hba(drv->dev.parent);
 812         int raid;
 813         unsigned long flags;
 814
 815         spin_lock_irqsave(&h->lock, flags);
 816         if (h->busy_configuring) {
 817                 spin_unlock_irqrestore(&h->lock, flags);
 818                 return -EBUSY;
 819         }
 820         raid = drv->raid_level;
 821         spin_unlock_irqrestore(&h->lock, flags);
 822         if (raid < 0 || raid > RAID_UNKNOWN)
 823                 raid = RAID_UNKNOWN;
 824
 825         return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
 826                         raid_label[raid]);
 827 }
 828 static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
 829
 830 static ssize_t cciss_show_usage_count(struct device *dev,
 831                                       struct device_attribute *attr, char *buf)
 832 {
 833         drive_info_struct *drv = to_drv(dev);
 834         struct ctlr_info *h = to_hba(drv->dev.parent);
 835         unsigned long flags;
 836         int count;
 837
 838         spin_lock_irqsave(&h->lock, flags);
 839         if (h->busy_configuring) {
 840                 spin_unlock_irqrestore(&h->lock, flags);
 841                 return -EBUSY;
 842         }
 843         count = drv->usage_count;
 844         spin_unlock_irqrestore(&h->lock, flags);
 845         return snprintf(buf, 20, "%d\n", count);
 846 }
 847 static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
 848
 849 static struct attribute *cciss_host_attrs[] = {
 850         &dev_attr_rescan.attr,
 851         &dev_attr_resettable.attr,
 852         &dev_attr_transport_mode.attr,
 853         NULL
 854 };
 855
 856 static struct attribute_group cciss_host_attr_group = {
 857         .attrs = cciss_host_attrs,
 858 };
 859
 860 static const struct attribute_group *cciss_host_attr_groups[] = {
 861         &cciss_host_attr_group,
 862         NULL
 863 };
 864
 865 static struct device_type cciss_host_type = {
 866         .name           = "cciss_host",
 867         .groups         = cciss_host_attr_groups,
 868         .release        = cciss_hba_release,
 869 };
 870
 871 static struct attribute *cciss_dev_attrs[] = {
 872         &dev_attr_unique_id.attr,
 873         &dev_attr_model.attr,
 874         &dev_attr_vendor.attr,
 875         &dev_attr_rev.attr,
 876         &dev_attr_lunid.attr,
 877         &dev_attr_raid_level.attr,
 878         &dev_attr_usage_count.attr,
 879         NULL
 880 };
 881
 882 static struct attribute_group cciss_dev_attr_group = {
 883         .attrs = cciss_dev_attrs,
 884 };
 885
 886 static const struct attribute_group *cciss_dev_attr_groups[] = {
 887         &cciss_dev_attr_group,
 888         NULL
 889 };
 890
 891 static struct device_type cciss_dev_type = {
 892         .name           = "cciss_device",
 893         .groups         = cciss_dev_attr_groups,
 894         .release        = cciss_device_release,
 895 };
 896
 897 static struct bus_type cciss_bus_type = {
 898         .name           = "cciss",
 899 };
 900
 901 /*
 902  * cciss_hba_release is called when the reference count
 903  * of h->dev goes to zero.
 904  */
 905 static void cciss_hba_release(struct device *dev)
 906 {
 907         /*
 908          * nothing to do, but need this to avoid a warning
 909          * about not having a release handler from lib/kref.c.
 910          */
 911 }
 912
 913 /*
 914  * Initialize sysfs entry for each controller.  This sets up and registers
 915  * the 'cciss#' directory for each individual controller under
 916  * /sys/bus/pci/devices/<dev>/.
 917  */
 918 static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
 919 {
 920         device_initialize(&h->dev);
 921         h->dev.type = &cciss_host_type;
 922         h->dev.bus = &cciss_bus_type;
 923         dev_set_name(&h->dev, "%s", h->devname);
 924         h->dev.parent = &h->pdev->dev;
 925
 926         return device_add(&h->dev);
 927 }
 928
 929 /*
 930  * Remove sysfs entries for an hba.
 931  */
 932 static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
 933 {
 934         device_del(&h->dev);
 935         put_device(&h->dev); /* final put. */
 936 }
 937
 938 /* cciss_device_release is called when the reference count
 939  * of h->drv[x]dev goes to zero.
 940  */
 941 static void cciss_device_release(struct device *dev)
 942 {
 943         drive_info_struct *drv = to_drv(dev);
 944         kfree(drv);
 945 }
 946
 947 /*
 948  * Initialize sysfs for each logical drive.  This sets up and registers
 949  * the 'c#d#' directory for each individual logical drive under
 950  * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
 951  * /sys/block/cciss!c#d# to this entry.
 952  */
 953 static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
 954                                        int drv_index)
 955 {
 956         struct device *dev;
 957
 958         if (h->drv[drv_index]->device_initialized)
 959                 return 0;
 960
 961         dev = &h->drv[drv_index]->dev;
 962         device_initialize(dev);
 963         dev->type = &cciss_dev_type;
 964         dev->bus = &cciss_bus_type;
 965         dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
 966         dev->parent = &h->dev;
 967         h->drv[drv_index]->device_initialized = 1;
 968         return device_add(dev);
 969 }
 970
 971 /*
 972  * Remove sysfs entries for a logical drive.
 973  */
 974 static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
 975         int ctlr_exiting)
 976 {
 977         struct device *dev = &h->drv[drv_index]->dev;
 978
 979         /* special case for c*d0, we only destroy it on controller exit */
 980         if (drv_index == 0 && !ctlr_exiting)
 981                 return;
 982
 983         device_del(dev);
 984         put_device(dev); /* the "final" put. */
 985         h->drv[drv_index] = NULL;
 986 }
 987
 988 /*
 989  * For operations that cannot sleep, a command block is allocated at init,
 990  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
 991  * which ones are free or in use.
 992  */
 993 static CommandList_struct *cmd_alloc(ctlr_info_t *h)
 994 {
 995         CommandList_struct *c;
 996         int i;
 997         u64bit temp64;
 998         dma_addr_t cmd_dma_handle, err_dma_handle;
 999
1000         do {
1001                 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
1002                 if (i == h->nr_cmds)
1003                         return NULL;
1004         } while (test_and_set_bit(i, h->cmd_pool_bits) != 0);
1005         c = h->cmd_pool + i;
1006         memset(c, 0, sizeof(CommandList_struct));
1007         cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
1008         c->err_info = h->errinfo_pool + i;
1009         memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1010         err_dma_handle = h->errinfo_pool_dhandle
1011             + i * sizeof(ErrorInfo_struct);
1012         h->nr_allocs++;
1013
1014         c->cmdindex = i;
1015
1016         INIT_LIST_HEAD(&c->list);
1017         c->busaddr = (__u32) cmd_dma_handle;
1018         temp64.val = (__u64) err_dma_handle;
1019         c->ErrDesc.Addr.lower = temp64.val32.lower;
1020         c->ErrDesc.Addr.upper = temp64.val32.upper;
1021         c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1022
1023         c->ctlr = h->ctlr;
1024         return c;
1025 }
1026
1027 /* allocate a command using pci_alloc_consistent, used for ioctls,
1028  * etc., not for the main i/o path.
1029  */
1030 static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
1031 {
1032         CommandList_struct *c;
1033         u64bit temp64;
1034         dma_addr_t cmd_dma_handle, err_dma_handle;
1035
1036         c = pci_zalloc_consistent(h->pdev, sizeof(CommandList_struct),
1037                                   &cmd_dma_handle);
1038         if (c == NULL)
1039                 return NULL;
1040
1041         c->cmdindex = -1;
1042
1043         c->err_info = pci_zalloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
1044                                             &err_dma_handle);
1045
1046         if (c->err_info == NULL) {
1047                 pci_free_consistent(h->pdev,
1048                         sizeof(CommandList_struct), c, cmd_dma_handle);
1049                 return NULL;
1050         }
1051
1052         INIT_LIST_HEAD(&c->list);
1053         c->busaddr = (__u32) cmd_dma_handle;
1054         temp64.val = (__u64) err_dma_handle;
1055         c->ErrDesc.Addr.lower = temp64.val32.lower;
1056         c->ErrDesc.Addr.upper = temp64.val32.upper;
1057         c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1058
1059         c->ctlr = h->ctlr;
1060         return c;
1061 }
1062
1063 static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1064 {
1065         int i;
1066
1067         i = c - h->cmd_pool;
1068         clear_bit(i, h->cmd_pool_bits);
1069         h->nr_frees++;
1070 }
1071
1072 static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1073 {
1074         u64bit temp64;
1075
1076         temp64.val32.lower = c->ErrDesc.Addr.lower;
1077         temp64.val32.upper = c->ErrDesc.Addr.upper;
1078         pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1079                             c->err_info, (dma_addr_t) temp64.val);
1080         pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1081                 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1082 }
1083
1084 static inline ctlr_info_t *get_host(struct gendisk *disk)
1085 {
1086         return disk->queue->queuedata;
1087 }
1088
1089 static inline drive_info_struct *get_drv(struct gendisk *disk)
1090 {
1091         return disk->private_data;
1092 }
1093
1094 /*
1095  * Open.  Make sure the device is really there.
1096  */
1097 static int cciss_open(struct block_device *bdev, fmode_t mode)
1098 {
1099         ctlr_info_t *h = get_host(bdev->bd_disk);
1100         drive_info_struct *drv = get_drv(bdev->bd_disk);
1101
1102         dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
1103         if (drv->busy_configuring)
1104                 return -EBUSY;
1105         /*
1106          * Root is allowed to open raw volume zero even if it's not configured
1107          * so array config can still work. Root is also allowed to open any
1108          * volume that has a LUN ID, so it can issue IOCTL to reread the
1109          * disk information.  I don't think I really like this
1110          * but I'm already using way to many device nodes to claim another one
1111          * for "raw controller".
1112          */
1113         if (drv->heads == 0) {
1114                 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1115                         /* if not node 0 make sure it is a partition = 0 */
1116                         if (MINOR(bdev->bd_dev) & 0x0f) {
1117                                 return -ENXIO;
1118                                 /* if it is, make sure we have a LUN ID */
1119                         } else if (memcmp(drv->LunID, CTLR_LUNID,
1120                                 sizeof(drv->LunID))) {
1121                                 return -ENXIO;
1122                         }
1123                 }
1124                 if (!capable(CAP_SYS_ADMIN))
1125                         return -EPERM;
1126         }
1127         drv->usage_count++;
1128         h->usage_count++;
1129         return 0;
1130 }
1131
1132 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1133 {
1134         int ret;
1135
1136         mutex_lock(&cciss_mutex);
1137         ret = cciss_open(bdev, mode);
1138         mutex_unlock(&cciss_mutex);
1139
1140         return ret;
1141 }
1142
1143 /*
1144  * Close.  Sync first.
1145  */
1146 static void cciss_release(struct gendisk *disk, fmode_t mode)
1147 {
1148         ctlr_info_t *h;
1149         drive_info_struct *drv;
1150
1151         mutex_lock(&cciss_mutex);
1152         h = get_host(disk);
1153         drv = get_drv(disk);
1154         dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1155         drv->usage_count--;
1156         h->usage_count--;
1157         mutex_unlock(&cciss_mutex);
1158 }
1159
1160 #ifdef CONFIG_COMPAT
1161
1162 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1163                                   unsigned cmd, unsigned long arg);
1164 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1165                                       unsigned cmd, unsigned long arg);
1166
1167 static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1168                               unsigned cmd, unsigned long arg)
1169 {
1170         switch (cmd) {
1171         case CCISS_GETPCIINFO:
1172         case CCISS_GETINTINFO:
1173         case CCISS_SETINTINFO:
1174         case CCISS_GETNODENAME:
1175         case CCISS_SETNODENAME:
1176         case CCISS_GETHEARTBEAT:
1177         case CCISS_GETBUSTYPES:
1178         case CCISS_GETFIRMVER:
1179         case CCISS_GETDRIVVER:
1180         case CCISS_REVALIDVOLS:
1181         case CCISS_DEREGDISK:
1182         case CCISS_REGNEWDISK:
1183         case CCISS_REGNEWD:
1184         case CCISS_RESCANDISK:
1185         case CCISS_GETLUNINFO:
1186                 return cciss_ioctl(bdev, mode, cmd, arg);
1187
1188         case CCISS_PASSTHRU32:
1189                 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1190         case CCISS_BIG_PASSTHRU32:
1191                 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1192
1193         default:
1194                 return -ENOIOCTLCMD;
1195         }
1196 }
1197
1198 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1199                                   unsigned cmd, unsigned long arg)
1200 {
1201         IOCTL32_Command_struct __user *arg32 =
1202             (IOCTL32_Command_struct __user *) arg;
1203         IOCTL_Command_struct arg64;
1204         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1205         int err;
1206         u32 cp;
1207
1208         memset(&arg64, 0, sizeof(arg64));
1209         err = 0;
1210         err |=
1211             copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1212                            sizeof(arg64.LUN_info));
1213         err |=
1214             copy_from_user(&arg64.Request, &arg32->Request,
1215                            sizeof(arg64.Request));
1216         err |=
1217             copy_from_user(&arg64.error_info, &arg32->error_info,
1218                            sizeof(arg64.error_info));
1219         err |= get_user(arg64.buf_size, &arg32->buf_size);
1220         err |= get_user(cp, &arg32->buf);
1221         arg64.buf = compat_ptr(cp);
1222         err |= copy_to_user(p, &arg64, sizeof(arg64));
1223
1224         if (err)
1225                 return -EFAULT;
1226
1227         err = cciss_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1228         if (err)
1229                 return err;
1230         err |=
1231             copy_in_user(&arg32->error_info, &p->error_info,
1232                          sizeof(arg32->error_info));
1233         if (err)
1234                 return -EFAULT;
1235         return err;
1236 }
1237
1238 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1239                                       unsigned cmd, unsigned long arg)
1240 {
1241         BIG_IOCTL32_Command_struct __user *arg32 =
1242             (BIG_IOCTL32_Command_struct __user *) arg;
1243         BIG_IOCTL_Command_struct arg64;
1244         BIG_IOCTL_Command_struct __user *p =
1245             compat_alloc_user_space(sizeof(arg64));
1246         int err;
1247         u32 cp;
1248
1249         memset(&arg64, 0, sizeof(arg64));
1250         err = 0;
1251         err |=
1252             copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1253                            sizeof(arg64.LUN_info));
1254         err |=
1255             copy_from_user(&arg64.Request, &arg32->Request,
1256                            sizeof(arg64.Request));
1257         err |=
1258             copy_from_user(&arg64.error_info, &arg32->error_info,
1259                            sizeof(arg64.error_info));
1260         err |= get_user(arg64.buf_size, &arg32->buf_size);
1261         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1262         err |= get_user(cp, &arg32->buf);
1263         arg64.buf = compat_ptr(cp);
1264         err |= copy_to_user(p, &arg64, sizeof(arg64));
1265
1266         if (err)
1267                 return -EFAULT;
1268
1269         err = cciss_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1270         if (err)
1271                 return err;
1272         err |=
1273             copy_in_user(&arg32->error_info, &p->error_info,
1274                          sizeof(arg32->error_info));
1275         if (err)
1276                 return -EFAULT;
1277         return err;
1278 }
1279 #endif
1280
1281 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1282 {
1283         drive_info_struct *drv = get_drv(bdev->bd_disk);
1284
1285         if (!drv->cylinders)
1286                 return -ENXIO;
1287
1288         geo->heads = drv->heads;
1289         geo->sectors = drv->sectors;
1290         geo->cylinders = drv->cylinders;
1291         return 0;
1292 }
1293
1294 static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
1295 {
1296         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1297                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
1298                 (void)check_for_unit_attention(h, c);
1299 }
1300
1301 static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1302 {
1303         cciss_pci_info_struct pciinfo;
1304
1305         if (!argp)
1306                 return -EINVAL;
1307         pciinfo.domain = pci_domain_nr(h->pdev->bus);
1308         pciinfo.bus = h->pdev->bus->number;
1309         pciinfo.dev_fn = h->pdev->devfn;
1310         pciinfo.board_id = h->board_id;
1311         if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1312                 return -EFAULT;
1313         return 0;
1314 }
1315
1316 static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1317 {
1318         cciss_coalint_struct intinfo;
1319         unsigned long flags;
1320
1321         if (!argp)
1322                 return -EINVAL;
1323         spin_lock_irqsave(&h->lock, flags);
1324         intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1325         intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1326         spin_unlock_irqrestore(&h->lock, flags);
1327         if (copy_to_user
1328             (argp, &intinfo, sizeof(cciss_coalint_struct)))
1329                 return -EFAULT;
1330         return 0;
1331 }
1332
1333 static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1334 {
1335         cciss_coalint_struct intinfo;
1336         unsigned long flags;
1337         int i;
1338
1339         if (!argp)
1340                 return -EINVAL;
1341         if (!capable(CAP_SYS_ADMIN))
1342                 return -EPERM;
1343         if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1344                 return -EFAULT;
1345         if ((intinfo.delay == 0) && (intinfo.count == 0))
1346                 return -EINVAL;
1347         spin_lock_irqsave(&h->lock, flags);
1348         /* Update the field, and then ring the doorbell */
1349         writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1350         writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1351         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1352
1353         for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1354                 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1355                         break;
1356                 udelay(1000); /* delay and try again */
1357         }
1358         spin_unlock_irqrestore(&h->lock, flags);
1359         if (i >= MAX_IOCTL_CONFIG_WAIT)
1360                 return -EAGAIN;
1361         return 0;
1362 }
1363
1364 static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1365 {
1366         NodeName_type NodeName;
1367         unsigned long flags;
1368         int i;
1369
1370         if (!argp)
1371                 return -EINVAL;
1372         spin_lock_irqsave(&h->lock, flags);
1373         for (i = 0; i < 16; i++)
1374                 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1375         spin_unlock_irqrestore(&h->lock, flags);
1376         if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1377                 return -EFAULT;
1378         return 0;
1379 }
1380
1381 static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1382 {
1383         NodeName_type NodeName;
1384         unsigned long flags;
1385         int i;
1386
1387         if (!argp)
1388                 return -EINVAL;
1389         if (!capable(CAP_SYS_ADMIN))
1390                 return -EPERM;
1391         if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1392                 return -EFAULT;
1393         spin_lock_irqsave(&h->lock, flags);
1394         /* Update the field, and then ring the doorbell */
1395         for (i = 0; i < 16; i++)
1396                 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1397         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1398         for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1399                 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1400                         break;
1401                 udelay(1000); /* delay and try again */
1402         }
1403         spin_unlock_irqrestore(&h->lock, flags);
1404         if (i >= MAX_IOCTL_CONFIG_WAIT)
1405                 return -EAGAIN;
1406         return 0;
1407 }
1408
1409 static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1410 {
1411         Heartbeat_type heartbeat;
1412         unsigned long flags;
1413
1414         if (!argp)
1415                 return -EINVAL;
1416         spin_lock_irqsave(&h->lock, flags);
1417         heartbeat = readl(&h->cfgtable->HeartBeat);
1418         spin_unlock_irqrestore(&h->lock, flags);
1419         if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1420                 return -EFAULT;
1421         return 0;
1422 }
1423
1424 static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1425 {
1426         BusTypes_type BusTypes;
1427         unsigned long flags;
1428
1429         if (!argp)
1430                 return -EINVAL;
1431         spin_lock_irqsave(&h->lock, flags);
1432         BusTypes = readl(&h->cfgtable->BusTypes);
1433         spin_unlock_irqrestore(&h->lock, flags);
1434         if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1435                 return -EFAULT;
1436         return 0;
1437 }
1438
1439 static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1440 {
1441         FirmwareVer_type firmware;
1442
1443         if (!argp)
1444                 return -EINVAL;
1445         memcpy(firmware, h->firm_ver, 4);
1446
1447         if (copy_to_user
1448             (argp, firmware, sizeof(FirmwareVer_type)))
1449                 return -EFAULT;
1450         return 0;
1451 }
1452
1453 static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1454 {
1455         DriverVer_type DriverVer = DRIVER_VERSION;
1456
1457         if (!argp)
1458                 return -EINVAL;
1459         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1460                 return -EFAULT;
1461         return 0;
1462 }
1463
1464 static int cciss_getluninfo(ctlr_info_t *h,
1465         struct gendisk *disk, void __user *argp)
1466 {
1467         LogvolInfo_struct luninfo;
1468         drive_info_struct *drv = get_drv(disk);
1469
1470         if (!argp)
1471                 return -EINVAL;
1472         memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1473         luninfo.num_opens = drv->usage_count;
1474         luninfo.num_parts = 0;
1475         if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1476                 return -EFAULT;
1477         return 0;
1478 }
1479
1480 static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1481 {
1482         IOCTL_Command_struct iocommand;
1483         CommandList_struct *c;
1484         char *buff = NULL;
1485         u64bit temp64;
1486         DECLARE_COMPLETION_ONSTACK(wait);
1487
1488         if (!argp)
1489                 return -EINVAL;
1490
1491         if (!capable(CAP_SYS_RAWIO))
1492                 return -EPERM;
1493
1494         if (copy_from_user
1495             (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1496                 return -EFAULT;
1497         if ((iocommand.buf_size < 1) &&
1498             (iocommand.Request.Type.Direction != XFER_NONE)) {
1499                 return -EINVAL;
1500         }
1501         if (iocommand.buf_size > 0) {
1502                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1503                 if (buff == NULL)
1504                         return -EFAULT;
1505         }
1506         if (iocommand.Request.Type.Direction == XFER_WRITE) {
1507                 /* Copy the data into the buffer we created */
1508                 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1509                         kfree(buff);
1510                         return -EFAULT;
1511                 }
1512         } else {
1513                 memset(buff, 0, iocommand.buf_size);
1514         }
1515         c = cmd_special_alloc(h);
1516         if (!c) {
1517                 kfree(buff);
1518                 return -ENOMEM;
1519         }
1520         /* Fill in the command type */
1521         c->cmd_type = CMD_IOCTL_PEND;
1522         /* Fill in Command Header */
1523         c->Header.ReplyQueue = 0;   /* unused in simple mode */
1524         if (iocommand.buf_size > 0) { /* buffer to fill */
1525                 c->Header.SGList = 1;
1526                 c->Header.SGTotal = 1;
1527         } else { /* no buffers to fill */
1528                 c->Header.SGList = 0;
1529                 c->Header.SGTotal = 0;
1530         }
1531         c->Header.LUN = iocommand.LUN_info;
1532         /* use the kernel address the cmd block for tag */
1533         c->Header.Tag.lower = c->busaddr;
1534
1535         /* Fill in Request block */
1536         c->Request = iocommand.Request;
1537
1538         /* Fill in the scatter gather information */
1539         if (iocommand.buf_size > 0) {
1540                 temp64.val = pci_map_single(h->pdev, buff,
1541                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1542                 c->SG[0].Addr.lower = temp64.val32.lower;
1543                 c->SG[0].Addr.upper = temp64.val32.upper;
1544                 c->SG[0].Len = iocommand.buf_size;
1545                 c->SG[0].Ext = 0;  /* we are not chaining */
1546         }
1547         c->waiting = &wait;
1548
1549         enqueue_cmd_and_start_io(h, c);
1550         wait_for_completion(&wait);
1551
1552         /* unlock the buffers from DMA */
1553         temp64.val32.lower = c->SG[0].Addr.lower;
1554         temp64.val32.upper = c->SG[0].Addr.upper;
1555         pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1556                          PCI_DMA_BIDIRECTIONAL);
1557         check_ioctl_unit_attention(h, c);
1558
1559         /* Copy the error information out */
1560         iocommand.error_info = *(c->err_info);
1561         if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1562                 kfree(buff);
1563                 cmd_special_free(h, c);
1564                 return -EFAULT;
1565         }
1566
1567         if (iocommand.Request.Type.Direction == XFER_READ) {
1568                 /* Copy the data out of the buffer we created */
1569                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
1570                         kfree(buff);
1571                         cmd_special_free(h, c);
1572                         return -EFAULT;
1573                 }
1574         }
1575         kfree(buff);
1576         cmd_special_free(h, c);
1577         return 0;
1578 }
1579
1580 static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1581 {
1582         BIG_IOCTL_Command_struct *ioc;
1583         CommandList_struct *c;
1584         unsigned char **buff = NULL;
1585         int *buff_size = NULL;
1586         u64bit temp64;
1587         BYTE sg_used = 0;
1588         int status = 0;
1589         int i;
1590         DECLARE_COMPLETION_ONSTACK(wait);
1591         __u32 left;
1592         __u32 sz;
1593         BYTE __user *data_ptr;
1594
1595         if (!argp)
1596                 return -EINVAL;
1597         if (!capable(CAP_SYS_RAWIO))
1598                 return -EPERM;
1599         ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
1600         if (!ioc) {
1601                 status = -ENOMEM;
1602                 goto cleanup1;
1603         }
1604         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1605                 status = -EFAULT;
1606                 goto cleanup1;
1607         }
1608         if ((ioc->buf_size < 1) &&
1609             (ioc->Request.Type.Direction != XFER_NONE)) {
1610                 status = -EINVAL;
1611                 goto cleanup1;
1612         }
1613         /* Check kmalloc limits  using all SGs */
1614         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1615                 status = -EINVAL;
1616                 goto cleanup1;
1617         }
1618         if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1619                 status = -EINVAL;
1620                 goto cleanup1;
1621         }
1622         buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1623         if (!buff) {
1624                 status = -ENOMEM;
1625                 goto cleanup1;
1626         }
1627         buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1628         if (!buff_size) {
1629                 status = -ENOMEM;
1630                 goto cleanup1;
1631         }
1632         left = ioc->buf_size;
1633         data_ptr = ioc->buf;
1634         while (left) {
1635                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1636                 buff_size[sg_used] = sz;
1637                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1638                 if (buff[sg_used] == NULL) {
1639                         status = -ENOMEM;
1640                         goto cleanup1;
1641                 }
1642                 if (ioc->Request.Type.Direction == XFER_WRITE) {
1643                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
1644                                 status = -EFAULT;
1645                                 goto cleanup1;
1646                         }
1647                 } else {
1648                         memset(buff[sg_used], 0, sz);
1649                 }
1650                 left -= sz;
1651                 data_ptr += sz;
1652                 sg_used++;
1653         }
1654         c = cmd_special_alloc(h);
1655         if (!c) {
1656                 status = -ENOMEM;
1657                 goto cleanup1;
1658         }
1659         c->cmd_type = CMD_IOCTL_PEND;
1660         c->Header.ReplyQueue = 0;
1661         c->Header.SGList = sg_used;
1662         c->Header.SGTotal = sg_used;
1663         c->Header.LUN = ioc->LUN_info;
1664         c->Header.Tag.lower = c->busaddr;
1665
1666         c->Request = ioc->Request;
1667         for (i = 0; i < sg_used; i++) {
1668                 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
1669                                     PCI_DMA_BIDIRECTIONAL);
1670                 c->SG[i].Addr.lower = temp64.val32.lower;
1671                 c->SG[i].Addr.upper = temp64.val32.upper;
1672                 c->SG[i].Len = buff_size[i];
1673                 c->SG[i].Ext = 0;       /* we are not chaining */
1674         }
1675         c->waiting = &wait;
1676         enqueue_cmd_and_start_io(h, c);
1677         wait_for_completion(&wait);
1678         /* unlock the buffers from DMA */
1679         for (i = 0; i < sg_used; i++) {
1680                 temp64.val32.lower = c->SG[i].Addr.lower;
1681                 temp64.val32.upper = c->SG[i].Addr.upper;
1682                 pci_unmap_single(h->pdev,
1683                         (dma_addr_t) temp64.val, buff_size[i],
1684                         PCI_DMA_BIDIRECTIONAL);
1685         }
1686         check_ioctl_unit_attention(h, c);
1687         /* Copy the error information out */
1688         ioc->error_info = *(c->err_info);
1689         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1690                 cmd_special_free(h, c);
1691                 status = -EFAULT;
1692                 goto cleanup1;
1693         }
1694         if (ioc->Request.Type.Direction == XFER_READ) {
1695                 /* Copy the data out of the buffer we created */
1696                 BYTE __user *ptr = ioc->buf;
1697                 for (i = 0; i < sg_used; i++) {
1698                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
1699                                 cmd_special_free(h, c);
1700                                 status = -EFAULT;
1701                                 goto cleanup1;
1702                         }
1703                         ptr += buff_size[i];
1704                 }
1705         }
1706         cmd_special_free(h, c);
1707         status = 0;
1708 cleanup1:
1709         if (buff) {
1710                 for (i = 0; i < sg_used; i++)
1711                         kfree(buff[i]);
1712                 kfree(buff);
1713         }
1714         kfree(buff_size);
1715         kfree(ioc);
1716         return status;
1717 }
1718
1719 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
1720         unsigned int cmd, unsigned long arg)
1721 {
1722         struct gendisk *disk = bdev->bd_disk;
1723         ctlr_info_t *h = get_host(disk);
1724         void __user *argp = (void __user *)arg;
1725
1726         dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1727                 cmd, arg);
1728         switch (cmd) {
1729         case CCISS_GETPCIINFO:
1730                 return cciss_getpciinfo(h, argp);
1731         case CCISS_GETINTINFO:
1732                 return cciss_getintinfo(h, argp);
1733         case CCISS_SETINTINFO:
1734                 return cciss_setintinfo(h, argp);
1735         case CCISS_GETNODENAME:
1736                 return cciss_getnodename(h, argp);
1737         case CCISS_SETNODENAME:
1738                 return cciss_setnodename(h, argp);
1739         case CCISS_GETHEARTBEAT:
1740                 return cciss_getheartbeat(h, argp);
1741         case CCISS_GETBUSTYPES:
1742                 return cciss_getbustypes(h, argp);
1743         case CCISS_GETFIRMVER:
1744                 return cciss_getfirmver(h, argp);
1745         case CCISS_GETDRIVVER:
1746                 return cciss_getdrivver(h, argp);
1747         case CCISS_DEREGDISK:
1748         case CCISS_REGNEWD:
1749         case CCISS_REVALIDVOLS:
1750                 return rebuild_lun_table(h, 0, 1);
1751         case CCISS_GETLUNINFO:
1752                 return cciss_getluninfo(h, disk, argp);
1753         case CCISS_PASSTHRU:
1754                 return cciss_passthru(h, argp);
1755         case CCISS_BIG_PASSTHRU:
1756                 return cciss_bigpassthru(h, argp);
1757
1758         /* scsi_cmd_blk_ioctl handles these, below, though some are not */
1759         /* very meaningful for cciss.  SG_IO is the main one people want. */
1760
1761         case SG_GET_VERSION_NUM:
1762         case SG_SET_TIMEOUT:
1763         case SG_GET_TIMEOUT:
1764         case SG_GET_RESERVED_SIZE:
1765         case SG_SET_RESERVED_SIZE:
1766         case SG_EMULATED_HOST:
1767         case SG_IO:
1768         case SCSI_IOCTL_SEND_COMMAND:
1769                 return scsi_cmd_blk_ioctl(bdev, mode, cmd, argp);
1770
1771         /* scsi_cmd_blk_ioctl would normally handle these, below, but */
1772         /* they aren't a good fit for cciss, as CD-ROMs are */
1773         /* not supported, and we don't have any bus/target/lun */
1774         /* which we present to the kernel. */
1775
1776         case CDROM_SEND_PACKET:
1777         case CDROMCLOSETRAY:
1778         case CDROMEJECT:
1779         case SCSI_IOCTL_GET_IDLUN:
1780         case SCSI_IOCTL_GET_BUS_NUMBER:
1781         default:
1782                 return -ENOTTY;
1783         }
1784 }
1785
1786 static void cciss_check_queues(ctlr_info_t *h)
1787 {
1788         int start_queue = h->next_to_run;
1789         int i;
1790
1791         /* check to see if we have maxed out the number of commands that can
1792          * be placed on the queue.  If so then exit.  We do this check here
1793          * in case the interrupt we serviced was from an ioctl and did not
1794          * free any new commands.
1795          */
1796         if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
1797                 return;
1798
1799         /* We have room on the queue for more commands.  Now we need to queue
1800          * them up.  We will also keep track of the next queue to run so
1801          * that every queue gets a chance to be started first.
1802          */
1803         for (i = 0; i < h->highest_lun + 1; i++) {
1804                 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1805                 /* make sure the disk has been added and the drive is real
1806                  * because this can be called from the middle of init_one.
1807                  */
1808                 if (!h->drv[curr_queue])
1809                         continue;
1810                 if (!(h->drv[curr_queue]->queue) ||
1811                         !(h->drv[curr_queue]->heads))
1812                         continue;
1813                 blk_start_queue(h->gendisk[curr_queue]->queue);
1814
1815                 /* check to see if we have maxed out the number of commands
1816                  * that can be placed on the queue.
1817                  */
1818                 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
1819                         if (curr_queue == start_queue) {
1820                                 h->next_to_run =
1821                                     (start_queue + 1) % (h->highest_lun + 1);
1822                                 break;
1823                         } else {
1824                                 h->next_to_run = curr_queue;
1825                                 break;
1826                         }
1827                 }
1828         }
1829 }
1830
1831 static void cciss_softirq_done(struct request *rq)
1832 {
1833         CommandList_struct *c = rq->completion_data;
1834         ctlr_info_t *h = hba[c->ctlr];
1835         SGDescriptor_struct *curr_sg = c->SG;
1836         u64bit temp64;
1837         unsigned long flags;
1838         int i, ddir;
1839         int sg_index = 0;
1840
1841         if (c->Request.Type.Direction == XFER_READ)
1842                 ddir = PCI_DMA_FROMDEVICE;
1843         else
1844                 ddir = PCI_DMA_TODEVICE;
1845
1846         /* command did not need to be retried */
1847         /* unmap the DMA mapping for all the scatter gather elements */
1848         for (i = 0; i < c->Header.SGList; i++) {
1849                 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
1850                         cciss_unmap_sg_chain_block(h, c);
1851                         /* Point to the next block */
1852                         curr_sg = h->cmd_sg_list[c->cmdindex];
1853                         sg_index = 0;
1854                 }
1855                 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1856                 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1857                 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1858                                 ddir);
1859                 ++sg_index;
1860         }
1861
1862         dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
1863
1864         /* set the residual count for pc requests */
1865         if (blk_rq_is_passthrough(rq))
1866                 scsi_req(rq)->resid_len = c->err_info->ResidualCnt;
1867         blk_end_request_all(rq, scsi_req(rq)->result ? -EIO : 0);
1868
1869         spin_lock_irqsave(&h->lock, flags);
1870         cmd_free(h, c);
1871         cciss_check_queues(h);
1872         spin_unlock_irqrestore(&h->lock, flags);
1873 }
1874
1875 static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1876         unsigned char scsi3addr[], uint32_t log_unit)
1877 {
1878         memcpy(scsi3addr, h->drv[log_unit]->LunID,
1879                 sizeof(h->drv[log_unit]->LunID));
1880 }
1881
1882 /* This function gets the SCSI vendor, model, and revision of a logical drive
1883  * via the inquiry page 0.  Model, vendor, and rev are set to empty strings if
1884  * they cannot be read.
1885  */
1886 static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
1887                                    char *vendor, char *model, char *rev)
1888 {
1889         int rc;
1890         InquiryData_struct *inq_buf;
1891         unsigned char scsi3addr[8];
1892
1893         *vendor = '\0';
1894         *model = '\0';
1895         *rev = '\0';
1896
1897         inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1898         if (!inq_buf)
1899                 return;
1900
1901         log_unit_to_scsi3addr(h, scsi3addr, logvol);
1902         rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
1903                         scsi3addr, TYPE_CMD);
1904         if (rc == IO_OK) {
1905                 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1906                 vendor[VENDOR_LEN] = '\0';
1907                 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1908                 model[MODEL_LEN] = '\0';
1909                 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1910                 rev[REV_LEN] = '\0';
1911         }
1912
1913         kfree(inq_buf);
1914         return;
1915 }
1916
1917 /* This function gets the serial number of a logical drive via
1918  * inquiry page 0x83.  Serial no. is 16 bytes.  If the serial
1919  * number cannot be had, for whatever reason, 16 bytes of 0xff
1920  * are returned instead.
1921  */
1922 static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
1923                                 unsigned char *serial_no, int buflen)
1924 {
1925 #define PAGE_83_INQ_BYTES 64
1926         int rc;
1927         unsigned char *buf;
1928         unsigned char scsi3addr[8];
1929
1930         if (buflen > 16)
1931                 buflen = 16;
1932         memset(serial_no, 0xff, buflen);
1933         buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1934         if (!buf)
1935                 return;
1936         memset(serial_no, 0, buflen);
1937         log_unit_to_scsi3addr(h, scsi3addr, logvol);
1938         rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
1939                 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
1940         if (rc == IO_OK)
1941                 memcpy(serial_no, &buf[8], buflen);
1942         kfree(buf);
1943         return;
1944 }
1945
1946 /*
1947  * cciss_add_disk sets up the block device queue for a logical drive
1948  */
1949 static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
1950                                 int drv_index)
1951 {
1952         disk->queue = blk_alloc_queue(GFP_KERNEL);
1953         if (!disk->queue)
1954                 goto init_queue_failure;
1955
1956         disk->queue->cmd_size = sizeof(struct scsi_request);
1957         disk->queue->request_fn = do_cciss_request;
1958         disk->queue->queue_lock = &h->lock;
1959         if (blk_init_allocated_queue(disk->queue) < 0)
1960                 goto cleanup_queue;
1961
1962         sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1963         disk->major = h->major;
1964         disk->first_minor = drv_index << NWD_SHIFT;
1965         disk->fops = &cciss_fops;
1966         if (cciss_create_ld_sysfs_entry(h, drv_index))
1967                 goto cleanup_queue;
1968         disk->private_data = h->drv[drv_index];
1969
1970         /* Set up queue information */
1971         blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1972
1973         /* This is a hardware imposed limit. */
1974         blk_queue_max_segments(disk->queue, h->maxsgentries);
1975
1976         blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
1977
1978         blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1979
1980         disk->queue->queuedata = h;
1981
1982         blk_queue_logical_block_size(disk->queue,
1983                                      h->drv[drv_index]->block_size);
1984
1985         /* Make sure all queue data is written out before */
1986         /* setting h->drv[drv_index]->queue, as setting this */
1987         /* allows the interrupt handler to start the queue */
1988         wmb();
1989         h->drv[drv_index]->queue = disk->queue;
1990         device_add_disk(&h->drv[drv_index]->dev, disk);
1991         return 0;
1992
1993 cleanup_queue:
1994         blk_cleanup_queue(disk->queue);
1995         disk->queue = NULL;
1996 init_queue_failure:
1997         return -1;
1998 }
1999
2000 /* This function will check the usage_count of the drive to be updated/added.
2001  * If the usage_count is zero and it is a heretofore unknown drive, or,
2002  * the drive's capacity, geometry, or serial number has changed,
2003  * then the drive information will be updated and the disk will be
2004  * re-registered with the kernel.  If these conditions don't hold,
2005  * then it will be left alone for the next reboot.  The exception to this
2006  * is disk 0 which will always be left registered with the kernel since it
2007  * is also the controller node.  Any changes to disk 0 will show up on
2008  * the next reboot.
2009  */
2010 static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
2011         int first_time, int via_ioctl)
2012 {
2013         struct gendisk *disk;
2014         InquiryData_struct *inq_buff = NULL;
2015         unsigned int block_size;
2016         sector_t total_size;
2017         unsigned long flags = 0;
2018         int ret = 0;
2019         drive_info_struct *drvinfo;
2020
2021         /* Get information about the disk and modify the driver structure */
2022         inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2023         drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
2024         if (inq_buff == NULL || drvinfo == NULL)
2025                 goto mem_msg;
2026
2027         /* testing to see if 16-byte CDBs are already being used */
2028         if (h->cciss_read == CCISS_READ_16) {
2029                 cciss_read_capacity_16(h, drv_index,
2030                         &total_size, &block_size);
2031
2032         } else {
2033                 cciss_read_capacity(h, drv_index, &total_size, &block_size);
2034                 /* if read_capacity returns all F's this volume is >2TB */
2035                 /* in size so we switch to 16-byte CDB's for all */
2036                 /* read/write ops */
2037                 if (total_size == 0xFFFFFFFFULL) {
2038                         cciss_read_capacity_16(h, drv_index,
2039                         &total_size, &block_size);
2040                         h->cciss_read = CCISS_READ_16;
2041                         h->cciss_write = CCISS_WRITE_16;
2042                 } else {
2043                         h->cciss_read = CCISS_READ_10;
2044                         h->cciss_write = CCISS_WRITE_10;
2045                 }
2046         }
2047
2048         cciss_geometry_inquiry(h, drv_index, total_size, block_size,
2049                                inq_buff, drvinfo);
2050         drvinfo->block_size = block_size;
2051         drvinfo->nr_blocks = total_size + 1;
2052
2053         cciss_get_device_descr(h, drv_index, drvinfo->vendor,
2054                                 drvinfo->model, drvinfo->rev);
2055         cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
2056                         sizeof(drvinfo->serial_no));
2057         /* Save the lunid in case we deregister the disk, below. */
2058         memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2059                 sizeof(drvinfo->LunID));
2060
2061         /* Is it the same disk we already know, and nothing's changed? */
2062         if (h->drv[drv_index]->raid_level != -1 &&
2063                 ((memcmp(drvinfo->serial_no,
2064                                 h->drv[drv_index]->serial_no, 16) == 0) &&
2065                 drvinfo->block_size == h->drv[drv_index]->block_size &&
2066                 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2067                 drvinfo->heads == h->drv[drv_index]->heads &&
2068                 drvinfo->sectors == h->drv[drv_index]->sectors &&
2069                 drvinfo->cylinders == h->drv[drv_index]->cylinders))
2070                         /* The disk is unchanged, nothing to update */
2071                         goto freeret;
2072
2073         /* If we get here it's not the same disk, or something's changed,
2074          * so we need to * deregister it, and re-register it, if it's not
2075          * in use.
2076          * If the disk already exists then deregister it before proceeding
2077          * (unless it's the first disk (for the controller node).
2078          */
2079         if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
2080                 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
2081                 spin_lock_irqsave(&h->lock, flags);
2082                 h->drv[drv_index]->busy_configuring = 1;
2083                 spin_unlock_irqrestore(&h->lock, flags);
2084
2085                 /* deregister_disk sets h->drv[drv_index]->queue = NULL
2086                  * which keeps the interrupt handler from starting
2087                  * the queue.
2088                  */
2089                 ret = deregister_disk(h, drv_index, 0, via_ioctl);
2090         }
2091
2092         /* If the disk is in use return */
2093         if (ret)
2094                 goto freeret;
2095
2096         /* Save the new information from cciss_geometry_inquiry
2097          * and serial number inquiry.  If the disk was deregistered
2098          * above, then h->drv[drv_index] will be NULL.
2099          */
2100         if (h->drv[drv_index] == NULL) {
2101                 drvinfo->device_initialized = 0;
2102                 h->drv[drv_index] = drvinfo;
2103                 drvinfo = NULL; /* so it won't be freed below. */
2104         } else {
2105                 /* special case for cxd0 */
2106                 h->drv[drv_index]->block_size = drvinfo->block_size;
2107                 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2108                 h->drv[drv_index]->heads = drvinfo->heads;
2109                 h->drv[drv_index]->sectors = drvinfo->sectors;
2110                 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2111                 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2112                 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2113                 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2114                         VENDOR_LEN + 1);
2115                 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2116                 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2117         }
2118
2119         ++h->num_luns;
2120         disk = h->gendisk[drv_index];
2121         set_capacity(disk, h->drv[drv_index]->nr_blocks);
2122
2123         /* If it's not disk 0 (drv_index != 0)
2124          * or if it was disk 0, but there was previously
2125          * no actual corresponding configured logical drive
2126          * (raid_leve == -1) then we want to update the
2127          * logical drive's information.
2128          */
2129         if (drv_index || first_time) {
2130                 if (cciss_add_disk(h, disk, drv_index) != 0) {
2131                         cciss_free_gendisk(h, drv_index);
2132                         cciss_free_drive_info(h, drv_index);
2133                         dev_warn(&h->pdev->dev, "could not update disk %d\n",
2134                                 drv_index);
2135                         --h->num_luns;
2136                 }
2137         }
2138
2139 freeret:
2140         kfree(inq_buff);
2141         kfree(drvinfo);
2142         return;
2143 mem_msg:
2144         dev_err(&h->pdev->dev, "out of memory\n");
2145         goto freeret;
2146 }
2147
2148 /* This function will find the first index of the controllers drive array
2149  * that has a null drv pointer and allocate the drive info struct and
2150  * will return that index   This is where new drives will be added.
2151  * If the index to be returned is greater than the highest_lun index for
2152  * the controller then highest_lun is set * to this new index.
2153  * If there are no available indexes or if tha allocation fails, then -1
2154  * is returned.  * "controller_node" is used to know if this is a real
2155  * logical drive, or just the controller node, which determines if this
2156  * counts towards highest_lun.
2157  */
2158 static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
2159 {
2160         int i;
2161         drive_info_struct *drv;
2162
2163         /* Search for an empty slot for our drive info */
2164         for (i = 0; i < CISS_MAX_LUN; i++) {
2165
2166                 /* if not cxd0 case, and it's occupied, skip it. */
2167                 if (h->drv[i] && i != 0)
2168                         continue;
2169                 /*
2170                  * If it's cxd0 case, and drv is alloc'ed already, and a
2171                  * disk is configured there, skip it.
2172                  */
2173                 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2174                         continue;
2175
2176                 /*
2177                  * We've found an empty slot.  Update highest_lun
2178                  * provided this isn't just the fake cxd0 controller node.
2179                  */
2180                 if (i > h->highest_lun && !controller_node)
2181                         h->highest_lun = i;
2182
2183                 /* If adding a real disk at cxd0, and it's already alloc'ed */
2184                 if (i == 0 && h->drv[i] != NULL)
2185                         return i;
2186
2187                 /*
2188                  * Found an empty slot, not already alloc'ed.  Allocate it.
2189                  * Mark it with raid_level == -1, so we know it's new later on.
2190                  */
2191                 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2192                 if (!drv)
2193                         return -1;
2194                 drv->raid_level = -1; /* so we know it's new */
2195                 h->drv[i] = drv;
2196                 return i;
2197         }
2198         return -1;
2199 }
2200
2201 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2202 {
2203         kfree(h->drv[drv_index]);
2204         h->drv[drv_index] = NULL;
2205 }
2206
2207 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2208 {
2209         put_disk(h->gendisk[drv_index]);
2210         h->gendisk[drv_index] = NULL;
2211 }
2212
2213 /* cciss_add_gendisk finds a free hba[]->drv structure
2214  * and allocates a gendisk if needed, and sets the lunid
2215  * in the drvinfo structure.   It returns the index into
2216  * the ->drv[] array, or -1 if none are free.
2217  * is_controller_node indicates whether highest_lun should
2218  * count this disk, or if it's only being added to provide
2219  * a means to talk to the controller in case no logical
2220  * drives have yet been configured.
2221  */
2222 static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2223         int controller_node)
2224 {
2225         int drv_index;
2226
2227         drv_index = cciss_alloc_drive_info(h, controller_node);
2228         if (drv_index == -1)
2229                 return -1;
2230
2231         /*Check if the gendisk needs to be allocated */
2232         if (!h->gendisk[drv_index]) {
2233                 h->gendisk[drv_index] =
2234                         alloc_disk(1 << NWD_SHIFT);
2235                 if (!h->gendisk[drv_index]) {
2236                         dev_err(&h->pdev->dev,
2237                                 "could not allocate a new disk %d\n",
2238                                 drv_index);
2239                         goto err_free_drive_info;
2240                 }
2241         }
2242         memcpy(h->drv[drv_index]->LunID, lunid,
2243                 sizeof(h->drv[drv_index]->LunID));
2244         if (cciss_create_ld_sysfs_entry(h, drv_index))
2245                 goto err_free_disk;
2246         /* Don't need to mark this busy because nobody */
2247         /* else knows about this disk yet to contend */
2248         /* for access to it. */
2249         h->drv[drv_index]->busy_configuring = 0;
2250         wmb();
2251         return drv_index;
2252
2253 err_free_disk:
2254         cciss_free_gendisk(h, drv_index);
2255 err_free_drive_info:
2256         cciss_free_drive_info(h, drv_index);
2257         return -1;
2258 }
2259
2260 /* This is for the special case of a controller which
2261  * has no logical drives.  In this case, we still need
2262  * to register a disk so the controller can be accessed
2263  * by the Array Config Utility.
2264  */
2265 static void cciss_add_controller_node(ctlr_info_t *h)
2266 {
2267         struct gendisk *disk;
2268         int drv_index;
2269
2270         if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2271                 return;
2272
2273         drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
2274         if (drv_index == -1)
2275                 goto error;
2276         h->drv[drv_index]->block_size = 512;
2277         h->drv[drv_index]->nr_blocks = 0;
2278         h->drv[drv_index]->heads = 0;
2279         h->drv[drv_index]->sectors = 0;
2280         h->drv[drv_index]->cylinders = 0;
2281         h->drv[drv_index]->raid_level = -1;
2282         memset(h->drv[drv_index]->serial_no, 0, 16);
2283         disk = h->gendisk[drv_index];
2284         if (cciss_add_disk(h, disk, drv_index) == 0)
2285                 return;
2286         cciss_free_gendisk(h, drv_index);
2287         cciss_free_drive_info(h, drv_index);
2288 error:
2289         dev_warn(&h->pdev->dev, "could not add disk 0.\n");
2290         return;
2291 }
2292
2293 /* This function will add and remove logical drives from the Logical
2294  * drive array of the controller and maintain persistency of ordering
2295  * so that mount points are preserved until the next reboot.  This allows
2296  * for the removal of logical drives in the middle of the drive array
2297  * without a re-ordering of those drives.
2298  * INPUT
2299  * h            = The controller to perform the operations on
2300  */
2301 static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2302         int via_ioctl)
2303 {
2304         int num_luns;
2305         ReportLunData_struct *ld_buff = NULL;
2306         int return_code;
2307         int listlength = 0;
2308         int i;
2309         int drv_found;
2310         int drv_index = 0;
2311         unsigned char lunid[8] = CTLR_LUNID;
2312         unsigned long flags;
2313
2314         if (!capable(CAP_SYS_RAWIO))
2315                 return -EPERM;
2316
2317         /* Set busy_configuring flag for this operation */
2318         spin_lock_irqsave(&h->lock, flags);
2319         if (h->busy_configuring) {
2320                 spin_unlock_irqrestore(&h->lock, flags);
2321                 return -EBUSY;
2322         }
2323         h->busy_configuring = 1;
2324         spin_unlock_irqrestore(&h->lock, flags);
2325
2326         ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2327         if (ld_buff == NULL)
2328                 goto mem_msg;
2329
2330         return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
2331                                       sizeof(ReportLunData_struct),
2332                                       0, CTLR_LUNID, TYPE_CMD);
2333
2334         if (return_code == IO_OK)
2335                 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2336         else {  /* reading number of logical volumes failed */
2337                 dev_warn(&h->pdev->dev,
2338                         "report logical volume command failed\n");
2339                 listlength = 0;
2340                 goto freeret;
2341         }
2342
2343         num_luns = listlength / 8;      /* 8 bytes per entry */
2344         if (num_luns > CISS_MAX_LUN) {
2345                 num_luns = CISS_MAX_LUN;
2346                 dev_warn(&h->pdev->dev, "more luns configured"
2347                        " on controller than can be handled by"
2348                        " this driver.\n");
2349         }
2350
2351         if (num_luns == 0)
2352                 cciss_add_controller_node(h);
2353
2354         /* Compare controller drive array to driver's drive array
2355          * to see if any drives are missing on the controller due
2356          * to action of Array Config Utility (user deletes drive)
2357          * and deregister logical drives which have disappeared.
2358          */
2359         for (i = 0; i <= h->highest_lun; i++) {
2360                 int j;
2361                 drv_found = 0;
2362
2363                 /* skip holes in the array from already deleted drives */
2364                 if (h->drv[i] == NULL)
2365                         continue;
2366
2367                 for (j = 0; j < num_luns; j++) {
2368                         memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
2369                         if (memcmp(h->drv[i]->LunID, lunid,
2370                                 sizeof(lunid)) == 0) {
2371                                 drv_found = 1;
2372                                 break;
2373                         }
2374                 }
2375                 if (!drv_found) {
2376                         /* Deregister it from the OS, it's gone. */
2377                         spin_lock_irqsave(&h->lock, flags);
2378                         h->drv[i]->busy_configuring = 1;
2379                         spin_unlock_irqrestore(&h->lock, flags);
2380                         return_code = deregister_disk(h, i, 1, via_ioctl);
2381                         if (h->drv[i] != NULL)
2382                                 h->drv[i]->busy_configuring = 0;
2383                 }
2384         }
2385
2386         /* Compare controller drive array to driver's drive array.
2387          * Check for updates in the drive information and any new drives
2388          * on the controller due to ACU adding logical drives, or changing
2389          * a logical drive's size, etc.  Reregister any new/changed drives
2390          */
2391         for (i = 0; i < num_luns; i++) {
2392                 int j;
2393
2394                 drv_found = 0;
2395
2396                 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
2397                 /* Find if the LUN is already in the drive array
2398                  * of the driver.  If so then update its info
2399                  * if not in use.  If it does not exist then find
2400                  * the first free index and add it.
2401                  */
2402                 for (j = 0; j <= h->highest_lun; j++) {
2403                         if (h->drv[j] != NULL &&
2404                                 memcmp(h->drv[j]->LunID, lunid,
2405                                         sizeof(h->drv[j]->LunID)) == 0) {
2406                                 drv_index = j;
2407                                 drv_found = 1;
2408                                 break;
2409                         }
2410                 }
2411
2412                 /* check if the drive was found already in the array */
2413                 if (!drv_found) {
2414                         drv_index = cciss_add_gendisk(h, lunid, 0);
2415                         if (drv_index == -1)
2416                                 goto freeret;
2417                 }
2418                 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
2419         }               /* end for */
2420
2421 freeret:
2422         kfree(ld_buff);
2423         h->busy_configuring = 0;
2424         /* We return -1 here to tell the ACU that we have registered/updated
2425          * all of the drives that we can and to keep it from calling us
2426          * additional times.
2427          */
2428         return -1;
2429 mem_msg:
2430         dev_err(&h->pdev->dev, "out of memory\n");
2431         h->busy_configuring = 0;
2432         goto freeret;
2433 }
2434
2435 static void cciss_clear_drive_info(drive_info_struct *drive_info)
2436 {
2437         /* zero out the disk size info */
2438         drive_info->nr_blocks = 0;
2439         drive_info->block_size = 0;
2440         drive_info->heads = 0;
2441         drive_info->sectors = 0;
2442         drive_info->cylinders = 0;
2443         drive_info->raid_level = -1;
2444         memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2445         memset(drive_info->model, 0, sizeof(drive_info->model));
2446         memset(drive_info->rev, 0, sizeof(drive_info->rev));
2447         memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2448         /*
2449          * don't clear the LUNID though, we need to remember which
2450          * one this one is.
2451          */
2452 }
2453
2454 /* This function will deregister the disk and it's queue from the
2455  * kernel.  It must be called with the controller lock held and the
2456  * drv structures busy_configuring flag set.  It's parameters are:
2457  *
2458  * disk = This is the disk to be deregistered
2459  * drv  = This is the drive_info_struct associated with the disk to be
2460  *        deregistered.  It contains information about the disk used
2461  *        by the driver.
2462  * clear_all = This flag determines whether or not the disk information
2463  *             is going to be completely cleared out and the highest_lun
2464  *             reset.  Sometimes we want to clear out information about
2465  *             the disk in preparation for re-adding it.  In this case
2466  *             the highest_lun should be left unchanged and the LunID
2467  *             should not be cleared.
2468  * via_ioctl
2469  *    This indicates whether we've reached this path via ioctl.
2470  *    This affects the maximum usage count allowed for c0d0 to be messed with.
2471  *    If this path is reached via ioctl(), then the max_usage_count will
2472  *    be 1, as the process calling ioctl() has got to have the device open.
2473  *    If we get here via sysfs, then the max usage count will be zero.
2474 */
2475 static int deregister_disk(ctlr_info_t *h, int drv_index,
2476                            int clear_all, int via_ioctl)
2477 {
2478         int i;
2479         struct gendisk *disk;
2480         drive_info_struct *drv;
2481         int recalculate_highest_lun;
2482
2483         if (!capable(CAP_SYS_RAWIO))
2484                 return -EPERM;
2485
2486         drv = h->drv[drv_index];
2487         disk = h->gendisk[drv_index];
2488
2489         /* make sure logical volume is NOT is use */
2490         if (clear_all || (h->gendisk[0] == disk)) {
2491                 if (drv->usage_count > via_ioctl)
2492                         return -EBUSY;
2493         } else if (drv->usage_count > 0)
2494                 return -EBUSY;
2495
2496         recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2497
2498         /* invalidate the devices and deregister the disk.  If it is disk
2499          * zero do not deregister it but just zero out it's values.  This
2500          * allows us to delete disk zero but keep the controller registered.
2501          */
2502         if (h->gendisk[0] != disk) {
2503                 struct request_queue *q = disk->queue;
2504                 if (disk->flags & GENHD_FL_UP) {
2505                         cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
2506                         del_gendisk(disk);
2507                 }
2508                 if (q)
2509                         blk_cleanup_queue(q);
2510                 /* If clear_all is set then we are deleting the logical
2511                  * drive, not just refreshing its info.  For drives
2512                  * other than disk 0 we will call put_disk.  We do not
2513                  * do this for disk 0 as we need it to be able to
2514                  * configure the controller.
2515                  */
2516                 if (clear_all){
2517                         /* This isn't pretty, but we need to find the
2518                          * disk in our array and NULL our the pointer.
2519                          * This is so that we will call alloc_disk if
2520                          * this index is used again later.
2521                          */
2522                         for (i=0; i < CISS_MAX_LUN; i++){
2523                                 if (h->gendisk[i] == disk) {
2524                                         h->gendisk[i] = NULL;
2525                                         break;
2526                                 }
2527                         }
2528                         put_disk(disk);
2529                 }
2530         } else {
2531                 set_capacity(disk, 0);
2532                 cciss_clear_drive_info(drv);
2533         }
2534
2535         --h->num_luns;
2536
2537         /* if it was the last disk, find the new hightest lun */
2538         if (clear_all && recalculate_highest_lun) {
2539                 int newhighest = -1;
2540                 for (i = 0; i <= h->highest_lun; i++) {
2541                         /* if the disk has size > 0, it is available */
2542                         if (h->drv[i] && h->drv[i]->heads)
2543                                 newhighest = i;
2544                 }
2545                 h->highest_lun = newhighest;
2546         }
2547         return 0;
2548 }
2549
2550 static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
2551                 size_t size, __u8 page_code, unsigned char *scsi3addr,
2552                 int cmd_type)
2553 {
2554         u64bit buff_dma_handle;
2555         int status = IO_OK;
2556
2557         c->cmd_type = CMD_IOCTL_PEND;
2558         c->Header.ReplyQueue = 0;
2559         if (buff != NULL) {
2560                 c->Header.SGList = 1;
2561                 c->Header.SGTotal = 1;
2562         } else {
2563                 c->Header.SGList = 0;
2564                 c->Header.SGTotal = 0;
2565         }
2566         c->Header.Tag.lower = c->busaddr;
2567         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2568
2569         c->Request.Type.Type = cmd_type;
2570         if (cmd_type == TYPE_CMD) {
2571                 switch (cmd) {
2572                 case CISS_INQUIRY:
2573                         /* are we trying to read a vital product page */
2574                         if (page_code != 0) {
2575                                 c->Request.CDB[1] = 0x01;
2576                                 c->Request.CDB[2] = page_code;
2577                         }
2578                         c->Request.CDBLen = 6;
2579                         c->Request.Type.Attribute = ATTR_SIMPLE;
2580                         c->Request.Type.Direction = XFER_READ;
2581                         c->Request.Timeout = 0;
2582                         c->Request.CDB[0] = CISS_INQUIRY;
2583                         c->Request.CDB[4] = size & 0xFF;
2584                         break;
2585                 case CISS_REPORT_LOG:
2586                 case CISS_REPORT_PHYS:
2587                         /* Talking to controller so It's a physical command
2588                            mode = 00 target = 0.  Nothing to write.
2589                          */
2590                         c->Request.CDBLen = 12;
2591                         c->Request.Type.Attribute = ATTR_SIMPLE;
2592                         c->Request.Type.Direction = XFER_READ;
2593                         c->Request.Timeout = 0;
2594                         c->Request.CDB[0] = cmd;
2595                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2596                         c->Request.CDB[7] = (size >> 16) & 0xFF;
2597                         c->Request.CDB[8] = (size >> 8) & 0xFF;
2598                         c->Request.CDB[9] = size & 0xFF;
2599                         break;
2600
2601                 case CCISS_READ_CAPACITY:
2602                         c->Request.CDBLen = 10;
2603                         c->Request.Type.Attribute = ATTR_SIMPLE;
2604                         c->Request.Type.Direction = XFER_READ;
2605                         c->Request.Timeout = 0;
2606                         c->Request.CDB[0] = cmd;
2607                         break;
2608                 case CCISS_READ_CAPACITY_16:
2609                         c->Request.CDBLen = 16;
2610                         c->Request.Type.Attribute = ATTR_SIMPLE;
2611                         c->Request.Type.Direction = XFER_READ;
2612                         c->Request.Timeout = 0;
2613                         c->Request.CDB[0] = cmd;
2614                         c->Request.CDB[1] = 0x10;
2615                         c->Request.CDB[10] = (size >> 24) & 0xFF;
2616                         c->Request.CDB[11] = (size >> 16) & 0xFF;
2617                         c->Request.CDB[12] = (size >> 8) & 0xFF;
2618                         c->Request.CDB[13] = size & 0xFF;
2619                         c->Request.Timeout = 0;
2620                         c->Request.CDB[0] = cmd;
2621                         break;
2622                 case CCISS_CACHE_FLUSH:
2623                         c->Request.CDBLen = 12;
2624                         c->Request.Type.Attribute = ATTR_SIMPLE;
2625                         c->Request.Type.Direction = XFER_WRITE;
2626                         c->Request.Timeout = 0;
2627                         c->Request.CDB[0] = BMIC_WRITE;
2628                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2629                         c->Request.CDB[7] = (size >> 8) & 0xFF;
2630                         c->Request.CDB[8] = size & 0xFF;
2631                         break;
2632                 case TEST_UNIT_READY:
2633                         c->Request.CDBLen = 6;
2634                         c->Request.Type.Attribute = ATTR_SIMPLE;
2635                         c->Request.Type.Direction = XFER_NONE;
2636                         c->Request.Timeout = 0;
2637                         break;
2638                 default:
2639                         dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
2640                         return IO_ERROR;
2641                 }
2642         } else if (cmd_type == TYPE_MSG) {
2643                 switch (cmd) {
2644                 case CCISS_ABORT_MSG:
2645                         c->Request.CDBLen = 12;
2646                         c->Request.Type.Attribute = ATTR_SIMPLE;
2647                         c->Request.Type.Direction = XFER_WRITE;
2648                         c->Request.Timeout = 0;
2649                         c->Request.CDB[0] = cmd;        /* abort */
2650                         c->Request.CDB[1] = 0;  /* abort a command */
2651                         /* buff contains the tag of the command to abort */
2652                         memcpy(&c->Request.CDB[4], buff, 8);
2653                         break;
2654                 case CCISS_RESET_MSG:
2655                         c->Request.CDBLen = 16;
2656                         c->Request.Type.Attribute = ATTR_SIMPLE;
2657                         c->Request.Type.Direction = XFER_NONE;
2658                         c->Request.Timeout = 0;
2659                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2660                         c->Request.CDB[0] = cmd;        /* reset */
2661                         c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
2662                         break;
2663                 case CCISS_NOOP_MSG:
2664                         c->Request.CDBLen = 1;
2665                         c->Request.Type.Attribute = ATTR_SIMPLE;
2666                         c->Request.Type.Direction = XFER_WRITE;
2667                         c->Request.Timeout = 0;
2668                         c->Request.CDB[0] = cmd;
2669                         break;
2670                 default:
2671                         dev_warn(&h->pdev->dev,
2672                                 "unknown message type %d\n", cmd);
2673                         return IO_ERROR;
2674                 }
2675         } else {
2676                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2677                 return IO_ERROR;
2678         }
2679         /* Fill in the scatter gather information */
2680         if (size > 0) {
2681                 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
2682                                                              buff, size,
2683                                                              PCI_DMA_BIDIRECTIONAL);
2684                 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2685                 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2686                 c->SG[0].Len = size;
2687                 c->SG[0].Ext = 0;       /* we are not chaining */
2688         }
2689         return status;
2690 }
2691
2692 static int cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr,
2693                             u8 reset_type)
2694 {
2695         CommandList_struct *c;
2696         int return_status;
2697
2698         c = cmd_alloc(h);
2699         if (!c)
2700                 return -ENOMEM;
2701         return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0,
2702                 CTLR_LUNID, TYPE_MSG);
2703         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2704         if (return_status != IO_OK) {
2705                 cmd_special_free(h, c);
2706                 return return_status;
2707         }
2708         c->waiting = NULL;
2709         enqueue_cmd_and_start_io(h, c);
2710         /* Don't wait for completion, the reset won't complete.  Don't free
2711          * the command either.  This is the last command we will send before
2712          * re-initializing everything, so it doesn't matter and won't leak.
2713          */
2714         return 0;
2715 }
2716
2717 static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2718 {
2719         switch (c->err_info->ScsiStatus) {
2720         case SAM_STAT_GOOD:
2721                 return IO_OK;
2722         case SAM_STAT_CHECK_CONDITION:
2723                 switch (0xf & c->err_info->SenseInfo[2]) {
2724                 case 0: return IO_OK; /* no sense */
2725                 case 1: return IO_OK; /* recovered error */
2726                 default:
2727                         if (check_for_unit_attention(h, c))
2728                                 return IO_NEEDS_RETRY;
2729                         dev_warn(&h->pdev->dev, "cmd 0x%02x "
2730                                 "check condition, sense key = 0x%02x\n",
2731                                 c->Request.CDB[0], c->err_info->SenseInfo[2]);
2732                 }
2733                 break;
2734         default:
2735                 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2736                         "scsi status = 0x%02x\n",
2737                         c->Request.CDB[0], c->err_info->ScsiStatus);
2738                 break;
2739         }
2740         return IO_ERROR;
2741 }
2742
2743 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
2744 {
2745         int return_status = IO_OK;
2746
2747         if (c->err_info->CommandStatus == CMD_SUCCESS)
2748                 return IO_OK;
2749
2750         switch (c->err_info->CommandStatus) {
2751         case CMD_TARGET_STATUS:
2752                 return_status = check_target_status(h, c);
2753                 break;
2754         case CMD_DATA_UNDERRUN:
2755         case CMD_DATA_OVERRUN:
2756                 /* expected for inquiry and report lun commands */
2757                 break;
2758         case CMD_INVALID:
2759                 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
2760                        "reported invalid\n", c->Request.CDB[0]);
2761                 return_status = IO_ERROR;
2762                 break;
2763         case CMD_PROTOCOL_ERR:
2764                 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2765                        "protocol error\n", c->Request.CDB[0]);
2766                 return_status = IO_ERROR;
2767                 break;
2768         case CMD_HARDWARE_ERR:
2769                 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2770                        " hardware error\n", c->Request.CDB[0]);
2771                 return_status = IO_ERROR;
2772                 break;
2773         case CMD_CONNECTION_LOST:
2774                 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2775                        "connection lost\n", c->Request.CDB[0]);
2776                 return_status = IO_ERROR;
2777                 break;
2778         case CMD_ABORTED:
2779                 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
2780                        "aborted\n", c->Request.CDB[0]);
2781                 return_status = IO_ERROR;
2782                 break;
2783         case CMD_ABORT_FAILED:
2784                 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
2785                        "abort failed\n", c->Request.CDB[0]);
2786                 return_status = IO_ERROR;
2787                 break;
2788         case CMD_UNSOLICITED_ABORT:
2789                 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
2790                         c->Request.CDB[0]);
2791                 return_status = IO_NEEDS_RETRY;
2792                 break;
2793         case CMD_UNABORTABLE:
2794                 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2795                 return_status = IO_ERROR;
2796                 break;
2797         default:
2798                 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
2799                        "unknown status %x\n", c->Request.CDB[0],
2800                        c->err_info->CommandStatus);
2801                 return_status = IO_ERROR;
2802         }
2803         return return_status;
2804 }
2805
2806 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2807         int attempt_retry)
2808 {
2809         DECLARE_COMPLETION_ONSTACK(wait);
2810         u64bit buff_dma_handle;
2811         int return_status = IO_OK;
2812
2813 resend_cmd2:
2814         c->waiting = &wait;
2815         enqueue_cmd_and_start_io(h, c);
2816
2817         wait_for_completion(&wait);
2818
2819         if (c->err_info->CommandStatus == 0 || !attempt_retry)
2820                 goto command_done;
2821
2822         return_status = process_sendcmd_error(h, c);
2823
2824         if (return_status == IO_NEEDS_RETRY &&
2825                 c->retry_count < MAX_CMD_RETRIES) {
2826                 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
2827                         c->Request.CDB[0]);
2828                 c->retry_count++;
2829                 /* erase the old error information */
2830                 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2831                 return_status = IO_OK;
2832                 reinit_completion(&wait);
2833                 goto resend_cmd2;
2834         }
2835
2836 command_done:
2837         /* unlock the buffers from DMA */
2838         buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2839         buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
2840         pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2841                          c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
2842         return return_status;
2843 }
2844
2845 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
2846                            __u8 page_code, unsigned char scsi3addr[],
2847                         int cmd_type)
2848 {
2849         CommandList_struct *c;
2850         int return_status;
2851
2852         c = cmd_special_alloc(h);
2853         if (!c)
2854                 return -ENOMEM;
2855         return_status = fill_cmd(h, c, cmd, buff, size, page_code,
2856                 scsi3addr, cmd_type);
2857         if (return_status == IO_OK)
2858                 return_status = sendcmd_withirq_core(h, c, 1);
2859
2860         cmd_special_free(h, c);
2861         return return_status;
2862 }
2863
2864 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
2865                                    sector_t total_size,
2866                                    unsigned int block_size,
2867                                    InquiryData_struct *inq_buff,
2868                                    drive_info_struct *drv)
2869 {
2870         int return_code;
2871         unsigned long t;
2872         unsigned char scsi3addr[8];
2873
2874         memset(inq_buff, 0, sizeof(InquiryData_struct));
2875         log_unit_to_scsi3addr(h, scsi3addr, logvol);
2876         return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
2877                         sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
2878         if (return_code == IO_OK) {
2879                 if (inq_buff->data_byte[8] == 0xFF) {
2880                         dev_warn(&h->pdev->dev,
2881                                "reading geometry failed, volume "
2882                                "does not support reading geometry\n");
2883                         drv->heads = 255;
2884                         drv->sectors = 32;      /* Sectors per track */
2885                         drv->cylinders = total_size + 1;
2886                         drv->raid_level = RAID_UNKNOWN;
2887                 } else {
2888                         drv->heads = inq_buff->data_byte[6];
2889                         drv->sectors = inq_buff->data_byte[7];
2890                         drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2891                         drv->cylinders += inq_buff->data_byte[5];
2892                         drv->raid_level = inq_buff->data_byte[8];
2893                 }
2894                 drv->block_size = block_size;
2895                 drv->nr_blocks = total_size + 1;
2896                 t = drv->heads * drv->sectors;
2897                 if (t > 1) {
2898                         sector_t real_size = total_size + 1;
2899                         unsigned long rem = sector_div(real_size, t);
2900                         if (rem)
2901                                 real_size++;
2902                         drv->cylinders = real_size;
2903                 }
2904         } else {                /* Get geometry failed */
2905                 dev_warn(&h->pdev->dev, "reading geometry failed\n");
2906         }
2907 }
2908
2909 static void
2910 cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
2911                     unsigned int *block_size)
2912 {
2913         ReadCapdata_struct *buf;
2914         int return_code;
2915         unsigned char scsi3addr[8];
2916
2917         buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2918         if (!buf) {
2919                 dev_warn(&h->pdev->dev, "out of memory\n");
2920                 return;
2921         }
2922
2923         log_unit_to_scsi3addr(h, scsi3addr, logvol);
2924         return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
2925                 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
2926         if (return_code == IO_OK) {
2927                 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2928                 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2929         } else {                /* read capacity command failed */
2930                 dev_warn(&h->pdev->dev, "read capacity failed\n");
2931                 *total_size = 0;
2932                 *block_size = BLOCK_SIZE;
2933         }
2934         kfree(buf);
2935 }
2936
2937 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
2938         sector_t *total_size, unsigned int *block_size)
2939 {
2940         ReadCapdata_struct_16 *buf;
2941         int return_code;
2942         unsigned char scsi3addr[8];
2943
2944         buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2945         if (!buf) {
2946                 dev_warn(&h->pdev->dev, "out of memory\n");
2947                 return;
2948         }
2949
2950         log_unit_to_scsi3addr(h, scsi3addr, logvol);
2951         return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2952                 buf, sizeof(ReadCapdata_struct_16),
2953                         0, scsi3addr, TYPE_CMD);
2954         if (return_code == IO_OK) {
2955                 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2956                 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2957         } else {                /* read capacity command failed */
2958                 dev_warn(&h->pdev->dev, "read capacity failed\n");
2959                 *total_size = 0;
2960                 *block_size = BLOCK_SIZE;
2961         }
2962         dev_info(&h->pdev->dev, "      blocks= %llu block_size= %d\n",
2963                (unsigned long long)*total_size+1, *block_size);
2964         kfree(buf);
2965 }
2966
2967 static int cciss_revalidate(struct gendisk *disk)
2968 {
2969         ctlr_info_t *h = get_host(disk);
2970         drive_info_struct *drv = get_drv(disk);
2971         int logvol;
2972         int FOUND = 0;
2973         unsigned int block_size;
2974         sector_t total_size;
2975         InquiryData_struct *inq_buff = NULL;
2976
2977         for (logvol = 0; logvol <= h->highest_lun; logvol++) {
2978                 if (!h->drv[logvol])
2979                         continue;
2980                 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
2981                         sizeof(drv->LunID)) == 0) {
2982                         FOUND = 1;
2983                         break;
2984                 }
2985         }
2986
2987         if (!FOUND)
2988                 return 1;
2989
2990         inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2991         if (inq_buff == NULL) {
2992                 dev_warn(&h->pdev->dev, "out of memory\n");
2993                 return 1;
2994         }
2995         if (h->cciss_read == CCISS_READ_10) {
2996                 cciss_read_capacity(h, logvol,
2997                                         &total_size, &block_size);
2998         } else {
2999                 cciss_read_capacity_16(h, logvol,
3000                                         &total_size, &block_size);
3001         }
3002         cciss_geometry_inquiry(h, logvol, total_size, block_size,
3003                                inq_buff, drv);
3004
3005         blk_queue_logical_block_size(drv->queue, drv->block_size);
3006         set_capacity(disk, drv->nr_blocks);
3007
3008         kfree(inq_buff);
3009         return 0;
3010 }
3011
3012 /*
3013  * Map (physical) PCI mem into (virtual) kernel space
3014  */
3015 static void __iomem *remap_pci_mem(ulong base, ulong size)
3016 {
3017         ulong page_base = ((ulong) base) & PAGE_MASK;
3018         ulong page_offs = ((ulong) base) - page_base;
3019         void __iomem *page_remapped = ioremap(page_base, page_offs + size);
3020
3021         return page_remapped ? (page_remapped + page_offs) : NULL;
3022 }
3023
3024 /*
3025  * Takes jobs of the Q and sends them to the hardware, then puts it on
3026  * the Q to wait for completion.
3027  */
3028 static void start_io(ctlr_info_t *h)
3029 {
3030         CommandList_struct *c;
3031
3032         while (!list_empty(&h->reqQ)) {
3033                 c = list_entry(h->reqQ.next, CommandList_struct, list);
3034                 /* can't do anything if fifo is full */
3035                 if ((h->access.fifo_full(h))) {
3036                         dev_warn(&h->pdev->dev, "fifo full\n");
3037                         break;
3038                 }
3039
3040                 /* Get the first entry from the Request Q */
3041                 removeQ(c);
3042                 h->Qdepth--;
3043
3044                 /* Tell the controller execute command */
3045                 h->access.submit_command(h, c);
3046
3047                 /* Put job onto the completed Q */
3048                 addQ(&h->cmpQ, c);
3049         }
3050 }
3051
3052 /* Assumes that h->lock is held. */
3053 /* Zeros out the error record and then resends the command back */
3054 /* to the controller */
3055 static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
3056 {
3057         /* erase the old error information */
3058         memset(c->err_info, 0, sizeof(ErrorInfo_struct));
3059
3060         /* add it to software queue and then send it to the controller */
3061         addQ(&h->reqQ, c);
3062         h->Qdepth++;
3063         if (h->Qdepth > h->maxQsinceinit)
3064                 h->maxQsinceinit = h->Qdepth;
3065
3066         start_io(h);
3067 }
3068
3069 static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
3070         unsigned int msg_byte, unsigned int host_byte,
3071         unsigned int driver_byte)
3072 {
3073         /* inverse of macros in scsi.h */
3074         return (scsi_status_byte & 0xff) |
3075                 ((msg_byte & 0xff) << 8) |
3076                 ((host_byte & 0xff) << 16) |
3077                 ((driver_byte & 0xff) << 24);
3078 }
3079
3080 static inline int evaluate_target_status(ctlr_info_t *h,
3081                         CommandList_struct *cmd, int *retry_cmd)
3082 {
3083         unsigned char sense_key;
3084         unsigned char status_byte, msg_byte, host_byte, driver_byte;
3085         int error_value;
3086
3087         *retry_cmd = 0;
3088         /* If we get in here, it means we got "target status", that is, scsi status */
3089         status_byte = cmd->err_info->ScsiStatus;
3090         driver_byte = DRIVER_OK;
3091         msg_byte = cmd->err_info->CommandStatus; /* correct?  seems too device specific */
3092
3093         if (blk_rq_is_passthrough(cmd->rq))
3094                 host_byte = DID_PASSTHROUGH;
3095         else
3096                 host_byte = DID_OK;
3097
3098         error_value = make_status_bytes(status_byte, msg_byte,
3099                 host_byte, driver_byte);
3100
3101         if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
3102                 if (!blk_rq_is_passthrough(cmd->rq))
3103                         dev_warn(&h->pdev->dev, "cmd %p "
3104                                "has SCSI Status 0x%x\n",
3105                                cmd, cmd->err_info->ScsiStatus);
3106                 return error_value;
3107         }
3108
3109         /* check the sense key */
3110         sense_key = 0xf & cmd->err_info->SenseInfo[2];
3111         /* no status or recovered error */
3112         if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3113             !blk_rq_is_passthrough(cmd->rq))
3114                 error_value = 0;
3115
3116         if (check_for_unit_attention(h, cmd)) {
3117                 *retry_cmd = !blk_rq_is_passthrough(cmd->rq);
3118                 return 0;
3119         }
3120
3121         /* Not SG_IO or similar? */
3122         if (!blk_rq_is_passthrough(cmd->rq)) {
3123                 if (error_value != 0)
3124                         dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
3125                                " sense key = 0x%x\n", cmd, sense_key);
3126                 return error_value;
3127         }
3128
3129         scsi_req(cmd->rq)->sense_len = cmd->err_info->SenseLen;
3130         return error_value;
3131 }
3132
3133 /* checks the status of the job and calls complete buffers to mark all
3134  * buffers for the completed job. Note that this function does not need
3135  * to hold the hba/queue lock.
3136  */
3137 static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3138                                     int timeout)
3139 {
3140         int retry_cmd = 0;
3141         struct request *rq = cmd->rq;
3142         struct scsi_request *sreq = scsi_req(rq);
3143
3144         sreq->result = 0;
3145
3146         if (timeout)
3147                 sreq->result = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
3148
3149         if (cmd->err_info->CommandStatus == 0)  /* no error has occurred */
3150                 goto after_error_processing;
3151
3152         switch (cmd->err_info->CommandStatus) {
3153         case CMD_TARGET_STATUS:
3154                 sreq->result = evaluate_target_status(h, cmd, &retry_cmd);
3155                 break;
3156         case CMD_DATA_UNDERRUN:
3157                 if (!blk_rq_is_passthrough(cmd->rq)) {
3158                         dev_warn(&h->pdev->dev, "cmd %p has"
3159                                " completed with data underrun "
3160                                "reported\n", cmd);
3161                 }
3162                 break;
3163         case CMD_DATA_OVERRUN:
3164                 if (!blk_rq_is_passthrough(cmd->rq))
3165                         dev_warn(&h->pdev->dev, "cciss: cmd %p has"
3166                                " completed with data overrun "
3167                                "reported\n", cmd);
3168                 break;
3169         case CMD_INVALID:
3170                 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
3171                        "reported invalid\n", cmd);
3172                 sreq->result = make_status_bytes(SAM_STAT_GOOD,
3173                         cmd->err_info->CommandStatus, DRIVER_OK,
3174                         blk_rq_is_passthrough(cmd->rq) ?
3175                                 DID_PASSTHROUGH : DID_ERROR);
3176                 break;
3177         case CMD_PROTOCOL_ERR:
3178                 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3179                        "protocol error\n", cmd);
3180                 sreq->result = make_status_bytes(SAM_STAT_GOOD,
3181                         cmd->err_info->CommandStatus, DRIVER_OK,
3182                         blk_rq_is_passthrough(cmd->rq) ?
3183                                 DID_PASSTHROUGH : DID_ERROR);
3184                 break;
3185         case CMD_HARDWARE_ERR:
3186                 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3187                        " hardware error\n", cmd);
3188                 sreq->result = make_status_bytes(SAM_STAT_GOOD,
3189                         cmd->err_info->CommandStatus, DRIVER_OK,
3190                         blk_rq_is_passthrough(cmd->rq) ?
3191                                 DID_PASSTHROUGH : DID_ERROR);
3192                 break;
3193         case CMD_CONNECTION_LOST:
3194                 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3195                        "connection lost\n", cmd);
3196                 sreq->result = make_status_bytes(SAM_STAT_GOOD,
3197                         cmd->err_info->CommandStatus, DRIVER_OK,
3198                         blk_rq_is_passthrough(cmd->rq) ?
3199                                 DID_PASSTHROUGH : DID_ERROR);
3200                 break;
3201         case CMD_ABORTED:
3202                 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
3203                        "aborted\n", cmd);
3204                 sreq->result = make_status_bytes(SAM_STAT_GOOD,
3205                         cmd->err_info->CommandStatus, DRIVER_OK,
3206                         blk_rq_is_passthrough(cmd->rq) ?
3207                                 DID_PASSTHROUGH : DID_ABORT);
3208                 break;
3209         case CMD_ABORT_FAILED:
3210                 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
3211                        "abort failed\n", cmd);
3212                 sreq->result = make_status_bytes(SAM_STAT_GOOD,
3213                         cmd->err_info->CommandStatus, DRIVER_OK,
3214                         blk_rq_is_passthrough(cmd->rq) ?
3215                                 DID_PASSTHROUGH : DID_ERROR);
3216                 break;
3217         case CMD_UNSOLICITED_ABORT:
3218                 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
3219                        "abort %p\n", h->ctlr, cmd);
3220                 if (cmd->retry_count < MAX_CMD_RETRIES) {
3221                         retry_cmd = 1;
3222                         dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
3223                         cmd->retry_count++;
3224                 } else
3225                         dev_warn(&h->pdev->dev,
3226                                 "%p retried too many times\n", cmd);
3227                 sreq->result = make_status_bytes(SAM_STAT_GOOD,
3228                         cmd->err_info->CommandStatus, DRIVER_OK,
3229                         blk_rq_is_passthrough(cmd->rq) ?
3230                                 DID_PASSTHROUGH : DID_ABORT);
3231                 break;
3232         case CMD_TIMEOUT:
3233                 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
3234                 sreq->result = make_status_bytes(SAM_STAT_GOOD,
3235                         cmd->err_info->CommandStatus, DRIVER_OK,
3236                         blk_rq_is_passthrough(cmd->rq) ?
3237                                 DID_PASSTHROUGH : DID_ERROR);
3238                 break;
3239         case CMD_UNABORTABLE:
3240                 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3241                 sreq->result = make_status_bytes(SAM_STAT_GOOD,
3242                         cmd->err_info->CommandStatus, DRIVER_OK,
3243                         blk_rq_is_passthrough(cmd->rq) ?
3244                                 DID_PASSTHROUGH : DID_ERROR);
3245                 break;
3246         default:
3247                 dev_warn(&h->pdev->dev, "cmd %p returned "
3248                        "unknown status %x\n", cmd,
3249                        cmd->err_info->CommandStatus);
3250                 sreq->result = make_status_bytes(SAM_STAT_GOOD,
3251                         cmd->err_info->CommandStatus, DRIVER_OK,
3252                         blk_rq_is_passthrough(cmd->rq) ?
3253                                 DID_PASSTHROUGH : DID_ERROR);
3254         }
3255
3256 after_error_processing:
3257
3258         /* We need to return this command */
3259         if (retry_cmd) {
3260                 resend_cciss_cmd(h, cmd);
3261                 return;
3262         }
3263         cmd->rq->completion_data = cmd;
3264         blk_complete_request(cmd->rq);
3265 }
3266
3267 static inline u32 cciss_tag_contains_index(u32 tag)
3268 {
3269 #define DIRECT_LOOKUP_BIT 0x10
3270         return tag & DIRECT_LOOKUP_BIT;
3271 }
3272
3273 static inline u32 cciss_tag_to_index(u32 tag)
3274 {
3275 #define DIRECT_LOOKUP_SHIFT 5
3276         return tag >> DIRECT_LOOKUP_SHIFT;
3277 }
3278
3279 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
3280 {
3281 #define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3282 #define CCISS_SIMPLE_ERROR_BITS 0x03
3283         if (likely(h->transMethod & CFGTBL_Trans_Performant))
3284                 return tag & ~CCISS_PERF_ERROR_BITS;
3285         return tag & ~CCISS_SIMPLE_ERROR_BITS;
3286 }
3287
3288 static inline void cciss_mark_tag_indexed(u32 *tag)
3289 {
3290         *tag |= DIRECT_LOOKUP_BIT;
3291 }
3292
3293 static inline void cciss_set_tag_index(u32 *tag, u32 index)
3294 {
3295         *tag |= (index << DIRECT_LOOKUP_SHIFT);
3296 }
3297
3298 /*
3299  * Get a request and submit it to the controller.
3300  */
3301 static void do_cciss_request(struct request_queue *q)
3302 {
3303         ctlr_info_t *h = q->queuedata;
3304         CommandList_struct *c;
3305         sector_t start_blk;
3306         int seg;
3307         struct request *creq;
3308         u64bit temp64;
3309         struct scatterlist *tmp_sg;
3310         SGDescriptor_struct *curr_sg;
3311         drive_info_struct *drv;
3312         int i, dir;
3313         int sg_index = 0;
3314         int chained = 0;
3315
3316       queue:
3317         creq = blk_peek_request(q);
3318         if (!creq)
3319                 goto startio;
3320
3321         BUG_ON(creq->nr_phys_segments > h->maxsgentries);
3322
3323         c = cmd_alloc(h);
3324         if (!c)
3325                 goto full;
3326
3327         blk_start_request(creq);
3328
3329         tmp_sg = h->scatter_list[c->cmdindex];
3330         spin_unlock_irq(q->queue_lock);
3331
3332         c->cmd_type = CMD_RWREQ;
3333         c->rq = creq;
3334
3335         /* fill in the request */
3336         drv = creq->rq_disk->private_data;
3337         c->Header.ReplyQueue = 0;       /* unused in simple mode */
3338         /* got command from pool, so use the command block index instead */
3339         /* for direct lookups. */
3340         /* The first 2 bits are reserved for controller error reporting. */
3341         cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3342         cciss_mark_tag_indexed(&c->Header.Tag.lower);
3343         memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
3344         c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3345         c->Request.Type.Type = TYPE_CMD;        /* It is a command. */
3346         c->Request.Type.Attribute = ATTR_SIMPLE;
3347         c->Request.Type.Direction =
3348             (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
3349         c->Request.Timeout = 0; /* Don't time out */
3350         c->Request.CDB[0] =
3351             (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
3352         start_blk = blk_rq_pos(creq);
3353         dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
3354                (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
3355         sg_init_table(tmp_sg, h->maxsgentries);
3356         seg = blk_rq_map_sg(q, creq, tmp_sg);
3357
3358         /* get the DMA records for the setup */
3359         if (c->Request.Type.Direction == XFER_READ)
3360                 dir = PCI_DMA_FROMDEVICE;
3361         else
3362                 dir = PCI_DMA_TODEVICE;
3363
3364         curr_sg = c->SG;
3365         sg_index = 0;
3366         chained = 0;
3367
3368         for (i = 0; i < seg; i++) {
3369                 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3370                         !chained && ((seg - i) > 1)) {
3371                         /* Point to next chain block. */
3372                         curr_sg = h->cmd_sg_list[c->cmdindex];
3373                         sg_index = 0;
3374                         chained = 1;
3375                 }
3376                 curr_sg[sg_index].Len = tmp_sg[i].length;
3377                 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
3378                                                 tmp_sg[i].offset,
3379                                                 tmp_sg[i].length, dir);
3380                 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3381                         dev_warn(&h->pdev->dev,
3382                                 "%s: error mapping page for DMA\n", __func__);
3383                         scsi_req(creq)->result =
3384                                 make_status_bytes(SAM_STAT_GOOD, 0, DRIVER_OK,
3385                                                   DID_SOFT_ERROR);
3386                         cmd_free(h, c);
3387                         return;
3388                 }
3389                 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3390                 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3391                 curr_sg[sg_index].Ext = 0;  /* we are not chaining */
3392                 ++sg_index;
3393         }
3394         if (chained) {
3395                 if (cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3396                         (seg - (h->max_cmd_sgentries - 1)) *
3397                                 sizeof(SGDescriptor_struct))) {
3398                         scsi_req(creq)->result =
3399                                 make_status_bytes(SAM_STAT_GOOD, 0, DRIVER_OK,
3400                                                   DID_SOFT_ERROR);
3401                         cmd_free(h, c);
3402                         return;
3403                 }
3404         }
3405
3406         /* track how many SG entries we are using */
3407         if (seg > h->maxSG)
3408                 h->maxSG = seg;
3409
3410         dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
3411                         "chained[%d]\n",
3412                         blk_rq_sectors(creq), seg, chained);
3413
3414         c->Header.SGTotal = seg + chained;
3415         if (seg <= h->max_cmd_sgentries)
3416                 c->Header.SGList = c->Header.SGTotal;
3417         else
3418                 c->Header.SGList = h->max_cmd_sgentries;
3419         set_performant_mode(h, c);
3420
3421         switch (req_op(creq)) {
3422         case REQ_OP_READ:
3423         case REQ_OP_WRITE:
3424                 if(h->cciss_read == CCISS_READ_10) {
3425                         c->Request.CDB[1] = 0;
3426                         c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
3427                         c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3428                         c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3429                         c->Request.CDB[5] = start_blk & 0xff;
3430                         c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
3431                         c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3432                         c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
3433                         c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3434                 } else {
3435                         u32 upper32 = upper_32_bits(start_blk);
3436
3437                         c->Request.CDBLen = 16;
3438                         c->Request.CDB[1]= 0;
3439                         c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
3440                         c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3441                         c->Request.CDB[4]= (upper32 >>  8) & 0xff;
3442                         c->Request.CDB[5]= upper32 & 0xff;
3443                         c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3444                         c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3445                         c->Request.CDB[8]= (start_blk >>  8) & 0xff;
3446                         c->Request.CDB[9]= start_blk & 0xff;
3447                         c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3448                         c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3449                         c->Request.CDB[12]= (blk_rq_sectors(creq) >>  8) & 0xff;
3450                         c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
3451                         c->Request.CDB[14] = c->Request.CDB[15] = 0;
3452                 }
3453                 break;
3454         case REQ_OP_SCSI_IN:
3455         case REQ_OP_SCSI_OUT:
3456                 c->Request.CDBLen = scsi_req(creq)->cmd_len;
3457                 memcpy(c->Request.CDB, scsi_req(creq)->cmd, BLK_MAX_CDB);
3458                 scsi_req(creq)->sense = c->err_info->SenseInfo;
3459                 break;
3460         default:
3461                 dev_warn(&h->pdev->dev, "bad request type %d\n",
3462                         creq->cmd_flags);
3463                 BUG();
3464         }
3465
3466         spin_lock_irq(q->queue_lock);
3467
3468         addQ(&h->reqQ, c);
3469         h->Qdepth++;
3470         if (h->Qdepth > h->maxQsinceinit)
3471                 h->maxQsinceinit = h->Qdepth;
3472
3473         goto queue;
3474 full:
3475         blk_stop_queue(q);
3476 startio:
3477         /* We will already have the driver lock here so not need
3478          * to lock it.
3479          */
3480         start_io(h);
3481 }
3482
3483 static inline unsigned long get_next_completion(ctlr_info_t *h)
3484 {
3485         return h->access.command_completed(h);
3486 }
3487
3488 static inline int interrupt_pending(ctlr_info_t *h)
3489 {
3490         return h->access.intr_pending(h);
3491 }
3492
3493 static inline long interrupt_not_for_us(ctlr_info_t *h)
3494 {
3495         return ((h->access.intr_pending(h) == 0) ||
3496                 (h->interrupts_enabled == 0));
3497 }
3498
3499 static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3500                         u32 raw_tag)
3501 {
3502         if (unlikely(tag_index >= h->nr_cmds)) {
3503                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3504                 return 1;
3505         }
3506         return 0;
3507 }
3508
3509 static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3510                                 u32 raw_tag)
3511 {
3512         removeQ(c);
3513         if (likely(c->cmd_type == CMD_RWREQ))
3514                 complete_command(h, c, 0);
3515         else if (c->cmd_type == CMD_IOCTL_PEND)
3516                 complete(c->waiting);
3517 #ifdef CONFIG_CISS_SCSI_TAPE
3518         else if (c->cmd_type == CMD_SCSI)
3519                 complete_scsi_command(c, 0, raw_tag);
3520 #endif
3521 }
3522
3523 static inline u32 next_command(ctlr_info_t *h)
3524 {
3525         u32 a;
3526
3527         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3528                 return h->access.command_completed(h);
3529
3530         if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3531                 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3532                 (h->reply_pool_head)++;
3533                 h->commands_outstanding--;
3534         } else {
3535                 a = FIFO_EMPTY;
3536         }
3537         /* Check for wraparound */
3538         if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3539                 h->reply_pool_head = h->reply_pool;
3540                 h->reply_pool_wraparound ^= 1;
3541         }
3542         return a;
3543 }
3544
3545 /* process completion of an indexed ("direct lookup") command */
3546 static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3547 {
3548         u32 tag_index;
3549         CommandList_struct *c;
3550
3551         tag_index = cciss_tag_to_index(raw_tag);
3552         if (bad_tag(h, tag_index, raw_tag))
3553                 return next_command(h);
3554         c = h->cmd_pool + tag_index;
3555         finish_cmd(h, c, raw_tag);
3556         return next_command(h);
3557 }
3558
3559 /* process completion of a non-indexed command */
3560 static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3561 {
3562         CommandList_struct *c = NULL;
3563         __u32 busaddr_masked, tag_masked;
3564
3565         tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
3566         list_for_each_entry(c, &h->cmpQ, list) {
3567                 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
3568                 if (busaddr_masked == tag_masked) {
3569                         finish_cmd(h, c, raw_tag);
3570                         return next_command(h);
3571                 }
3572         }
3573         bad_tag(h, h->nr_cmds + 1, raw_tag);
3574         return next_command(h);
3575 }
3576
3577 /* Some controllers, like p400, will give us one interrupt
3578  * after a soft reset, even if we turned interrupts off.
3579  * Only need to check for this in the cciss_xxx_discard_completions
3580  * functions.
3581  */
3582 static int ignore_bogus_interrupt(ctlr_info_t *h)
3583 {
3584         if (likely(!reset_devices))
3585                 return 0;
3586
3587         if (likely(h->interrupts_enabled))
3588                 return 0;
3589
3590         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3591                 "(known firmware bug.)  Ignoring.\n");
3592
3593         return 1;
3594 }
3595
3596 static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id)
3597 {
3598         ctlr_info_t *h = dev_id;
3599         unsigned long flags;
3600         u32 raw_tag;
3601
3602         if (ignore_bogus_interrupt(h))
3603                 return IRQ_NONE;
3604
3605         if (interrupt_not_for_us(h))
3606                 return IRQ_NONE;
3607         spin_lock_irqsave(&h->lock, flags);
3608         while (interrupt_pending(h)) {
3609                 raw_tag = get_next_completion(h);
3610                 while (raw_tag != FIFO_EMPTY)
3611                         raw_tag = next_command(h);
3612         }
3613         spin_unlock_irqrestore(&h->lock, flags);
3614         return IRQ_HANDLED;
3615 }
3616
3617 static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id)
3618 {
3619         ctlr_info_t *h = dev_id;
3620         unsigned long flags;
3621         u32 raw_tag;
3622
3623         if (ignore_bogus_interrupt(h))
3624                 return IRQ_NONE;
3625
3626         spin_lock_irqsave(&h->lock, flags);
3627         raw_tag = get_next_completion(h);
3628         while (raw_tag != FIFO_EMPTY)
3629                 raw_tag = next_command(h);
3630         spin_unlock_irqrestore(&h->lock, flags);
3631         return IRQ_HANDLED;
3632 }
3633
3634 static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3635 {
3636         ctlr_info_t *h = dev_id;
3637         unsigned long flags;
3638         u32 raw_tag;
3639
3640         if (interrupt_not_for_us(h))
3641                 return IRQ_NONE;
3642         spin_lock_irqsave(&h->lock, flags);
3643         while (interrupt_pending(h)) {
3644                 raw_tag = get_next_completion(h);
3645                 while (raw_tag != FIFO_EMPTY) {
3646                         if (cciss_tag_contains_index(raw_tag))
3647                                 raw_tag = process_indexed_cmd(h, raw_tag);
3648                         else
3649                                 raw_tag = process_nonindexed_cmd(h, raw_tag);
3650                 }
3651         }
3652         spin_unlock_irqrestore(&h->lock, flags);
3653         return IRQ_HANDLED;
3654 }
3655
3656 /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3657  * check the interrupt pending register because it is not set.
3658  */
3659 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3660 {
3661         ctlr_info_t *h = dev_id;
3662         unsigned long flags;
3663         u32 raw_tag;
3664
3665         spin_lock_irqsave(&h->lock, flags);
3666         raw_tag = get_next_completion(h);
3667         while (raw_tag != FIFO_EMPTY) {
3668                 if (cciss_tag_contains_index(raw_tag))
3669                         raw_tag = process_indexed_cmd(h, raw_tag);
3670                 else
3671                         raw_tag = process_nonindexed_cmd(h, raw_tag);
3672         }
3673         spin_unlock_irqrestore(&h->lock, flags);
3674         return IRQ_HANDLED;
3675 }
3676
3677 /**
3678  * add_to_scan_list() - add controller to rescan queue
3679  * @h:                Pointer to the controller.
3680  *
3681  * Adds the controller to the rescan queue if not already on the queue.
3682  *
3683  * returns 1 if added to the queue, 0 if skipped (could be on the
3684  * queue already, or the controller could be initializing or shutting
3685  * down).
3686  **/
3687 static int add_to_scan_list(struct ctlr_info *h)
3688 {
3689         struct ctlr_info *test_h;
3690         int found = 0;
3691         int ret = 0;
3692
3693         if (h->busy_initializing)
3694                 return 0;
3695
3696         if (!mutex_trylock(&h->busy_shutting_down))
3697                 return 0;
3698
3699         mutex_lock(&scan_mutex);
3700         list_for_each_entry(test_h, &scan_q, scan_list) {
3701                 if (test_h == h) {
3702                         found = 1;
3703                         break;
3704                 }
3705         }
3706         if (!found && !h->busy_scanning) {
3707                 reinit_completion(&h->scan_wait);
3708                 list_add_tail(&h->scan_list, &scan_q);
3709                 ret = 1;
3710         }
3711         mutex_unlock(&scan_mutex);
3712         mutex_unlock(&h->busy_shutting_down);
3713
3714         return ret;
3715 }
3716
3717 /**
3718  * remove_from_scan_list() - remove controller from rescan queue
3719  * @h:                     Pointer to the controller.
3720  *
3721  * Removes the controller from the rescan queue if present. Blocks if
3722  * the controller is currently conducting a rescan.  The controller
3723  * can be in one of three states:
3724  * 1. Doesn't need a scan
3725  * 2. On the scan list, but not scanning yet (we remove it)
3726  * 3. Busy scanning (and not on the list). In this case we want to wait for
3727  *    the scan to complete to make sure the scanning thread for this
3728  *    controller is completely idle.
3729  **/
3730 static void remove_from_scan_list(struct ctlr_info *h)
3731 {
3732         struct ctlr_info *test_h, *tmp_h;
3733
3734         mutex_lock(&scan_mutex);
3735         list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
3736                 if (test_h == h) { /* state 2. */
3737                         list_del(&h->scan_list);
3738                         complete_all(&h->scan_wait);
3739                         mutex_unlock(&scan_mutex);
3740                         return;
3741                 }
3742         }
3743         if (h->busy_scanning) { /* state 3. */
3744                 mutex_unlock(&scan_mutex);
3745                 wait_for_completion(&h->scan_wait);
3746         } else { /* state 1, nothing to do. */
3747                 mutex_unlock(&scan_mutex);
3748         }
3749 }
3750
3751 /**
3752  * scan_thread() - kernel thread used to rescan controllers
3753  * @data:        Ignored.
3754  *
3755  * A kernel thread used scan for drive topology changes on
3756  * controllers. The thread processes only one controller at a time
3757  * using a queue.  Controllers are added to the queue using
3758  * add_to_scan_list() and removed from the queue either after done
3759  * processing or using remove_from_scan_list().
3760  *
3761  * returns 0.
3762  **/
3763 static int scan_thread(void *data)
3764 {
3765         struct ctlr_info *h;
3766
3767         while (1) {
3768                 set_current_state(TASK_INTERRUPTIBLE);
3769                 schedule();
3770                 if (kthread_should_stop())
3771                         break;
3772
3773                 while (1) {
3774                         mutex_lock(&scan_mutex);
3775                         if (list_empty(&scan_q)) {
3776                                 mutex_unlock(&scan_mutex);
3777                                 break;
3778                         }
3779
3780                         h = list_entry(scan_q.next,
3781                                        struct ctlr_info,
3782                                        scan_list);
3783                         list_del(&h->scan_list);
3784                         h->busy_scanning = 1;
3785                         mutex_unlock(&scan_mutex);
3786
3787                         rebuild_lun_table(h, 0, 0);
3788                         complete_all(&h->scan_wait);
3789                         mutex_lock(&scan_mutex);
3790                         h->busy_scanning = 0;
3791                         mutex_unlock(&scan_mutex);
3792                 }
3793         }
3794
3795         return 0;
3796 }
3797
3798 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3799 {
3800         if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3801                 return 0;
3802
3803         switch (c->err_info->SenseInfo[12]) {
3804         case STATE_CHANGED:
3805                 dev_warn(&h->pdev->dev, "a state change "
3806                         "detected, command retried\n");
3807                 return 1;
3808         break;
3809         case LUN_FAILED:
3810                 dev_warn(&h->pdev->dev, "LUN failure "
3811                         "detected, action required\n");
3812                 return 1;
3813         break;
3814         case REPORT_LUNS_CHANGED:
3815                 dev_warn(&h->pdev->dev, "report LUN data changed\n");
3816         /*
3817          * Here, we could call add_to_scan_list and wake up the scan thread,
3818          * except that it's quite likely that we will get more than one
3819          * REPORT_LUNS_CHANGED condition in quick succession, which means
3820          * that those which occur after the first one will likely happen
3821          * *during* the scan_thread's rescan.  And the rescan code is not
3822          * robust enough to restart in the middle, undoing what it has already
3823          * done, and it's not clear that it's even possible to do this, since
3824          * part of what it does is notify the block layer, which starts
3825          * doing it's own i/o to read partition tables and so on, and the
3826          * driver doesn't have visibility to know what might need undoing.
3827          * In any event, if possible, it is horribly complicated to get right
3828          * so we just don't do it for now.
3829          *
3830          * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3831          */
3832                 return 1;
3833         break;
3834         case POWER_OR_RESET:
3835                 dev_warn(&h->pdev->dev,
3836                         "a power on or device reset detected\n");
3837                 return 1;
3838         break;
3839         case UNIT_ATTENTION_CLEARED:
3840                 dev_warn(&h->pdev->dev,
3841                         "unit attention cleared by another initiator\n");
3842                 return 1;
3843         break;
3844         default:
3845                 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3846                 return 1;
3847         }
3848 }
3849
3850 /*
3851  *  We cannot read the structure directly, for portability we must use
3852  *   the io functions.
3853  *   This is for debug only.
3854  */
3855 static void print_cfg_table(ctlr_info_t *h)
3856 {
3857         int i;
3858         char temp_name[17];
3859         CfgTable_struct *tb = h->cfgtable;
3860
3861         dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3862         dev_dbg(&h->pdev->dev, "------------------------------------\n");
3863         for (i = 0; i < 4; i++)
3864                 temp_name[i] = readb(&(tb->Signature[i]));
3865         temp_name[4] = '\0';
3866         dev_dbg(&h->pdev->dev, "   Signature = %s\n", temp_name);
3867         dev_dbg(&h->pdev->dev, "   Spec Number = %d\n",
3868                 readl(&(tb->SpecValence)));
3869         dev_dbg(&h->pdev->dev, "   Transport methods supported = 0x%x\n",
3870                readl(&(tb->TransportSupport)));
3871         dev_dbg(&h->pdev->dev, "   Transport methods active = 0x%x\n",
3872                readl(&(tb->TransportActive)));
3873         dev_dbg(&h->pdev->dev, "   Requested transport Method = 0x%x\n",
3874                readl(&(tb->HostWrite.TransportRequest)));
3875         dev_dbg(&h->pdev->dev, "   Coalesce Interrupt Delay = 0x%x\n",
3876                readl(&(tb->HostWrite.CoalIntDelay)));
3877         dev_dbg(&h->pdev->dev, "   Coalesce Interrupt Count = 0x%x\n",
3878                readl(&(tb->HostWrite.CoalIntCount)));
3879         dev_dbg(&h->pdev->dev, "   Max outstanding commands = 0x%x\n",
3880                readl(&(tb->CmdsOutMax)));
3881         dev_dbg(&h->pdev->dev, "   Bus Types = 0x%x\n",
3882                 readl(&(tb->BusTypes)));
3883         for (i = 0; i < 16; i++)
3884                 temp_name[i] = readb(&(tb->ServerName[i]));
3885         temp_name[16] = '\0';
3886         dev_dbg(&h->pdev->dev, "   Server Name = %s\n", temp_name);
3887         dev_dbg(&h->pdev->dev, "   Heartbeat Counter = 0x%x\n\n\n",
3888                 readl(&(tb->HeartBeat)));
3889 }
3890
3891 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3892 {
3893         int i, offset, mem_type, bar_type;
3894         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3895                 return 0;
3896         offset = 0;
3897         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3898                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3899                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3900                         offset += 4;
3901                 else {
3902                         mem_type = pci_resource_flags(pdev, i) &
3903                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3904                         switch (mem_type) {
3905                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
3906                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3907                                 offset += 4;    /* 32 bit */
3908                                 break;
3909                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
3910                                 offset += 8;
3911                                 break;
3912                         default:        /* reserved in PCI 2.2 */
3913                                 dev_warn(&pdev->dev,
3914                                        "Base address is invalid\n");
3915                                 return -1;
3916                                 break;
3917                         }
3918                 }
3919                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3920                         return i + 1;
3921         }
3922         return -1;
3923 }
3924
3925 /* Fill in bucket_map[], given nsgs (the max number of
3926  * scatter gather elements supported) and bucket[],
3927  * which is an array of 8 integers.  The bucket[] array
3928  * contains 8 different DMA transfer sizes (in 16
3929  * byte increments) which the controller uses to fetch
3930  * commands.  This function fills in bucket_map[], which
3931  * maps a given number of scatter gather elements to one of
3932  * the 8 DMA transfer sizes.  The point of it is to allow the
3933  * controller to only do as much DMA as needed to fetch the
3934  * command, with the DMA transfer size encoded in the lower
3935  * bits of the command address.
3936  */
3937 static void  calc_bucket_map(int bucket[], int num_buckets,
3938         int nsgs, int *bucket_map)
3939 {
3940         int i, j, b, size;
3941
3942         /* even a command with 0 SGs requires 4 blocks */
3943 #define MINIMUM_TRANSFER_BLOCKS 4
3944 #define NUM_BUCKETS 8
3945         /* Note, bucket_map must have nsgs+1 entries. */
3946         for (i = 0; i <= nsgs; i++) {
3947                 /* Compute size of a command with i SG entries */
3948                 size = i + MINIMUM_TRANSFER_BLOCKS;
3949                 b = num_buckets; /* Assume the biggest bucket */
3950                 /* Find the bucket that is just big enough */
3951                 for (j = 0; j < 8; j++) {
3952                         if (bucket[j] >= size) {
3953                                 b = j;
3954                                 break;
3955                         }
3956                 }
3957                 /* for a command with i SG entries, use bucket b. */
3958                 bucket_map[i] = b;
3959         }
3960 }
3961
3962 static void cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3963 {
3964         int i;
3965
3966         /* under certain very rare conditions, this can take awhile.
3967          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3968          * as we enter this code.) */
3969         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3970                 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3971                         break;
3972                 usleep_range(10000, 20000);
3973         }
3974 }
3975
3976 static void cciss_enter_performant_mode(ctlr_info_t *h, u32 use_short_tags)
3977 {
3978         /* This is a bit complicated.  There are 8 registers on
3979          * the controller which we write to to tell it 8 different
3980          * sizes of commands which there may be.  It's a way of
3981          * reducing the DMA done to fetch each command.  Encoded into
3982          * each command's tag are 3 bits which communicate to the controller
3983          * which of the eight sizes that command fits within.  The size of
3984          * each command depends on how many scatter gather entries there are.
3985          * Each SG entry requires 16 bytes.  The eight registers are programmed
3986          * with the number of 16-byte blocks a command of that size requires.
3987          * The smallest command possible requires 5 such 16 byte blocks.
3988          * the largest command possible requires MAXSGENTRIES + 4 16-byte
3989          * blocks.  Note, this only extends to the SG entries contained
3990          * within the command block, and does not extend to chained blocks
3991          * of SG elements.   bft[] contains the eight values we write to
3992          * the registers.  They are not evenly distributed, but have more
3993          * sizes for small commands, and fewer sizes for larger commands.
3994          */
3995         __u32 trans_offset;
3996         int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
3997                         /*
3998                          *  5 = 1 s/g entry or 4k
3999                          *  6 = 2 s/g entry or 8k
4000                          *  8 = 4 s/g entry or 16k
4001                          * 10 = 6 s/g entry or 24k
4002                          */
4003         unsigned long register_value;
4004         BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
4005
4006         h->reply_pool_wraparound = 1; /* spec: init to 1 */
4007
4008         /* Controller spec: zero out this buffer. */
4009         memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
4010         h->reply_pool_head = h->reply_pool;
4011
4012         trans_offset = readl(&(h->cfgtable->TransMethodOffset));
4013         calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
4014                                 h->blockFetchTable);
4015         writel(bft[0], &h->transtable->BlockFetch0);
4016         writel(bft[1], &h->transtable->BlockFetch1);
4017         writel(bft[2], &h->transtable->BlockFetch2);
4018         writel(bft[3], &h->transtable->BlockFetch3);
4019         writel(bft[4], &h->transtable->BlockFetch4);
4020         writel(bft[5], &h->transtable->BlockFetch5);
4021         writel(bft[6], &h->transtable->BlockFetch6);
4022         writel(bft[7], &h->transtable->BlockFetch7);
4023
4024         /* size of controller ring buffer */
4025         writel(h->max_commands, &h->transtable->RepQSize);
4026         writel(1, &h->transtable->RepQCount);
4027         writel(0, &h->transtable->RepQCtrAddrLow32);
4028         writel(0, &h->transtable->RepQCtrAddrHigh32);
4029         writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4030         writel(0, &h->transtable->RepQAddr0High32);
4031         writel(CFGTBL_Trans_Performant | use_short_tags,
4032                         &(h->cfgtable->HostWrite.TransportRequest));
4033
4034         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4035         cciss_wait_for_mode_change_ack(h);
4036         register_value = readl(&(h->cfgtable->TransportActive));
4037         if (!(register_value & CFGTBL_Trans_Performant))
4038                 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
4039                                         " performant mode\n");
4040 }
4041
4042 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h)
4043 {
4044         __u32 trans_support;
4045
4046         if (cciss_simple_mode)
4047                 return;
4048
4049         dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
4050         /* Attempt to put controller into performant mode if supported */
4051         /* Does board support performant mode? */
4052         trans_support = readl(&(h->cfgtable->TransportSupport));
4053         if (!(trans_support & PERFORMANT_MODE))
4054                 return;
4055
4056         dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
4057         /* Performant mode demands commands on a 32 byte boundary
4058          * pci_alloc_consistent aligns on page boundarys already.
4059          * Just need to check if divisible by 32
4060          */
4061         if ((sizeof(CommandList_struct) % 32) != 0) {
4062                 dev_warn(&h->pdev->dev, "%s %d %s\n",
4063                         "cciss info: command size[",
4064                         (int)sizeof(CommandList_struct),
4065                         "] not divisible by 32, no performant mode..\n");
4066                 return;
4067         }
4068
4069         /* Performant mode ring buffer and supporting data structures */
4070         h->reply_pool = (__u64 *)pci_alloc_consistent(
4071                 h->pdev, h->max_commands * sizeof(__u64),
4072                 &(h->reply_pool_dhandle));
4073
4074         /* Need a block fetch table for performant mode */
4075         h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
4076                 sizeof(__u32)), GFP_KERNEL);
4077
4078         if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
4079                 goto clean_up;
4080
4081         cciss_enter_performant_mode(h,
4082                 trans_support & CFGTBL_Trans_use_short_tags);
4083
4084         /* Change the access methods to the performant access methods */
4085         h->access = SA5_performant_access;
4086         h->transMethod = CFGTBL_Trans_Performant;
4087
4088         return;
4089 clean_up:
4090         kfree(h->blockFetchTable);
4091         if (h->reply_pool)
4092                 pci_free_consistent(h->pdev,
4093                                 h->max_commands * sizeof(__u64),
4094                                 h->reply_pool,
4095                                 h->reply_pool_dhandle);
4096         return;
4097
4098 } /* cciss_put_controller_into_performant_mode */
4099
4100 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
4101  * controllers that are capable. If not, we use IO-APIC mode.
4102  */
4103
4104 static void cciss_interrupt_mode(ctlr_info_t *h)
4105 {
4106         int ret;
4107
4108         /* Some boards advertise MSI but don't really support it */
4109         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4110             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
4111                 goto default_int_mode;
4112
4113         ret = pci_alloc_irq_vectors(h->pdev, 4, 4, PCI_IRQ_MSIX);
4114         if (ret >= 0)   {
4115                 h->intr[0] = pci_irq_vector(h->pdev, 0);
4116                 h->intr[1] = pci_irq_vector(h->pdev, 1);
4117                 h->intr[2] = pci_irq_vector(h->pdev, 2);
4118                 h->intr[3] = pci_irq_vector(h->pdev, 3);
4119                 return;
4120         }
4121
4122         ret = pci_alloc_irq_vectors(h->pdev, 1, 1, PCI_IRQ_MSI);
4123
4124 default_int_mode:
4125         /* if we get here we're going to use the default interrupt mode */
4126         h->intr[h->intr_mode] = pci_irq_vector(h->pdev, 0);
4127         return;
4128 }
4129
4130 static int cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
4131 {
4132         int i;
4133         u32 subsystem_vendor_id, subsystem_device_id;
4134
4135         subsystem_vendor_id = pdev->subsystem_vendor;
4136         subsystem_device_id = pdev->subsystem_device;
4137         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4138                         subsystem_vendor_id;
4139
4140         for (i = 0; i < ARRAY_SIZE(products); i++) {
4141                 /* Stand aside for hpsa driver on request */
4142                 if (cciss_allow_hpsa)
4143                         return -ENODEV;
4144                 if (*board_id == products[i].board_id)
4145                         return i;
4146         }
4147         dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4148                 *board_id);
4149         return -ENODEV;
4150 }
4151
4152 static inline bool cciss_board_disabled(ctlr_info_t *h)
4153 {
4154         u16 command;
4155
4156         (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4157         return ((command & PCI_COMMAND_MEMORY) == 0);
4158 }
4159
4160 static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4161                                      unsigned long *memory_bar)
4162 {
4163         int i;
4164
4165         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4166                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4167                         /* addressing mode bits already removed */
4168                         *memory_bar = pci_resource_start(pdev, i);
4169                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4170                                 *memory_bar);
4171                         return 0;
4172                 }
4173         dev_warn(&pdev->dev, "no memory BAR found\n");
4174         return -ENODEV;
4175 }
4176
4177 static int cciss_wait_for_board_state(struct pci_dev *pdev,
4178                                       void __iomem *vaddr, int wait_for_ready)
4179 #define BOARD_READY 1
4180 #define BOARD_NOT_READY 0
4181 {
4182         int i, iterations;
4183         u32 scratchpad;
4184
4185         if (wait_for_ready)
4186                 iterations = CCISS_BOARD_READY_ITERATIONS;
4187         else
4188                 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4189
4190         for (i = 0; i < iterations; i++) {
4191                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4192                 if (wait_for_ready) {
4193                         if (scratchpad == CCISS_FIRMWARE_READY)
4194                                 return 0;
4195                 } else {
4196                         if (scratchpad != CCISS_FIRMWARE_READY)
4197                                 return 0;
4198                 }
4199                 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
4200         }
4201         dev_warn(&pdev->dev, "board not ready, timed out.\n");
4202         return -ENODEV;
4203 }
4204
4205 static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4206                                 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4207                                 u64 *cfg_offset)
4208 {
4209         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4210         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4211         *cfg_base_addr &= (u32) 0x0000ffff;
4212         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4213         if (*cfg_base_addr_index == -1) {
4214                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4215                         "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4216                 return -ENODEV;
4217         }
4218         return 0;
4219 }
4220
4221 static int cciss_find_cfgtables(ctlr_info_t *h)
4222 {
4223         u64 cfg_offset;
4224         u32 cfg_base_addr;
4225         u64 cfg_base_addr_index;
4226         u32 trans_offset;
4227         int rc;
4228
4229         rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4230                 &cfg_base_addr_index, &cfg_offset);
4231         if (rc)
4232                 return rc;
4233         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4234                 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
4235         if (!h->cfgtable)
4236                 return -ENOMEM;
4237         rc = write_driver_ver_to_cfgtable(h->cfgtable);
4238         if (rc)
4239                 return rc;
4240         /* Find performant mode table. */
4241         trans_offset = readl(&h->cfgtable->TransMethodOffset);
4242         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4243                                 cfg_base_addr_index)+cfg_offset+trans_offset,
4244                                 sizeof(*h->transtable));
4245         if (!h->transtable)
4246                 return -ENOMEM;
4247         return 0;
4248 }
4249
4250 static void cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4251 {
4252         h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4253
4254         /* Limit commands in memory limited kdump scenario. */
4255         if (reset_devices && h->max_commands > 32)
4256                 h->max_commands = 32;
4257
4258         if (h->max_commands < 16) {
4259                 dev_warn(&h->pdev->dev, "Controller reports "
4260                         "max supported commands of %d, an obvious lie. "
4261                         "Using 16.  Ensure that firmware is up to date.\n",
4262                         h->max_commands);
4263                 h->max_commands = 16;
4264         }
4265 }
4266
4267 /* Interrogate the hardware for some limits:
4268  * max commands, max SG elements without chaining, and with chaining,
4269  * SG chain block size, etc.
4270  */
4271 static void cciss_find_board_params(ctlr_info_t *h)
4272 {
4273         cciss_get_max_perf_mode_cmds(h);
4274         h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds;
4275         h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
4276         /*
4277          * The P600 may exhibit poor performnace under some workloads
4278          * if we use the value in the configuration table. Limit this
4279          * controller to MAXSGENTRIES (32) instead.
4280          */
4281         if (h->board_id == 0x3225103C)
4282                 h->maxsgentries = MAXSGENTRIES;
4283         /*
4284          * Limit in-command s/g elements to 32 save dma'able memory.
4285          * Howvever spec says if 0, use 31
4286          */
4287         h->max_cmd_sgentries = 31;
4288         if (h->maxsgentries > 512) {
4289                 h->max_cmd_sgentries = 32;
4290                 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4291                 h->maxsgentries--; /* save one for chain pointer */
4292         } else {
4293                 h->maxsgentries = 31; /* default to traditional values */
4294                 h->chainsize = 0;
4295         }
4296 }
4297
4298 static inline bool CISS_signature_present(ctlr_info_t *h)
4299 {
4300         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
4301                 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4302                 return false;
4303         }
4304         return true;
4305 }
4306
4307 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4308 static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4309 {
4310 #ifdef CONFIG_X86
4311         u32 prefetch;
4312
4313         prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4314         prefetch |= 0x100;
4315         writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4316 #endif
4317 }
4318
4319 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
4320  * in a prefetch beyond physical memory.
4321  */
4322 static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4323 {
4324         u32 dma_prefetch;
4325         __u32 dma_refetch;
4326
4327         if (h->board_id != 0x3225103C)
4328                 return;
4329         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4330         dma_prefetch |= 0x8000;
4331         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4332         pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4333         dma_refetch |= 0x1;
4334         pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4335 }
4336
4337 static int cciss_pci_init(ctlr_info_t *h)
4338 {
4339         int prod_index, err;
4340
4341         prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
4342         if (prod_index < 0)
4343                 return -ENODEV;
4344         h->product_name = products[prod_index].product_name;
4345         h->access = *(products[prod_index].access);
4346
4347         if (cciss_board_disabled(h)) {
4348                 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
4349                 return -ENODEV;
4350         }
4351
4352         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4353                                 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4354
4355         err = pci_enable_device(h->pdev);
4356         if (err) {
4357                 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
4358                 return err;
4359         }
4360
4361         err = pci_request_regions(h->pdev, "cciss");
4362         if (err) {
4363                 dev_warn(&h->pdev->dev,
4364                         "Cannot obtain PCI resources, aborting\n");
4365                 return err;
4366         }
4367
4368         dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4369         dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
4370
4371 /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4372  * else we use the IO-APIC interrupt assigned to us by system ROM.
4373  */
4374         cciss_interrupt_mode(h);
4375         err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
4376         if (err)
4377                 goto err_out_free_res;
4378         h->vaddr = remap_pci_mem(h->paddr, 0x250);
4379         if (!h->vaddr) {
4380                 err = -ENOMEM;
4381                 goto err_out_free_res;
4382         }
4383         err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
4384         if (err)
4385                 goto err_out_free_res;
4386         err = cciss_find_cfgtables(h);
4387         if (err)
4388                 goto err_out_free_res;
4389         print_cfg_table(h);
4390         cciss_find_board_params(h);
4391
4392         if (!CISS_signature_present(h)) {
4393                 err = -ENODEV;
4394                 goto err_out_free_res;
4395         }
4396         cciss_enable_scsi_prefetch(h);
4397         cciss_p600_dma_prefetch_quirk(h);
4398         err = cciss_enter_simple_mode(h);
4399         if (err)
4400                 goto err_out_free_res;
4401         cciss_put_controller_into_performant_mode(h);
4402         return 0;
4403
4404 err_out_free_res:
4405         /*
4406          * Deliberately omit pci_disable_device(): it does something nasty to
4407          * Smart Array controllers that pci_enable_device does not undo
4408          */
4409         if (h->transtable)
4410                 iounmap(h->transtable);
4411         if (h->cfgtable)
4412                 iounmap(h->cfgtable);
4413         if (h->vaddr)
4414                 iounmap(h->vaddr);
4415         pci_release_regions(h->pdev);
4416         return err;
4417 }
4418
4419 /* Function to find the first free pointer into our hba[] array
4420  * Returns -1 if no free entries are left.
4421  */
4422 static int alloc_cciss_hba(struct pci_dev *pdev)
4423 {
4424         int i;
4425
4426         for (i = 0; i < MAX_CTLR; i++) {
4427                 if (!hba[i]) {
4428                         ctlr_info_t *h;
4429
4430                         h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4431                         if (!h)
4432                                 goto Enomem;
4433                         hba[i] = h;
4434                         return i;
4435                 }
4436         }
4437         dev_warn(&pdev->dev, "This driver supports a maximum"
4438                " of %d controllers.\n", MAX_CTLR);
4439         return -1;
4440 Enomem:
4441         dev_warn(&pdev->dev, "out of memory.\n");
4442         return -1;
4443 }
4444
4445 static void free_hba(ctlr_info_t *h)
4446 {
4447         int i;
4448
4449         hba[h->ctlr] = NULL;
4450         for (i = 0; i < h->highest_lun + 1; i++)
4451                 if (h->gendisk[i] != NULL)
4452                         put_disk(h->gendisk[i]);
4453         kfree(h);
4454 }
4455
4456 /* Send a message CDB to the firmware. */
4457 static int cciss_message(struct pci_dev *pdev, unsigned char opcode,
4458                          unsigned char type)
4459 {
4460         typedef struct {
4461                 CommandListHeader_struct CommandHeader;
4462                 RequestBlock_struct Request;
4463                 ErrDescriptor_struct ErrorDescriptor;
4464         } Command;
4465         static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4466         Command *cmd;
4467         dma_addr_t paddr64;
4468         uint32_t paddr32, tag;
4469         void __iomem *vaddr;
4470         int i, err;
4471
4472         vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4473         if (vaddr == NULL)
4474                 return -ENOMEM;
4475
4476         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4477            CCISS commands, so they must be allocated from the lower 4GiB of
4478            memory. */
4479         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4480         if (err) {
4481                 iounmap(vaddr);
4482                 return -ENOMEM;
4483         }
4484
4485         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4486         if (cmd == NULL) {
4487                 iounmap(vaddr);
4488                 return -ENOMEM;
4489         }
4490
4491         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
4492            although there's no guarantee, we assume that the address is at
4493            least 4-byte aligned (most likely, it's page-aligned). */
4494         paddr32 = paddr64;
4495
4496         cmd->CommandHeader.ReplyQueue = 0;
4497         cmd->CommandHeader.SGList = 0;
4498         cmd->CommandHeader.SGTotal = 0;
4499         cmd->CommandHeader.Tag.lower = paddr32;
4500         cmd->CommandHeader.Tag.upper = 0;
4501         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4502
4503         cmd->Request.CDBLen = 16;
4504         cmd->Request.Type.Type = TYPE_MSG;
4505         cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4506         cmd->Request.Type.Direction = XFER_NONE;
4507         cmd->Request.Timeout = 0; /* Don't time out */
4508         cmd->Request.CDB[0] = opcode;
4509         cmd->Request.CDB[1] = type;
4510         memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4511
4512         cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4513         cmd->ErrorDescriptor.Addr.upper = 0;
4514         cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4515
4516         writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4517
4518         for (i = 0; i < 10; i++) {
4519                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4520                 if ((tag & ~3) == paddr32)
4521                         break;
4522                 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
4523         }
4524
4525         iounmap(vaddr);
4526
4527         /* we leak the DMA buffer here ... no choice since the controller could
4528            still complete the command. */
4529         if (i == 10) {
4530                 dev_err(&pdev->dev,
4531                         "controller message %02x:%02x timed out\n",
4532                         opcode, type);
4533                 return -ETIMEDOUT;
4534         }
4535
4536         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4537
4538         if (tag & 2) {
4539                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
4540                         opcode, type);
4541                 return -EIO;
4542         }
4543
4544         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
4545                 opcode, type);
4546         return 0;
4547 }
4548
4549 #define cciss_noop(p) cciss_message(p, 3, 0)
4550
4551 static int cciss_controller_hard_reset(struct pci_dev *pdev,
4552         void * __iomem vaddr, u32 use_doorbell)
4553 {
4554         u16 pmcsr;
4555         int pos;
4556
4557         if (use_doorbell) {
4558                 /* For everything after the P600, the PCI power state method
4559                  * of resetting the controller doesn't work, so we have this
4560                  * other way using the doorbell register.
4561                  */
4562                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4563                 writel(use_doorbell, vaddr + SA5_DOORBELL);
4564         } else { /* Try to do it the PCI power state way */
4565
4566                 /* Quoting from the Open CISS Specification: "The Power
4567                  * Management Control/Status Register (CSR) controls the power
4568                  * state of the device.  The normal operating state is D0,
4569                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
4570                  * the controller, place the interface device in D3 then to D0,
4571                  * this causes a secondary PCI reset which will reset the
4572                  * controller." */
4573
4574                 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4575                 if (pos == 0) {
4576                         dev_err(&pdev->dev,
4577                                 "cciss_controller_hard_reset: "
4578                                 "PCI PM not supported\n");
4579                         return -ENODEV;
4580                 }
4581                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4582                 /* enter the D3hot power management state */
4583                 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4584                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4585                 pmcsr |= PCI_D3hot;
4586                 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4587
4588                 msleep(500);
4589
4590                 /* enter the D0 power management state */
4591                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4592                 pmcsr |= PCI_D0;
4593                 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4594
4595                 /*
4596                  * The P600 requires a small delay when changing states.
4597                  * Otherwise we may think the board did not reset and we bail.
4598                  * This for kdump only and is particular to the P600.
4599                  */
4600                 msleep(500);
4601         }
4602         return 0;
4603 }
4604
4605 static void init_driver_version(char *driver_version, int len)
4606 {
4607         memset(driver_version, 0, len);
4608         strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4609 }
4610
4611 static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable)
4612 {
4613         char *driver_version;
4614         int i, size = sizeof(cfgtable->driver_version);
4615
4616         driver_version = kmalloc(size, GFP_KERNEL);
4617         if (!driver_version)
4618                 return -ENOMEM;
4619
4620         init_driver_version(driver_version, size);
4621         for (i = 0; i < size; i++)
4622                 writeb(driver_version[i], &cfgtable->driver_version[i]);
4623         kfree(driver_version);
4624         return 0;
4625 }
4626
4627 static void read_driver_ver_from_cfgtable(CfgTable_struct __iomem *cfgtable,
4628                                           unsigned char *driver_ver)
4629 {
4630         int i;
4631
4632         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4633                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
4634 }
4635
4636 static int controller_reset_failed(CfgTable_struct __iomem *cfgtable)
4637 {
4638
4639         char *driver_ver, *old_driver_ver;
4640         int rc, size = sizeof(cfgtable->driver_version);
4641
4642         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4643         if (!old_driver_ver)
4644                 return -ENOMEM;
4645         driver_ver = old_driver_ver + size;
4646
4647         /* After a reset, the 32 bytes of "driver version" in the cfgtable
4648          * should have been changed, otherwise we know the reset failed.
4649          */
4650         init_driver_version(old_driver_ver, size);
4651         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4652         rc = !memcmp(driver_ver, old_driver_ver, size);
4653         kfree(old_driver_ver);
4654         return rc;
4655 }
4656
4657 /* This does a hard reset of the controller using PCI power management
4658  * states or using the doorbell register. */
4659 static int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4660 {
4661         u64 cfg_offset;
4662         u32 cfg_base_addr;
4663         u64 cfg_base_addr_index;
4664         void __iomem *vaddr;
4665         unsigned long paddr;
4666         u32 misc_fw_support;
4667         int rc;
4668         CfgTable_struct __iomem *cfgtable;
4669         u32 use_doorbell;
4670         u32 board_id;
4671         u16 command_register;
4672
4673         /* For controllers as old a the p600, this is very nearly
4674          * the same thing as
4675          *
4676          * pci_save_state(pci_dev);
4677          * pci_set_power_state(pci_dev, PCI_D3hot);
4678          * pci_set_power_state(pci_dev, PCI_D0);
4679          * pci_restore_state(pci_dev);
4680          *
4681          * For controllers newer than the P600, the pci power state
4682          * method of resetting doesn't work so we have another way
4683          * using the doorbell register.
4684          */
4685
4686         /* Exclude 640x boards.  These are two pci devices in one slot
4687          * which share a battery backed cache module.  One controls the
4688          * cache, the other accesses the cache through the one that controls
4689          * it.  If we reset the one controlling the cache, the other will
4690          * likely not be happy.  Just forbid resetting this conjoined mess.
4691          */
4692         cciss_lookup_board_id(pdev, &board_id);
4693         if (!ctlr_is_resettable(board_id)) {
4694                 dev_warn(&pdev->dev, "Controller not resettable\n");
4695                 return -ENODEV;
4696         }
4697
4698         /* if controller is soft- but not hard resettable... */
4699         if (!ctlr_is_hard_resettable(board_id))
4700                 return -ENOTSUPP; /* try soft reset later. */
4701
4702         /* Save the PCI command register */
4703         pci_read_config_word(pdev, 4, &command_register);
4704         /* Turn the board off.  This is so that later pci_restore_state()
4705          * won't turn the board on before the rest of config space is ready.
4706          */
4707         pci_disable_device(pdev);
4708         pci_save_state(pdev);
4709
4710         /* find the first memory BAR, so we can find the cfg table */
4711         rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4712         if (rc)
4713                 return rc;
4714         vaddr = remap_pci_mem(paddr, 0x250);
4715         if (!vaddr)
4716                 return -ENOMEM;
4717
4718         /* find cfgtable in order to check if reset via doorbell is supported */
4719         rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4720                                         &cfg_base_addr_index, &cfg_offset);
4721         if (rc)
4722                 goto unmap_vaddr;
4723         cfgtable = remap_pci_mem(pci_resource_start(pdev,
4724                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4725         if (!cfgtable) {
4726                 rc = -ENOMEM;
4727                 goto unmap_vaddr;
4728         }
4729         rc = write_driver_ver_to_cfgtable(cfgtable);
4730         if (rc)
4731                 goto unmap_vaddr;
4732
4733         /* If reset via doorbell register is supported, use that.
4734          * There are two such methods.  Favor the newest method.
4735          */
4736         misc_fw_support = readl(&cfgtable->misc_fw_support);
4737         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4738         if (use_doorbell) {
4739                 use_doorbell = DOORBELL_CTLR_RESET2;
4740         } else {
4741                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4742                 if (use_doorbell) {
4743                         dev_warn(&pdev->dev, "Controller claims that "
4744                                 "'Bit 2 doorbell reset' is "
4745                                 "supported, but not 'bit 5 doorbell reset'.  "
4746                                 "Firmware update is recommended.\n");
4747                         rc = -ENOTSUPP; /* use the soft reset */
4748                         goto unmap_cfgtable;
4749                 }
4750         }
4751
4752         rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4753         if (rc)
4754                 goto unmap_cfgtable;
4755         pci_restore_state(pdev);
4756         rc = pci_enable_device(pdev);
4757         if (rc) {
4758                 dev_warn(&pdev->dev, "failed to enable device.\n");
4759                 goto unmap_cfgtable;
4760         }
4761         pci_write_config_word(pdev, 4, command_register);
4762
4763         /* Some devices (notably the HP Smart Array 5i Controller)
4764            need a little pause here */
4765         msleep(CCISS_POST_RESET_PAUSE_MSECS);
4766
4767         /* Wait for board to become not ready, then ready. */
4768         dev_info(&pdev->dev, "Waiting for board to reset.\n");
4769         rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
4770         if (rc) {
4771                 dev_warn(&pdev->dev, "Failed waiting for board to hard reset."
4772                                 "  Will try soft reset.\n");
4773                 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4774                 goto unmap_cfgtable;
4775         }
4776         rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4777         if (rc) {
4778                 dev_warn(&pdev->dev,
4779                         "failed waiting for board to become ready "
4780                         "after hard reset\n");
4781                 goto unmap_cfgtable;
4782         }
4783
4784         rc = controller_reset_failed(vaddr);
4785         if (rc < 0)
4786                 goto unmap_cfgtable;
4787         if (rc) {
4788                 dev_warn(&pdev->dev, "Unable to successfully hard reset "
4789                         "controller. Will try soft reset.\n");
4790                 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4791         } else {
4792                 dev_info(&pdev->dev, "Board ready after hard reset.\n");
4793         }
4794
4795 unmap_cfgtable:
4796         iounmap(cfgtable);
4797
4798 unmap_vaddr:
4799         iounmap(vaddr);
4800         return rc;
4801 }
4802
4803 static int cciss_init_reset_devices(struct pci_dev *pdev)
4804 {
4805         int rc, i;
4806
4807         if (!reset_devices)
4808                 return 0;
4809
4810         /* Reset the controller with a PCI power-cycle or via doorbell */
4811         rc = cciss_kdump_hard_reset_controller(pdev);
4812
4813         /* -ENOTSUPP here means we cannot reset the controller
4814          * but it's already (and still) up and running in
4815          * "performant mode".  Or, it might be 640x, which can't reset
4816          * due to concerns about shared bbwc between 6402/6404 pair.
4817          */
4818         if (rc == -ENOTSUPP)
4819                 return rc; /* just try to do the kdump anyhow. */
4820         if (rc)
4821                 return -ENODEV;
4822
4823         /* Now try to get the controller to respond to a no-op */
4824         dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4825         for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4826                 if (cciss_noop(pdev) == 0)
4827                         break;
4828                 else
4829                         dev_warn(&pdev->dev, "no-op failed%s\n",
4830                                 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4831                                         "; re-trying" : ""));
4832                 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4833         }
4834         return 0;
4835 }
4836
4837 static int cciss_allocate_cmd_pool(ctlr_info_t *h)
4838 {
4839         h->cmd_pool_bits = kmalloc(BITS_TO_LONGS(h->nr_cmds) *
4840                 sizeof(unsigned long), GFP_KERNEL);
4841         h->cmd_pool = pci_alloc_consistent(h->pdev,
4842                 h->nr_cmds * sizeof(CommandList_struct),
4843                 &(h->cmd_pool_dhandle));
4844         h->errinfo_pool = pci_alloc_consistent(h->pdev,
4845                 h->nr_cmds * sizeof(ErrorInfo_struct),
4846                 &(h->errinfo_pool_dhandle));
4847         if ((h->cmd_pool_bits == NULL)
4848                 || (h->cmd_pool == NULL)
4849                 || (h->errinfo_pool == NULL)) {
4850                 dev_err(&h->pdev->dev, "out of memory");
4851                 return -ENOMEM;
4852         }
4853         return 0;
4854 }
4855
4856 static int cciss_allocate_scatterlists(ctlr_info_t *h)
4857 {
4858         int i;
4859
4860         /* zero it, so that on free we need not know how many were alloc'ed */
4861         h->scatter_list = kzalloc(h->max_commands *
4862                                 sizeof(struct scatterlist *), GFP_KERNEL);
4863         if (!h->scatter_list)
4864                 return -ENOMEM;
4865
4866         for (i = 0; i < h->nr_cmds; i++) {
4867                 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4868                                                 h->maxsgentries, GFP_KERNEL);
4869                 if (h->scatter_list[i] == NULL) {
4870                         dev_err(&h->pdev->dev, "could not allocate "
4871                                 "s/g lists\n");
4872                         return -ENOMEM;
4873                 }
4874         }
4875         return 0;
4876 }
4877
4878 static void cciss_free_scatterlists(ctlr_info_t *h)
4879 {
4880         int i;
4881
4882         if (h->scatter_list) {
4883                 for (i = 0; i < h->nr_cmds; i++)
4884                         kfree(h->scatter_list[i]);
4885                 kfree(h->scatter_list);
4886         }
4887 }
4888
4889 static void cciss_free_cmd_pool(ctlr_info_t *h)
4890 {
4891         kfree(h->cmd_pool_bits);
4892         if (h->cmd_pool)
4893                 pci_free_consistent(h->pdev,
4894                         h->nr_cmds * sizeof(CommandList_struct),
4895                         h->cmd_pool, h->cmd_pool_dhandle);
4896         if (h->errinfo_pool)
4897                 pci_free_consistent(h->pdev,
4898                         h->nr_cmds * sizeof(ErrorInfo_struct),
4899                         h->errinfo_pool, h->errinfo_pool_dhandle);
4900 }
4901
4902 static int cciss_request_irq(ctlr_info_t *h,
4903         irqreturn_t (*msixhandler)(int, void *),
4904         irqreturn_t (*intxhandler)(int, void *))
4905 {
4906         if (h->pdev->msi_enabled || h->pdev->msix_enabled) {
4907                 if (!request_irq(h->intr[h->intr_mode], msixhandler,
4908                                 0, h->devname, h))
4909                         return 0;
4910                 dev_err(&h->pdev->dev, "Unable to get msi irq %d"
4911                         " for %s\n", h->intr[h->intr_mode],
4912                         h->devname);
4913                 return -1;
4914         }
4915
4916         if (!request_irq(h->intr[h->intr_mode], intxhandler,
4917                         IRQF_SHARED, h->devname, h))
4918                 return 0;
4919         dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4920                 h->intr[h->intr_mode], h->devname);
4921         return -1;
4922 }
4923
4924 static int cciss_kdump_soft_reset(ctlr_info_t *h)
4925 {
4926         if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) {
4927                 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4928                 return -EIO;
4929         }
4930
4931         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4932         if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4933                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4934                 return -1;
4935         }
4936
4937         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4938         if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4939                 dev_warn(&h->pdev->dev, "Board failed to become ready "
4940                         "after soft reset.\n");
4941                 return -1;
4942         }
4943
4944         return 0;
4945 }
4946
4947 static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
4948 {
4949         int ctlr = h->ctlr;
4950
4951         free_irq(h->intr[h->intr_mode], h);
4952         pci_free_irq_vectors(h->pdev);
4953         cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4954         cciss_free_scatterlists(h);
4955         cciss_free_cmd_pool(h);
4956         kfree(h->blockFetchTable);
4957         if (h->reply_pool)
4958                 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4959                                 h->reply_pool, h->reply_pool_dhandle);
4960         if (h->transtable)
4961                 iounmap(h->transtable);
4962         if (h->cfgtable)
4963                 iounmap(h->cfgtable);
4964         if (h->vaddr)
4965                 iounmap(h->vaddr);
4966         unregister_blkdev(h->major, h->devname);
4967         cciss_destroy_hba_sysfs_entry(h);
4968         pci_release_regions(h->pdev);
4969         kfree(h);
4970         hba[ctlr] = NULL;
4971 }
4972
4973 /*
4974  *  This is it.  Find all the controllers and register them.  I really hate
4975  *  stealing all these major device numbers.
4976  *  returns the number of block devices registered.
4977  */
4978 static int cciss_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
4979 {
4980         int i;
4981         int j = 0;
4982         int rc;
4983         int try_soft_reset = 0;
4984         int dac, return_code;
4985         InquiryData_struct *inq_buff;
4986         ctlr_info_t *h;
4987         unsigned long flags;
4988
4989         /*
4990          * By default the cciss driver is used for all older HP Smart Array
4991          * controllers. There are module paramaters that allow a user to
4992          * override this behavior and instead use the hpsa SCSI driver. If
4993          * this is the case cciss may be loaded first from the kdump initrd
4994          * image and cause a kernel panic. So if reset_devices is true and
4995          * cciss_allow_hpsa is set just bail.
4996          */
4997         if ((reset_devices) && (cciss_allow_hpsa == 1))
4998                 return -ENODEV;
4999         rc = cciss_init_reset_devices(pdev);
5000         if (rc) {
5001                 if (rc != -ENOTSUPP)
5002                         return rc;
5003                 /* If the reset fails in a particular way (it has no way to do
5004                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
5005                  * a soft reset once we get the controller configured up to the
5006                  * point that it can accept a command.
5007                  */
5008                 try_soft_reset = 1;
5009                 rc = 0;
5010         }
5011
5012 reinit_after_soft_reset:
5013
5014         i = alloc_cciss_hba(pdev);
5015         if (i < 0)
5016                 return -ENOMEM;
5017
5018         h = hba[i];
5019         h->pdev = pdev;
5020         h->busy_initializing = 1;
5021         h->intr_mode = cciss_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
5022         INIT_LIST_HEAD(&h->cmpQ);
5023         INIT_LIST_HEAD(&h->reqQ);
5024         mutex_init(&h->busy_shutting_down);
5025
5026         if (cciss_pci_init(h) != 0)
5027                 goto clean_no_release_regions;
5028
5029         sprintf(h->devname, "cciss%d", i);
5030         h->ctlr = i;
5031
5032         if (cciss_tape_cmds < 2)
5033                 cciss_tape_cmds = 2;
5034         if (cciss_tape_cmds > 16)
5035                 cciss_tape_cmds = 16;
5036
5037         init_completion(&h->scan_wait);
5038
5039         if (cciss_create_hba_sysfs_entry(h))
5040                 goto clean0;
5041
5042         /* configure PCI DMA stuff */
5043         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5044                 dac = 1;
5045         else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
5046                 dac = 0;
5047         else {
5048                 dev_err(&h->pdev->dev, "no suitable DMA available\n");
5049                 goto clean1;
5050         }
5051
5052         /*
5053          * register with the major number, or get a dynamic major number
5054          * by passing 0 as argument.  This is done for greater than
5055          * 8 controller support.
5056          */
5057         if (i < MAX_CTLR_ORIG)
5058                 h->major = COMPAQ_CISS_MAJOR + i;
5059         rc = register_blkdev(h->major, h->devname);
5060         if (rc == -EBUSY || rc == -EINVAL) {
5061                 dev_err(&h->pdev->dev,
5062                        "Unable to get major number %d for %s "
5063                        "on hba %d\n", h->major, h->devname, i);
5064                 goto clean1;
5065         } else {
5066                 if (i >= MAX_CTLR_ORIG)
5067                         h->major = rc;
5068         }
5069
5070         /* make sure the board interrupts are off */
5071         h->access.set_intr_mask(h, CCISS_INTR_OFF);
5072         rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
5073         if (rc)
5074                 goto clean2;
5075
5076         dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
5077                h->devname, pdev->device, pci_name(pdev),
5078                h->intr[h->intr_mode], dac ? "" : " not");
5079
5080         if (cciss_allocate_cmd_pool(h))
5081                 goto clean4;
5082
5083         if (cciss_allocate_scatterlists(h))
5084                 goto clean4;
5085
5086         h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
5087                 h->chainsize, h->nr_cmds);
5088         if (!h->cmd_sg_list && h->chainsize > 0)
5089                 goto clean4;
5090
5091         spin_lock_init(&h->lock);
5092
5093         /* Initialize the pdev driver private data.
5094            have it point to h.  */
5095         pci_set_drvdata(pdev, h);
5096         /* command and error info recs zeroed out before
5097            they are used */
5098         bitmap_zero(h->cmd_pool_bits, h->nr_cmds);
5099
5100         h->num_luns = 0;
5101         h->highest_lun = -1;
5102         for (j = 0; j < CISS_MAX_LUN; j++) {
5103                 h->drv[j] = NULL;
5104                 h->gendisk[j] = NULL;
5105         }
5106
5107         /* At this point, the controller is ready to take commands.
5108          * Now, if reset_devices and the hard reset didn't work, try
5109          * the soft reset and see if that works.
5110          */
5111         if (try_soft_reset) {
5112
5113                 /* This is kind of gross.  We may or may not get a completion
5114                  * from the soft reset command, and if we do, then the value
5115                  * from the fifo may or may not be valid.  So, we wait 10 secs
5116                  * after the reset throwing away any completions we get during
5117                  * that time.  Unregister the interrupt handler and register
5118                  * fake ones to scoop up any residual completions.
5119                  */
5120                 spin_lock_irqsave(&h->lock, flags);
5121                 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5122                 spin_unlock_irqrestore(&h->lock, flags);
5123                 free_irq(h->intr[h->intr_mode], h);
5124                 rc = cciss_request_irq(h, cciss_msix_discard_completions,
5125                                         cciss_intx_discard_completions);
5126                 if (rc) {
5127                         dev_warn(&h->pdev->dev, "Failed to request_irq after "
5128                                 "soft reset.\n");
5129                         goto clean4;
5130                 }
5131
5132                 rc = cciss_kdump_soft_reset(h);
5133                 if (rc) {
5134                         dev_warn(&h->pdev->dev, "Soft reset failed.\n");
5135                         goto clean4;
5136                 }
5137
5138                 dev_info(&h->pdev->dev, "Board READY.\n");
5139                 dev_info(&h->pdev->dev,
5140                         "Waiting for stale completions to drain.\n");
5141                 h->access.set_intr_mask(h, CCISS_INTR_ON);
5142                 msleep(10000);
5143                 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5144
5145                 rc = controller_reset_failed(h->cfgtable);
5146                 if (rc)
5147                         dev_info(&h->pdev->dev,
5148                                 "Soft reset appears to have failed.\n");
5149
5150                 /* since the controller's reset, we have to go back and re-init
5151                  * everything.  Easiest to just forget what we've done and do it
5152                  * all over again.
5153                  */
5154                 cciss_undo_allocations_after_kdump_soft_reset(h);
5155                 try_soft_reset = 0;
5156                 if (rc)
5157                         /* don't go to clean4, we already unallocated */
5158                         return -ENODEV;
5159
5160                 goto reinit_after_soft_reset;
5161         }
5162
5163         cciss_scsi_setup(h);
5164
5165         /* Turn the interrupts on so we can service requests */
5166         h->access.set_intr_mask(h, CCISS_INTR_ON);
5167
5168         /* Get the firmware version */
5169         inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
5170         if (inq_buff == NULL) {
5171                 dev_err(&h->pdev->dev, "out of memory\n");
5172                 goto clean4;
5173         }
5174
5175         return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
5176                 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
5177         if (return_code == IO_OK) {
5178                 h->firm_ver[0] = inq_buff->data_byte[32];
5179                 h->firm_ver[1] = inq_buff->data_byte[33];
5180                 h->firm_ver[2] = inq_buff->data_byte[34];
5181                 h->firm_ver[3] = inq_buff->data_byte[35];
5182         } else {         /* send command failed */
5183                 dev_warn(&h->pdev->dev, "unable to determine firmware"
5184                         " version of controller\n");
5185         }
5186         kfree(inq_buff);
5187
5188         cciss_procinit(h);
5189
5190         h->cciss_max_sectors = 8192;
5191
5192         rebuild_lun_table(h, 1, 0);
5193         cciss_engage_scsi(h);
5194         h->busy_initializing = 0;
5195         return 0;
5196
5197 clean4:
5198         cciss_free_cmd_pool(h);
5199         cciss_free_scatterlists(h);
5200         cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5201         free_irq(h->intr[h->intr_mode], h);
5202 clean2:
5203         unregister_blkdev(h->major, h->devname);
5204 clean1:
5205         cciss_destroy_hba_sysfs_entry(h);
5206 clean0:
5207         pci_release_regions(pdev);
5208 clean_no_release_regions:
5209         h->busy_initializing = 0;
5210
5211         /*
5212          * Deliberately omit pci_disable_device(): it does something nasty to
5213          * Smart Array controllers that pci_enable_device does not undo
5214          */
5215         pci_set_drvdata(pdev, NULL);
5216         free_hba(h);
5217         return -ENODEV;
5218 }
5219
5220 static void cciss_shutdown(struct pci_dev *pdev)
5221 {
5222         ctlr_info_t *h;
5223         char *flush_buf;
5224         int return_code;
5225
5226         h = pci_get_drvdata(pdev);
5227         flush_buf = kzalloc(4, GFP_KERNEL);
5228         if (!flush_buf) {
5229                 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
5230                 return;
5231         }
5232         /* write all data in the battery backed cache to disk */
5233         return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
5234                 4, 0, CTLR_LUNID, TYPE_CMD);
5235         kfree(flush_buf);
5236         if (return_code != IO_OK)
5237                 dev_warn(&h->pdev->dev, "Error flushing cache\n");
5238         h->access.set_intr_mask(h, CCISS_INTR_OFF);
5239         free_irq(h->intr[h->intr_mode], h);
5240 }
5241
5242 static int cciss_enter_simple_mode(struct ctlr_info *h)
5243 {
5244         u32 trans_support;
5245
5246         trans_support = readl(&(h->cfgtable->TransportSupport));
5247         if (!(trans_support & SIMPLE_MODE))
5248                 return -ENOTSUPP;
5249
5250         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
5251         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
5252         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5253         cciss_wait_for_mode_change_ack(h);
5254         print_cfg_table(h);
5255         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
5256                 dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
5257                 return -ENODEV;
5258         }
5259         h->transMethod = CFGTBL_Trans_Simple;
5260         return 0;
5261 }
5262
5263
5264 static void cciss_remove_one(struct pci_dev *pdev)
5265 {
5266         ctlr_info_t *h;
5267         int i, j;
5268
5269         if (pci_get_drvdata(pdev) == NULL) {
5270                 dev_err(&pdev->dev, "Unable to remove device\n");
5271                 return;
5272         }
5273
5274         h = pci_get_drvdata(pdev);
5275         i = h->ctlr;
5276         if (hba[i] == NULL) {
5277                 dev_err(&pdev->dev, "device appears to already be removed\n");
5278                 return;
5279         }
5280
5281         mutex_lock(&h->busy_shutting_down);
5282
5283         remove_from_scan_list(h);
5284         remove_proc_entry(h->devname, proc_cciss);
5285         unregister_blkdev(h->major, h->devname);
5286
5287         /* remove it from the disk list */
5288         for (j = 0; j < CISS_MAX_LUN; j++) {
5289                 struct gendisk *disk = h->gendisk[j];
5290                 if (disk) {
5291                         struct request_queue *q = disk->queue;
5292
5293                         if (disk->flags & GENHD_FL_UP) {
5294                                 cciss_destroy_ld_sysfs_entry(h, j, 1);
5295                                 del_gendisk(disk);
5296                         }
5297                         if (q)
5298                                 blk_cleanup_queue(q);
5299                 }
5300         }
5301
5302 #ifdef CONFIG_CISS_SCSI_TAPE
5303         cciss_unregister_scsi(h);       /* unhook from SCSI subsystem */
5304 #endif
5305
5306         cciss_shutdown(pdev);
5307
5308         pci_free_irq_vectors(h->pdev);
5309
5310         iounmap(h->transtable);
5311         iounmap(h->cfgtable);
5312         iounmap(h->vaddr);
5313
5314         cciss_free_cmd_pool(h);
5315         /* Free up sg elements */
5316         for (j = 0; j < h->nr_cmds; j++)
5317                 kfree(h->scatter_list[j]);
5318         kfree(h->scatter_list);
5319         cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5320         kfree(h->blockFetchTable);
5321         if (h->reply_pool)
5322                 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
5323                                 h->reply_pool, h->reply_pool_dhandle);
5324         /*
5325          * Deliberately omit pci_disable_device(): it does something nasty to
5326          * Smart Array controllers that pci_enable_device does not undo
5327          */
5328         pci_release_regions(pdev);
5329         pci_set_drvdata(pdev, NULL);
5330         cciss_destroy_hba_sysfs_entry(h);
5331         mutex_unlock(&h->busy_shutting_down);
5332         free_hba(h);
5333 }
5334
5335 static struct pci_driver cciss_pci_driver = {
5336         .name = "cciss",
5337         .probe = cciss_init_one,
5338         .remove = cciss_remove_one,
5339         .id_table = cciss_pci_device_id,        /* id_table */
5340         .shutdown = cciss_shutdown,
5341 };
5342
5343 /*
5344  *  This is it.  Register the PCI driver information for the cards we control
5345  *  the OS will call our registered routines when it finds one of our cards.
5346  */
5347 static int __init cciss_init(void)
5348 {
5349         int err;
5350
5351         /*
5352          * The hardware requires that commands are aligned on a 64-bit
5353          * boundary. Given that we use pci_alloc_consistent() to allocate an
5354          * array of them, the size must be a multiple of 8 bytes.
5355          */
5356         BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
5357         printk(KERN_INFO DRIVER_NAME "\n");
5358
5359         err = bus_register(&cciss_bus_type);
5360         if (err)
5361                 return err;
5362
5363         /* Start the scan thread */
5364         cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5365         if (IS_ERR(cciss_scan_thread)) {
5366                 err = PTR_ERR(cciss_scan_thread);
5367                 goto err_bus_unregister;
5368         }
5369
5370         /* Register for our PCI devices */
5371         err = pci_register_driver(&cciss_pci_driver);
5372         if (err)
5373                 goto err_thread_stop;
5374
5375         return err;
5376
5377 err_thread_stop:
5378         kthread_stop(cciss_scan_thread);
5379 err_bus_unregister:
5380         bus_unregister(&cciss_bus_type);
5381
5382         return err;
5383 }
5384
5385 static void __exit cciss_cleanup(void)
5386 {
5387         int i;
5388
5389         pci_unregister_driver(&cciss_pci_driver);
5390         /* double check that all controller entrys have been removed */
5391         for (i = 0; i < MAX_CTLR; i++) {
5392                 if (hba[i] != NULL) {
5393                         dev_warn(&hba[i]->pdev->dev,
5394                                 "had to remove controller\n");
5395                         cciss_remove_one(hba[i]->pdev);
5396                 }
5397         }
5398         kthread_stop(cciss_scan_thread);
5399         if (proc_cciss)
5400                 remove_proc_entry("driver/cciss", NULL);
5401         bus_unregister(&cciss_bus_type);
5402 }
5403
5404 module_init(cciss_init);
5405 module_exit(cciss_cleanup);