drivers/gpu/drm/msm/msm_drv.c

   1 /*
   2  * Copyright (C) 2013 Red Hat
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include "msm_drv.h"
  19 #include "msm_gpu.h"
  20 #include "msm_kms.h"
  21
  22 static void msm_fb_output_poll_changed(struct drm_device *dev)
  23 {
  24         struct msm_drm_private *priv = dev->dev_private;
  25         if (priv->fbdev)
  26                 drm_fb_helper_hotplug_event(priv->fbdev);
  27 }
  28
  29 static const struct drm_mode_config_funcs mode_config_funcs = {
  30         .fb_create = msm_framebuffer_create,
  31         .output_poll_changed = msm_fb_output_poll_changed,
  32         .atomic_check = msm_atomic_check,
  33         .atomic_commit = msm_atomic_commit,
  34 };
  35
  36 int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu)
  37 {
  38         struct msm_drm_private *priv = dev->dev_private;
  39         int idx = priv->num_mmus++;
  40
  41         if (WARN_ON(idx >= ARRAY_SIZE(priv->mmus)))
  42                 return -EINVAL;
  43
  44         priv->mmus[idx] = mmu;
  45
  46         return idx;
  47 }
  48
  49 #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
  50 static bool reglog = false;
  51 MODULE_PARM_DESC(reglog, "Enable register read/write logging");
  52 module_param(reglog, bool, 0600);
  53 #else
  54 #define reglog 0
  55 #endif
  56
  57 #ifdef CONFIG_DRM_FBDEV_EMULATION
  58 static bool fbdev = true;
  59 MODULE_PARM_DESC(fbdev, "Enable fbdev compat layer");
  60 module_param(fbdev, bool, 0600);
  61 #endif
  62
  63 static char *vram = "16m";
  64 MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU");
  65 module_param(vram, charp, 0);
  66
  67 /*
  68  * Util/helpers:
  69  */
  70
  71 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
  72                 const char *dbgname)
  73 {
  74         struct resource *res;
  75         unsigned long size;
  76         void __iomem *ptr;
  77
  78         if (name)
  79                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  80         else
  81                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  82
  83         if (!res) {
  84                 dev_err(&pdev->dev, "failed to get memory resource: %s\n", name);
  85                 return ERR_PTR(-EINVAL);
  86         }
  87
  88         size = resource_size(res);
  89
  90         ptr = devm_ioremap_nocache(&pdev->dev, res->start, size);
  91         if (!ptr) {
  92                 dev_err(&pdev->dev, "failed to ioremap: %s\n", name);
  93                 return ERR_PTR(-ENOMEM);
  94         }
  95
  96         if (reglog)
  97                 printk(KERN_DEBUG "IO:region %s %p %08lx\n", dbgname, ptr, size);
  98
  99         return ptr;
 100 }
 101
 102 void msm_writel(u32 data, void __iomem *addr)
 103 {
 104         if (reglog)
 105                 printk(KERN_DEBUG "IO:W %p %08x\n", addr, data);
 106         writel(data, addr);
 107 }
 108
 109 u32 msm_readl(const void __iomem *addr)
 110 {
 111         u32 val = readl(addr);
 112         if (reglog)
 113                 printk(KERN_ERR "IO:R %p %08x\n", addr, val);
 114         return val;
 115 }
 116
 117 struct vblank_event {
 118         struct list_head node;
 119         int crtc_id;
 120         bool enable;
 121 };
 122
 123 static void vblank_ctrl_worker(struct work_struct *work)
 124 {
 125         struct msm_vblank_ctrl *vbl_ctrl = container_of(work,
 126                                                 struct msm_vblank_ctrl, work);
 127         struct msm_drm_private *priv = container_of(vbl_ctrl,
 128                                         struct msm_drm_private, vblank_ctrl);
 129         struct msm_kms *kms = priv->kms;
 130         struct vblank_event *vbl_ev, *tmp;
 131         unsigned long flags;
 132
 133         spin_lock_irqsave(&vbl_ctrl->lock, flags);
 134         list_for_each_entry_safe(vbl_ev, tmp, &vbl_ctrl->event_list, node) {
 135                 list_del(&vbl_ev->node);
 136                 spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
 137
 138                 if (vbl_ev->enable)
 139                         kms->funcs->enable_vblank(kms,
 140                                                 priv->crtcs[vbl_ev->crtc_id]);
 141                 else
 142                         kms->funcs->disable_vblank(kms,
 143                                                 priv->crtcs[vbl_ev->crtc_id]);
 144
 145                 kfree(vbl_ev);
 146
 147                 spin_lock_irqsave(&vbl_ctrl->lock, flags);
 148         }
 149
 150         spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
 151 }
 152
 153 static int vblank_ctrl_queue_work(struct msm_drm_private *priv,
 154                                         int crtc_id, bool enable)
 155 {
 156         struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl;
 157         struct vblank_event *vbl_ev;
 158         unsigned long flags;
 159
 160         vbl_ev = kzalloc(sizeof(*vbl_ev), GFP_ATOMIC);
 161         if (!vbl_ev)
 162                 return -ENOMEM;
 163
 164         vbl_ev->crtc_id = crtc_id;
 165         vbl_ev->enable = enable;
 166
 167         spin_lock_irqsave(&vbl_ctrl->lock, flags);
 168         list_add_tail(&vbl_ev->node, &vbl_ctrl->event_list);
 169         spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
 170
 171         queue_work(priv->wq, &vbl_ctrl->work);
 172
 173         return 0;
 174 }
 175
 176 /*
 177  * DRM operations:
 178  */
 179
 180 static int msm_unload(struct drm_device *dev)
 181 {
 182         struct msm_drm_private *priv = dev->dev_private;
 183         struct msm_kms *kms = priv->kms;
 184         struct msm_gpu *gpu = priv->gpu;
 185         struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl;
 186         struct vblank_event *vbl_ev, *tmp;
 187
 188         /* We must cancel and cleanup any pending vblank enable/disable
 189          * work before drm_irq_uninstall() to avoid work re-enabling an
 190          * irq after uninstall has disabled it.
 191          */
 192         cancel_work_sync(&vbl_ctrl->work);
 193         list_for_each_entry_safe(vbl_ev, tmp, &vbl_ctrl->event_list, node) {
 194                 list_del(&vbl_ev->node);
 195                 kfree(vbl_ev);
 196         }
 197
 198         drm_kms_helper_poll_fini(dev);
 199         drm_mode_config_cleanup(dev);
 200         drm_vblank_cleanup(dev);
 201
 202         pm_runtime_get_sync(dev->dev);
 203         drm_irq_uninstall(dev);
 204         pm_runtime_put_sync(dev->dev);
 205
 206         flush_workqueue(priv->wq);
 207         destroy_workqueue(priv->wq);
 208
 209         if (kms) {
 210                 pm_runtime_disable(dev->dev);
 211                 kms->funcs->destroy(kms);
 212         }
 213
 214         if (gpu) {
 215                 mutex_lock(&dev->struct_mutex);
 216                 gpu->funcs->pm_suspend(gpu);
 217                 mutex_unlock(&dev->struct_mutex);
 218                 gpu->funcs->destroy(gpu);
 219         }
 220
 221         if (priv->vram.paddr) {
 222                 DEFINE_DMA_ATTRS(attrs);
 223                 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
 224                 drm_mm_takedown(&priv->vram.mm);
 225                 dma_free_attrs(dev->dev, priv->vram.size, NULL,
 226                                 priv->vram.paddr, &attrs);
 227         }
 228
 229         component_unbind_all(dev->dev, dev);
 230
 231         dev->dev_private = NULL;
 232
 233         kfree(priv);
 234
 235         return 0;
 236 }
 237
 238 static int get_mdp_ver(struct platform_device *pdev)
 239 {
 240 #ifdef CONFIG_OF
 241         static const struct of_device_id match_types[] = { {
 242                 .compatible = "qcom,mdss_mdp",
 243                 .data   = (void *)5,
 244         }, {
 245                 /* end node */
 246         } };
 247         struct device *dev = &pdev->dev;
 248         const struct of_device_id *match;
 249         match = of_match_node(match_types, dev->of_node);
 250         if (match)
 251                 return (int)(unsigned long)match->data;
 252 #endif
 253         return 4;
 254 }
 255
 256 #include <linux/of_address.h>
 257
 258 static int msm_init_vram(struct drm_device *dev)
 259 {
 260         struct msm_drm_private *priv = dev->dev_private;
 261         unsigned long size = 0;
 262         int ret = 0;
 263
 264 #ifdef CONFIG_OF
 265         /* In the device-tree world, we could have a 'memory-region'
 266          * phandle, which gives us a link to our "vram".  Allocating
 267          * is all nicely abstracted behind the dma api, but we need
 268          * to know the entire size to allocate it all in one go. There
 269          * are two cases:
 270          *  1) device with no IOMMU, in which case we need exclusive
 271          *     access to a VRAM carveout big enough for all gpu
 272          *     buffers
 273          *  2) device with IOMMU, but where the bootloader puts up
 274          *     a splash screen.  In this case, the VRAM carveout
 275          *     need only be large enough for fbdev fb.  But we need
 276          *     exclusive access to the buffer to avoid the kernel
 277          *     using those pages for other purposes (which appears
 278          *     as corruption on screen before we have a chance to
 279          *     load and do initial modeset)
 280          */
 281         struct device_node *node;
 282
 283         node = of_parse_phandle(dev->dev->of_node, "memory-region", 0);
 284         if (node) {
 285                 struct resource r;
 286                 ret = of_address_to_resource(node, 0, &r);
 287                 if (ret)
 288                         return ret;
 289                 size = r.end - r.start;
 290                 DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);
 291         } else
 292 #endif
 293
 294         /* if we have no IOMMU, then we need to use carveout allocator.
 295          * Grab the entire CMA chunk carved out in early startup in
 296          * mach-msm:
 297          */
 298         if (!iommu_present(&platform_bus_type)) {
 299                 DRM_INFO("using %s VRAM carveout\n", vram);
 300                 size = memparse(vram, NULL);
 301         }
 302
 303         if (size) {
 304                 DEFINE_DMA_ATTRS(attrs);
 305                 void *p;
 306
 307                 priv->vram.size = size;
 308
 309                 drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
 310
 311                 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
 312                 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
 313
 314                 /* note that for no-kernel-mapping, the vaddr returned
 315                  * is bogus, but non-null if allocation succeeded:
 316                  */
 317                 p = dma_alloc_attrs(dev->dev, size,
 318                                 &priv->vram.paddr, GFP_KERNEL, &attrs);
 319                 if (!p) {
 320                         dev_err(dev->dev, "failed to allocate VRAM\n");
 321                         priv->vram.paddr = 0;
 322                         return -ENOMEM;
 323                 }
 324
 325                 dev_info(dev->dev, "VRAM: %08x->%08x\n",
 326                                 (uint32_t)priv->vram.paddr,
 327                                 (uint32_t)(priv->vram.paddr + size));
 328         }
 329
 330         return ret;
 331 }
 332
 333 static int msm_load(struct drm_device *dev, unsigned long flags)
 334 {
 335         struct platform_device *pdev = dev->platformdev;
 336         struct msm_drm_private *priv;
 337         struct msm_kms *kms;
 338         int ret;
 339
 340         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 341         if (!priv) {
 342                 dev_err(dev->dev, "failed to allocate private data\n");
 343                 return -ENOMEM;
 344         }
 345
 346         dev->dev_private = priv;
 347
 348         priv->wq = alloc_ordered_workqueue("msm", 0);
 349         init_waitqueue_head(&priv->fence_event);
 350         init_waitqueue_head(&priv->pending_crtcs_event);
 351
 352         INIT_LIST_HEAD(&priv->inactive_list);
 353         INIT_LIST_HEAD(&priv->fence_cbs);
 354         INIT_LIST_HEAD(&priv->vblank_ctrl.event_list);
 355         INIT_WORK(&priv->vblank_ctrl.work, vblank_ctrl_worker);
 356         spin_lock_init(&priv->vblank_ctrl.lock);
 357
 358         drm_mode_config_init(dev);
 359
 360         platform_set_drvdata(pdev, dev);
 361
 362         /* Bind all our sub-components: */
 363         ret = component_bind_all(dev->dev, dev);
 364         if (ret)
 365                 return ret;
 366
 367         ret = msm_init_vram(dev);
 368         if (ret)
 369                 goto fail;
 370
 371         switch (get_mdp_ver(pdev)) {
 372         case 4:
 373                 kms = mdp4_kms_init(dev);
 374                 break;
 375         case 5:
 376                 kms = mdp5_kms_init(dev);
 377                 break;
 378         default:
 379                 kms = ERR_PTR(-ENODEV);
 380                 break;
 381         }
 382
 383         if (IS_ERR(kms)) {
 384                 /*
 385                  * NOTE: once we have GPU support, having no kms should not
 386                  * be considered fatal.. ideally we would still support gpu
 387                  * and (for example) use dmabuf/prime to share buffers with
 388                  * imx drm driver on iMX5
 389                  */
 390                 dev_err(dev->dev, "failed to load kms\n");
 391                 ret = PTR_ERR(kms);
 392                 goto fail;
 393         }
 394
 395         priv->kms = kms;
 396
 397         if (kms) {
 398                 pm_runtime_enable(dev->dev);
 399                 ret = kms->funcs->hw_init(kms);
 400                 if (ret) {
 401                         dev_err(dev->dev, "kms hw init failed: %d\n", ret);
 402                         goto fail;
 403                 }
 404         }
 405
 406         dev->mode_config.funcs = &mode_config_funcs;
 407
 408         ret = drm_vblank_init(dev, priv->num_crtcs);
 409         if (ret < 0) {
 410                 dev_err(dev->dev, "failed to initialize vblank\n");
 411                 goto fail;
 412         }
 413
 414         pm_runtime_get_sync(dev->dev);
 415         ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
 416         //pm_runtime_put_sync(dev->dev);
 417         if (ret < 0) {
 418                 dev_err(dev->dev, "failed to install IRQ handler\n");
 419                 goto fail;
 420         }
 421
 422         drm_mode_config_reset(dev);
 423
 424 #ifdef CONFIG_DRM_FBDEV_EMULATION
 425         if (fbdev)
 426                 priv->fbdev = msm_fbdev_init(dev);
 427 #endif
 428
 429         ret = msm_debugfs_late_init(dev);
 430         if (ret)
 431                 goto fail;
 432
 433         drm_kms_helper_poll_init(dev);
 434
 435         return 0;
 436
 437 fail:
 438         msm_unload(dev);
 439         return ret;
 440 }
 441
 442 static void load_gpu(struct drm_device *dev)
 443 {
 444         static DEFINE_MUTEX(init_lock);
 445         struct msm_drm_private *priv = dev->dev_private;
 446
 447         mutex_lock(&init_lock);
 448
 449         if (!priv->gpu)
 450                 priv->gpu = adreno_load_gpu(dev);
 451
 452         mutex_unlock(&init_lock);
 453 }
 454
 455 static int msm_open(struct drm_device *dev, struct drm_file *file)
 456 {
 457         struct msm_file_private *ctx;
 458
 459         /* For now, load gpu on open.. to avoid the requirement of having
 460          * firmware in the initrd.
 461          */
 462         load_gpu(dev);
 463
 464         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 465         if (!ctx)
 466                 return -ENOMEM;
 467
 468         file->driver_priv = ctx;
 469
 470         return 0;
 471 }
 472
 473 static void msm_preclose(struct drm_device *dev, struct drm_file *file)
 474 {
 475         struct msm_drm_private *priv = dev->dev_private;
 476         struct msm_file_private *ctx = file->driver_priv;
 477         struct msm_kms *kms = priv->kms;
 478
 479         if (kms)
 480                 kms->funcs->preclose(kms, file);
 481
 482         mutex_lock(&dev->struct_mutex);
 483         if (ctx == priv->lastctx)
 484                 priv->lastctx = NULL;
 485         mutex_unlock(&dev->struct_mutex);
 486
 487         kfree(ctx);
 488 }
 489
 490 static void msm_lastclose(struct drm_device *dev)
 491 {
 492         struct msm_drm_private *priv = dev->dev_private;
 493         if (priv->fbdev)
 494                 drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
 495 }
 496
 497 static irqreturn_t msm_irq(int irq, void *arg)
 498 {
 499         struct drm_device *dev = arg;
 500         struct msm_drm_private *priv = dev->dev_private;
 501         struct msm_kms *kms = priv->kms;
 502         BUG_ON(!kms);
 503         return kms->funcs->irq(kms);
 504 }
 505
 506 static void msm_irq_preinstall(struct drm_device *dev)
 507 {
 508         struct msm_drm_private *priv = dev->dev_private;
 509         struct msm_kms *kms = priv->kms;
 510         BUG_ON(!kms);
 511         kms->funcs->irq_preinstall(kms);
 512 }
 513
 514 static int msm_irq_postinstall(struct drm_device *dev)
 515 {
 516         struct msm_drm_private *priv = dev->dev_private;
 517         struct msm_kms *kms = priv->kms;
 518         BUG_ON(!kms);
 519         return kms->funcs->irq_postinstall(kms);
 520 }
 521
 522 static void msm_irq_uninstall(struct drm_device *dev)
 523 {
 524         struct msm_drm_private *priv = dev->dev_private;
 525         struct msm_kms *kms = priv->kms;
 526         BUG_ON(!kms);
 527         kms->funcs->irq_uninstall(kms);
 528 }
 529
 530 static int msm_enable_vblank(struct drm_device *dev, unsigned int pipe)
 531 {
 532         struct msm_drm_private *priv = dev->dev_private;
 533         struct msm_kms *kms = priv->kms;
 534         if (!kms)
 535                 return -ENXIO;
 536         DBG("dev=%p, crtc=%u", dev, pipe);
 537         return vblank_ctrl_queue_work(priv, pipe, true);
 538 }
 539
 540 static void msm_disable_vblank(struct drm_device *dev, unsigned int pipe)
 541 {
 542         struct msm_drm_private *priv = dev->dev_private;
 543         struct msm_kms *kms = priv->kms;
 544         if (!kms)
 545                 return;
 546         DBG("dev=%p, crtc=%u", dev, pipe);
 547         vblank_ctrl_queue_work(priv, pipe, false);
 548 }
 549
 550 /*
 551  * DRM debugfs:
 552  */
 553
 554 #ifdef CONFIG_DEBUG_FS
 555 static int msm_gpu_show(struct drm_device *dev, struct seq_file *m)
 556 {
 557         struct msm_drm_private *priv = dev->dev_private;
 558         struct msm_gpu *gpu = priv->gpu;
 559
 560         if (gpu) {
 561                 seq_printf(m, "%s Status:\n", gpu->name);
 562                 gpu->funcs->show(gpu, m);
 563         }
 564
 565         return 0;
 566 }
 567
 568 static int msm_gem_show(struct drm_device *dev, struct seq_file *m)
 569 {
 570         struct msm_drm_private *priv = dev->dev_private;
 571         struct msm_gpu *gpu = priv->gpu;
 572
 573         if (gpu) {
 574                 seq_printf(m, "Active Objects (%s):\n", gpu->name);
 575                 msm_gem_describe_objects(&gpu->active_list, m);
 576         }
 577
 578         seq_printf(m, "Inactive Objects:\n");
 579         msm_gem_describe_objects(&priv->inactive_list, m);
 580
 581         return 0;
 582 }
 583
 584 static int msm_mm_show(struct drm_device *dev, struct seq_file *m)
 585 {
 586         return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
 587 }
 588
 589 static int msm_fb_show(struct drm_device *dev, struct seq_file *m)
 590 {
 591         struct msm_drm_private *priv = dev->dev_private;
 592         struct drm_framebuffer *fb, *fbdev_fb = NULL;
 593
 594         if (priv->fbdev) {
 595                 seq_printf(m, "fbcon ");
 596                 fbdev_fb = priv->fbdev->fb;
 597                 msm_framebuffer_describe(fbdev_fb, m);
 598         }
 599
 600         mutex_lock(&dev->mode_config.fb_lock);
 601         list_for_each_entry(fb, &dev->mode_config.fb_list, head) {
 602                 if (fb == fbdev_fb)
 603                         continue;
 604
 605                 seq_printf(m, "user ");
 606                 msm_framebuffer_describe(fb, m);
 607         }
 608         mutex_unlock(&dev->mode_config.fb_lock);
 609
 610         return 0;
 611 }
 612
 613 static int show_locked(struct seq_file *m, void *arg)
 614 {
 615         struct drm_info_node *node = (struct drm_info_node *) m->private;
 616         struct drm_device *dev = node->minor->dev;
 617         int (*show)(struct drm_device *dev, struct seq_file *m) =
 618                         node->info_ent->data;
 619         int ret;
 620
 621         ret = mutex_lock_interruptible(&dev->struct_mutex);
 622         if (ret)
 623                 return ret;
 624
 625         ret = show(dev, m);
 626
 627         mutex_unlock(&dev->struct_mutex);
 628
 629         return ret;
 630 }
 631
 632 static struct drm_info_list msm_debugfs_list[] = {
 633                 {"gpu", show_locked, 0, msm_gpu_show},
 634                 {"gem", show_locked, 0, msm_gem_show},
 635                 { "mm", show_locked, 0, msm_mm_show },
 636                 { "fb", show_locked, 0, msm_fb_show },
 637 };
 638
 639 static int late_init_minor(struct drm_minor *minor)
 640 {
 641         int ret;
 642
 643         if (!minor)
 644                 return 0;
 645
 646         ret = msm_rd_debugfs_init(minor);
 647         if (ret) {
 648                 dev_err(minor->dev->dev, "could not install rd debugfs\n");
 649                 return ret;
 650         }
 651
 652         ret = msm_perf_debugfs_init(minor);
 653         if (ret) {
 654                 dev_err(minor->dev->dev, "could not install perf debugfs\n");
 655                 return ret;
 656         }
 657
 658         return 0;
 659 }
 660
 661 int msm_debugfs_late_init(struct drm_device *dev)
 662 {
 663         int ret;
 664         ret = late_init_minor(dev->primary);
 665         if (ret)
 666                 return ret;
 667         ret = late_init_minor(dev->render);
 668         if (ret)
 669                 return ret;
 670         ret = late_init_minor(dev->control);
 671         return ret;
 672 }
 673
 674 static int msm_debugfs_init(struct drm_minor *minor)
 675 {
 676         struct drm_device *dev = minor->dev;
 677         int ret;
 678
 679         ret = drm_debugfs_create_files(msm_debugfs_list,
 680                         ARRAY_SIZE(msm_debugfs_list),
 681                         minor->debugfs_root, minor);
 682
 683         if (ret) {
 684                 dev_err(dev->dev, "could not install msm_debugfs_list\n");
 685                 return ret;
 686         }
 687
 688         return 0;
 689 }
 690
 691 static void msm_debugfs_cleanup(struct drm_minor *minor)
 692 {
 693         drm_debugfs_remove_files(msm_debugfs_list,
 694                         ARRAY_SIZE(msm_debugfs_list), minor);
 695         if (!minor->dev->dev_private)
 696                 return;
 697         msm_rd_debugfs_cleanup(minor);
 698         msm_perf_debugfs_cleanup(minor);
 699 }
 700 #endif
 701
 702 /*
 703  * Fences:
 704  */
 705
 706 int msm_wait_fence(struct drm_device *dev, uint32_t fence,
 707                 ktime_t *timeout , bool interruptible)
 708 {
 709         struct msm_drm_private *priv = dev->dev_private;
 710         int ret;
 711
 712         if (!priv->gpu)
 713                 return 0;
 714
 715         if (fence > priv->gpu->submitted_fence) {
 716                 DRM_ERROR("waiting on invalid fence: %u (of %u)\n",
 717                                 fence, priv->gpu->submitted_fence);
 718                 return -EINVAL;
 719         }
 720
 721         if (!timeout) {
 722                 /* no-wait: */
 723                 ret = fence_completed(dev, fence) ? 0 : -EBUSY;
 724         } else {
 725                 ktime_t now = ktime_get();
 726                 unsigned long remaining_jiffies;
 727
 728                 if (ktime_compare(*timeout, now) < 0) {
 729                         remaining_jiffies = 0;
 730                 } else {
 731                         ktime_t rem = ktime_sub(*timeout, now);
 732                         struct timespec ts = ktime_to_timespec(rem);
 733                         remaining_jiffies = timespec_to_jiffies(&ts);
 734                 }
 735
 736                 if (interruptible)
 737                         ret = wait_event_interruptible_timeout(priv->fence_event,
 738                                 fence_completed(dev, fence),
 739                                 remaining_jiffies);
 740                 else
 741                         ret = wait_event_timeout(priv->fence_event,
 742                                 fence_completed(dev, fence),
 743                                 remaining_jiffies);
 744
 745                 if (ret == 0) {
 746                         DBG("timeout waiting for fence: %u (completed: %u)",
 747                                         fence, priv->completed_fence);
 748                         ret = -ETIMEDOUT;
 749                 } else if (ret != -ERESTARTSYS) {
 750                         ret = 0;
 751                 }
 752         }
 753
 754         return ret;
 755 }
 756
 757 int msm_queue_fence_cb(struct drm_device *dev,
 758                 struct msm_fence_cb *cb, uint32_t fence)
 759 {
 760         struct msm_drm_private *priv = dev->dev_private;
 761         int ret = 0;
 762
 763         mutex_lock(&dev->struct_mutex);
 764         if (!list_empty(&cb->work.entry)) {
 765                 ret = -EINVAL;
 766         } else if (fence > priv->completed_fence) {
 767                 cb->fence = fence;
 768                 list_add_tail(&cb->work.entry, &priv->fence_cbs);
 769         } else {
 770                 queue_work(priv->wq, &cb->work);
 771         }
 772         mutex_unlock(&dev->struct_mutex);
 773
 774         return ret;
 775 }
 776
 777 /* called from workqueue */
 778 void msm_update_fence(struct drm_device *dev, uint32_t fence)
 779 {
 780         struct msm_drm_private *priv = dev->dev_private;
 781
 782         mutex_lock(&dev->struct_mutex);
 783         priv->completed_fence = max(fence, priv->completed_fence);
 784
 785         while (!list_empty(&priv->fence_cbs)) {
 786                 struct msm_fence_cb *cb;
 787
 788                 cb = list_first_entry(&priv->fence_cbs,
 789                                 struct msm_fence_cb, work.entry);
 790
 791                 if (cb->fence > priv->completed_fence)
 792                         break;
 793
 794                 list_del_init(&cb->work.entry);
 795                 queue_work(priv->wq, &cb->work);
 796         }
 797
 798         mutex_unlock(&dev->struct_mutex);
 799
 800         wake_up_all(&priv->fence_event);
 801 }
 802
 803 void __msm_fence_worker(struct work_struct *work)
 804 {
 805         struct msm_fence_cb *cb = container_of(work, struct msm_fence_cb, work);
 806         cb->func(cb);
 807 }
 808
 809 /*
 810  * DRM ioctls:
 811  */
 812
 813 static int msm_ioctl_get_param(struct drm_device *dev, void *data,
 814                 struct drm_file *file)
 815 {
 816         struct msm_drm_private *priv = dev->dev_private;
 817         struct drm_msm_param *args = data;
 818         struct msm_gpu *gpu;
 819
 820         /* for now, we just have 3d pipe.. eventually this would need to
 821          * be more clever to dispatch to appropriate gpu module:
 822          */
 823         if (args->pipe != MSM_PIPE_3D0)
 824                 return -EINVAL;
 825
 826         gpu = priv->gpu;
 827
 828         if (!gpu)
 829                 return -ENXIO;
 830
 831         return gpu->funcs->get_param(gpu, args->param, &args->value);
 832 }
 833
 834 static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
 835                 struct drm_file *file)
 836 {
 837         struct drm_msm_gem_new *args = data;
 838
 839         if (args->flags & ~MSM_BO_FLAGS) {
 840                 DRM_ERROR("invalid flags: %08x\n", args->flags);
 841                 return -EINVAL;
 842         }
 843
 844         return msm_gem_new_handle(dev, file, args->size,
 845                         args->flags, &args->handle);
 846 }
 847
 848 static inline ktime_t to_ktime(struct drm_msm_timespec timeout)
 849 {
 850         return ktime_set(timeout.tv_sec, timeout.tv_nsec);
 851 }
 852
 853 static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
 854                 struct drm_file *file)
 855 {
 856         struct drm_msm_gem_cpu_prep *args = data;
 857         struct drm_gem_object *obj;
 858         ktime_t timeout = to_ktime(args->timeout);
 859         int ret;
 860
 861         if (args->op & ~MSM_PREP_FLAGS) {
 862                 DRM_ERROR("invalid op: %08x\n", args->op);
 863                 return -EINVAL;
 864         }
 865
 866         obj = drm_gem_object_lookup(dev, file, args->handle);
 867         if (!obj)
 868                 return -ENOENT;
 869
 870         ret = msm_gem_cpu_prep(obj, args->op, &timeout);
 871
 872         drm_gem_object_unreference_unlocked(obj);
 873
 874         return ret;
 875 }
 876
 877 static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
 878                 struct drm_file *file)
 879 {
 880         struct drm_msm_gem_cpu_fini *args = data;
 881         struct drm_gem_object *obj;
 882         int ret;
 883
 884         obj = drm_gem_object_lookup(dev, file, args->handle);
 885         if (!obj)
 886                 return -ENOENT;
 887
 888         ret = msm_gem_cpu_fini(obj);
 889
 890         drm_gem_object_unreference_unlocked(obj);
 891
 892         return ret;
 893 }
 894
 895 static int msm_ioctl_gem_info(struct drm_device *dev, void *data,
 896                 struct drm_file *file)
 897 {
 898         struct drm_msm_gem_info *args = data;
 899         struct drm_gem_object *obj;
 900         int ret = 0;
 901
 902         if (args->pad)
 903                 return -EINVAL;
 904
 905         obj = drm_gem_object_lookup(dev, file, args->handle);
 906         if (!obj)
 907                 return -ENOENT;
 908
 909         args->offset = msm_gem_mmap_offset(obj);
 910
 911         drm_gem_object_unreference_unlocked(obj);
 912
 913         return ret;
 914 }
 915
 916 static int msm_ioctl_wait_fence(struct drm_device *dev, void *data,
 917                 struct drm_file *file)
 918 {
 919         struct drm_msm_wait_fence *args = data;
 920         ktime_t timeout = to_ktime(args->timeout);
 921
 922         if (args->pad) {
 923                 DRM_ERROR("invalid pad: %08x\n", args->pad);
 924                 return -EINVAL;
 925         }
 926
 927         return msm_wait_fence(dev, args->fence, &timeout, true);
 928 }
 929
 930 static const struct drm_ioctl_desc msm_ioctls[] = {
 931         DRM_IOCTL_DEF_DRV(MSM_GET_PARAM,    msm_ioctl_get_param,    DRM_AUTH|DRM_RENDER_ALLOW),
 932         DRM_IOCTL_DEF_DRV(MSM_GEM_NEW,      msm_ioctl_gem_new,      DRM_AUTH|DRM_RENDER_ALLOW),
 933         DRM_IOCTL_DEF_DRV(MSM_GEM_INFO,     msm_ioctl_gem_info,     DRM_AUTH|DRM_RENDER_ALLOW),
 934         DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
 935         DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
 936         DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT,   msm_ioctl_gem_submit,   DRM_AUTH|DRM_RENDER_ALLOW),
 937         DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE,   msm_ioctl_wait_fence,   DRM_AUTH|DRM_RENDER_ALLOW),
 938 };
 939
 940 static const struct vm_operations_struct vm_ops = {
 941         .fault = msm_gem_fault,
 942         .open = drm_gem_vm_open,
 943         .close = drm_gem_vm_close,
 944 };
 945
 946 static const struct file_operations fops = {
 947         .owner              = THIS_MODULE,
 948         .open               = drm_open,
 949         .release            = drm_release,
 950         .unlocked_ioctl     = drm_ioctl,
 951 #ifdef CONFIG_COMPAT
 952         .compat_ioctl       = drm_compat_ioctl,
 953 #endif
 954         .poll               = drm_poll,
 955         .read               = drm_read,
 956         .llseek             = no_llseek,
 957         .mmap               = msm_gem_mmap,
 958 };
 959
 960 static struct drm_driver msm_driver = {
 961         .driver_features    = DRIVER_HAVE_IRQ |
 962                                 DRIVER_GEM |
 963                                 DRIVER_PRIME |
 964                                 DRIVER_RENDER |
 965                                 DRIVER_ATOMIC |
 966                                 DRIVER_MODESET,
 967         .load               = msm_load,
 968         .unload             = msm_unload,
 969         .open               = msm_open,
 970         .preclose           = msm_preclose,
 971         .lastclose          = msm_lastclose,
 972         .set_busid          = drm_platform_set_busid,
 973         .irq_handler        = msm_irq,
 974         .irq_preinstall     = msm_irq_preinstall,
 975         .irq_postinstall    = msm_irq_postinstall,
 976         .irq_uninstall      = msm_irq_uninstall,
 977         .get_vblank_counter = drm_vblank_no_hw_counter,
 978         .enable_vblank      = msm_enable_vblank,
 979         .disable_vblank     = msm_disable_vblank,
 980         .gem_free_object    = msm_gem_free_object,
 981         .gem_vm_ops         = &vm_ops,
 982         .dumb_create        = msm_gem_dumb_create,
 983         .dumb_map_offset    = msm_gem_dumb_map_offset,
 984         .dumb_destroy       = drm_gem_dumb_destroy,
 985         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 986         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 987         .gem_prime_export   = drm_gem_prime_export,
 988         .gem_prime_import   = drm_gem_prime_import,
 989         .gem_prime_pin      = msm_gem_prime_pin,
 990         .gem_prime_unpin    = msm_gem_prime_unpin,
 991         .gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
 992         .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
 993         .gem_prime_vmap     = msm_gem_prime_vmap,
 994         .gem_prime_vunmap   = msm_gem_prime_vunmap,
 995         .gem_prime_mmap     = msm_gem_prime_mmap,
 996 #ifdef CONFIG_DEBUG_FS
 997         .debugfs_init       = msm_debugfs_init,
 998         .debugfs_cleanup    = msm_debugfs_cleanup,
 999 #endif
1000         .ioctls             = msm_ioctls,
1001         .num_ioctls         = DRM_MSM_NUM_IOCTLS,
1002         .fops               = &fops,
1003         .name               = "msm",
1004         .desc               = "MSM Snapdragon DRM",
1005         .date               = "20130625",
1006         .major              = 1,
1007         .minor              = 0,
1008 };
1009
1010 #ifdef CONFIG_PM_SLEEP
1011 static int msm_pm_suspend(struct device *dev)
1012 {
1013         struct drm_device *ddev = dev_get_drvdata(dev);
1014
1015         drm_kms_helper_poll_disable(ddev);
1016
1017         return 0;
1018 }
1019
1020 static int msm_pm_resume(struct device *dev)
1021 {
1022         struct drm_device *ddev = dev_get_drvdata(dev);
1023
1024         drm_kms_helper_poll_enable(ddev);
1025
1026         return 0;
1027 }
1028 #endif
1029
1030 static const struct dev_pm_ops msm_pm_ops = {
1031         SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
1032 };
1033
1034 /*
1035  * Componentized driver support:
1036  */
1037
1038 #ifdef CONFIG_OF
1039 /* NOTE: the CONFIG_OF case duplicates the same code as exynos or imx
1040  * (or probably any other).. so probably some room for some helpers
1041  */
1042 static int compare_of(struct device *dev, void *data)
1043 {
1044         return dev->of_node == data;
1045 }
1046
1047 static int add_components(struct device *dev, struct component_match **matchptr,
1048                 const char *name)
1049 {
1050         struct device_node *np = dev->of_node;
1051         unsigned i;
1052
1053         for (i = 0; ; i++) {
1054                 struct device_node *node;
1055
1056                 node = of_parse_phandle(np, name, i);
1057                 if (!node)
1058                         break;
1059
1060                 component_match_add(dev, matchptr, compare_of, node);
1061         }
1062
1063         return 0;
1064 }
1065 #else
1066 static int compare_dev(struct device *dev, void *data)
1067 {
1068         return dev == data;
1069 }
1070 #endif
1071
1072 static int msm_drm_bind(struct device *dev)
1073 {
1074         return drm_platform_init(&msm_driver, to_platform_device(dev));
1075 }
1076
1077 static void msm_drm_unbind(struct device *dev)
1078 {
1079         drm_put_dev(platform_get_drvdata(to_platform_device(dev)));
1080 }
1081
1082 static const struct component_master_ops msm_drm_ops = {
1083         .bind = msm_drm_bind,
1084         .unbind = msm_drm_unbind,
1085 };
1086
1087 /*
1088  * Platform driver:
1089  */
1090
1091 static int msm_pdev_probe(struct platform_device *pdev)
1092 {
1093         struct component_match *match = NULL;
1094 #ifdef CONFIG_OF
1095         add_components(&pdev->dev, &match, "connectors");
1096         add_components(&pdev->dev, &match, "gpus");
1097 #else
1098         /* For non-DT case, it kinda sucks.  We don't actually have a way
1099          * to know whether or not we are waiting for certain devices (or if
1100          * they are simply not present).  But for non-DT we only need to
1101          * care about apq8064/apq8060/etc (all mdp4/a3xx):
1102          */
1103         static const char *devnames[] = {
1104                         "hdmi_msm.0", "kgsl-3d0.0",
1105         };
1106         int i;
1107
1108         DBG("Adding components..");
1109
1110         for (i = 0; i < ARRAY_SIZE(devnames); i++) {
1111                 struct device *dev;
1112
1113                 dev = bus_find_device_by_name(&platform_bus_type,
1114                                 NULL, devnames[i]);
1115                 if (!dev) {
1116                         dev_info(&pdev->dev, "still waiting for %s\n", devnames[i]);
1117                         return -EPROBE_DEFER;
1118                 }
1119
1120                 component_match_add(&pdev->dev, &match, compare_dev, dev);
1121         }
1122 #endif
1123
1124         pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
1125         return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
1126 }
1127
1128 static int msm_pdev_remove(struct platform_device *pdev)
1129 {
1130         component_master_del(&pdev->dev, &msm_drm_ops);
1131
1132         return 0;
1133 }
1134
1135 static const struct platform_device_id msm_id[] = {
1136         { "mdp", 0 },
1137         { }
1138 };
1139
1140 static const struct of_device_id dt_match[] = {
1141         { .compatible = "qcom,mdp" },      /* mdp4 */
1142         { .compatible = "qcom,mdss_mdp" }, /* mdp5 */
1143         {}
1144 };
1145 MODULE_DEVICE_TABLE(of, dt_match);
1146
1147 static struct platform_driver msm_platform_driver = {
1148         .probe      = msm_pdev_probe,
1149         .remove     = msm_pdev_remove,
1150         .driver     = {
1151                 .name   = "msm",
1152                 .of_match_table = dt_match,
1153                 .pm     = &msm_pm_ops,
1154         },
1155         .id_table   = msm_id,
1156 };
1157
1158 static int __init msm_drm_register(void)
1159 {
1160         DBG("init");
1161         msm_dsi_register();
1162         msm_edp_register();
1163         hdmi_register();
1164         adreno_register();
1165         return platform_driver_register(&msm_platform_driver);
1166 }
1167
1168 static void __exit msm_drm_unregister(void)
1169 {
1170         DBG("fini");
1171         platform_driver_unregister(&msm_platform_driver);
1172         hdmi_unregister();
1173         adreno_unregister();
1174         msm_edp_unregister();
1175         msm_dsi_unregister();
1176 }
1177
1178 module_init(msm_drm_register);
1179 module_exit(msm_drm_unregister);
1180
1181 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
1182 MODULE_DESCRIPTION("MSM DRM Driver");
1183 MODULE_LICENSE("GPL");