drivers/gpu/drm/omapdrm/dss/hdmi5.c

   1 /*
   2  * HDMI driver for OMAP5
   3  *
   4  * Copyright (C) 2014 Texas Instruments Incorporated
   5  *
   6  * Authors:
   7  *      Yong Zhi
   8  *      Mythri pk
   9  *      Archit Taneja <archit@ti.com>
  10  *      Tomi Valkeinen <tomi.valkeinen@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify it
  13  * under the terms of the GNU General Public License version 2 as published by
  14  * the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope that it will be useful, but WITHOUT
  17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  * more details.
  20  *
  21  * You should have received a copy of the GNU General Public License along with
  22  * this program.  If not, see <http://www.gnu.org/licenses/>.
  23  */
  24
  25 #define DSS_SUBSYS_NAME "HDMI"
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/err.h>
  30 #include <linux/io.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/mutex.h>
  33 #include <linux/delay.h>
  34 #include <linux/string.h>
  35 #include <linux/platform_device.h>
  36 #include <linux/pm_runtime.h>
  37 #include <linux/clk.h>
  38 #include <linux/gpio.h>
  39 #include <linux/regulator/consumer.h>
  40 #include <linux/component.h>
  41 #include <linux/of.h>
  42 #include <video/omapdss.h>
  43 #include <sound/omap-hdmi-audio.h>
  44
  45 #include "hdmi5_core.h"
  46 #include "dss.h"
  47 #include "dss_features.h"
  48
  49 static struct omap_hdmi hdmi;
  50
  51 static int hdmi_runtime_get(void)
  52 {
  53         int r;
  54
  55         DSSDBG("hdmi_runtime_get\n");
  56
  57         r = pm_runtime_get_sync(&hdmi.pdev->dev);
  58         WARN_ON(r < 0);
  59         if (r < 0)
  60                 return r;
  61
  62         return 0;
  63 }
  64
  65 static void hdmi_runtime_put(void)
  66 {
  67         int r;
  68
  69         DSSDBG("hdmi_runtime_put\n");
  70
  71         r = pm_runtime_put_sync(&hdmi.pdev->dev);
  72         WARN_ON(r < 0 && r != -ENOSYS);
  73 }
  74
  75 static irqreturn_t hdmi_irq_handler(int irq, void *data)
  76 {
  77         struct hdmi_wp_data *wp = data;
  78         u32 irqstatus;
  79
  80         irqstatus = hdmi_wp_get_irqstatus(wp);
  81         hdmi_wp_set_irqstatus(wp, irqstatus);
  82
  83         if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  84                         irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  85                 u32 v;
  86                 /*
  87                  * If we get both connect and disconnect interrupts at the same
  88                  * time, turn off the PHY, clear interrupts, and restart, which
  89                  * raises connect interrupt if a cable is connected, or nothing
  90                  * if cable is not connected.
  91                  */
  92
  93                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  94
  95                 /*
  96                  * We always get bogus CONNECT & DISCONNECT interrupts when
  97                  * setting the PHY to LDOON. To ignore those, we force the RXDET
  98                  * line to 0 until the PHY power state has been changed.
  99                  */
 100                 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
 101                 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
 102                 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
 103                 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
 104
 105                 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
 106                                 HDMI_IRQ_LINK_DISCONNECT);
 107
 108                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
 109
 110                 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
 111
 112         } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
 113                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
 114         } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
 115                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
 116         }
 117
 118         return IRQ_HANDLED;
 119 }
 120
 121 static int hdmi_init_regulator(void)
 122 {
 123         struct regulator *reg;
 124
 125         if (hdmi.vdda_reg != NULL)
 126                 return 0;
 127
 128         reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
 129         if (IS_ERR(reg)) {
 130                 DSSERR("can't get VDDA regulator\n");
 131                 return PTR_ERR(reg);
 132         }
 133
 134         hdmi.vdda_reg = reg;
 135
 136         return 0;
 137 }
 138
 139 static int hdmi_power_on_core(struct omap_dss_device *dssdev)
 140 {
 141         int r;
 142
 143         r = regulator_enable(hdmi.vdda_reg);
 144         if (r)
 145                 return r;
 146
 147         r = hdmi_runtime_get();
 148         if (r)
 149                 goto err_runtime_get;
 150
 151         /* Make selection of HDMI in DSS */
 152         dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
 153
 154         hdmi.core_enabled = true;
 155
 156         return 0;
 157
 158 err_runtime_get:
 159         regulator_disable(hdmi.vdda_reg);
 160
 161         return r;
 162 }
 163
 164 static void hdmi_power_off_core(struct omap_dss_device *dssdev)
 165 {
 166         hdmi.core_enabled = false;
 167
 168         hdmi_runtime_put();
 169         regulator_disable(hdmi.vdda_reg);
 170 }
 171
 172 static int hdmi_power_on_full(struct omap_dss_device *dssdev)
 173 {
 174         int r;
 175         struct omap_video_timings *p;
 176         enum omap_channel channel = dssdev->dispc_channel;
 177         struct dss_pll_clock_info hdmi_cinfo = { 0 };
 178         unsigned pc;
 179
 180         r = hdmi_power_on_core(dssdev);
 181         if (r)
 182                 return r;
 183
 184         p = &hdmi.cfg.timings;
 185
 186         DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
 187
 188         pc = p->pixelclock;
 189         if (p->double_pixel)
 190                 pc *= 2;
 191
 192         hdmi_pll_compute(&hdmi.pll, pc, &hdmi_cinfo);
 193
 194         /* disable and clear irqs */
 195         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
 196         hdmi_wp_set_irqstatus(&hdmi.wp,
 197                         hdmi_wp_get_irqstatus(&hdmi.wp));
 198
 199         r = dss_pll_enable(&hdmi.pll.pll);
 200         if (r) {
 201                 DSSERR("Failed to enable PLL\n");
 202                 goto err_pll_enable;
 203         }
 204
 205         r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
 206         if (r) {
 207                 DSSERR("Failed to configure PLL\n");
 208                 goto err_pll_cfg;
 209         }
 210
 211         r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
 212                 hdmi_cinfo.clkout[0]);
 213         if (r) {
 214                 DSSDBG("Failed to start PHY\n");
 215                 goto err_phy_cfg;
 216         }
 217
 218         r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON);
 219         if (r)
 220                 goto err_phy_pwr;
 221
 222         hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
 223
 224         /* bypass TV gamma table */
 225         dispc_enable_gamma_table(0);
 226
 227         /* tv size */
 228         dss_mgr_set_timings(channel, p);
 229
 230         r = dss_mgr_enable(channel);
 231         if (r)
 232                 goto err_mgr_enable;
 233
 234         r = hdmi_wp_video_start(&hdmi.wp);
 235         if (r)
 236                 goto err_vid_enable;
 237
 238         hdmi_wp_set_irqenable(&hdmi.wp,
 239                         HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
 240
 241         return 0;
 242
 243 err_vid_enable:
 244         dss_mgr_disable(channel);
 245 err_mgr_enable:
 246         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 247 err_phy_pwr:
 248 err_phy_cfg:
 249 err_pll_cfg:
 250         dss_pll_disable(&hdmi.pll.pll);
 251 err_pll_enable:
 252         hdmi_power_off_core(dssdev);
 253         return -EIO;
 254 }
 255
 256 static void hdmi_power_off_full(struct omap_dss_device *dssdev)
 257 {
 258         enum omap_channel channel = dssdev->dispc_channel;
 259
 260         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
 261
 262         hdmi_wp_video_stop(&hdmi.wp);
 263
 264         dss_mgr_disable(channel);
 265
 266         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 267
 268         dss_pll_disable(&hdmi.pll.pll);
 269
 270         hdmi_power_off_core(dssdev);
 271 }
 272
 273 static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
 274                                         struct omap_video_timings *timings)
 275 {
 276         if (!dispc_mgr_timings_ok(dssdev->dispc_channel, timings))
 277                 return -EINVAL;
 278
 279         return 0;
 280 }
 281
 282 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
 283                 struct omap_video_timings *timings)
 284 {
 285         mutex_lock(&hdmi.lock);
 286
 287         hdmi.cfg.timings = *timings;
 288
 289         dispc_set_tv_pclk(timings->pixelclock);
 290
 291         mutex_unlock(&hdmi.lock);
 292 }
 293
 294 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
 295                 struct omap_video_timings *timings)
 296 {
 297         *timings = hdmi.cfg.timings;
 298 }
 299
 300 static void hdmi_dump_regs(struct seq_file *s)
 301 {
 302         mutex_lock(&hdmi.lock);
 303
 304         if (hdmi_runtime_get()) {
 305                 mutex_unlock(&hdmi.lock);
 306                 return;
 307         }
 308
 309         hdmi_wp_dump(&hdmi.wp, s);
 310         hdmi_pll_dump(&hdmi.pll, s);
 311         hdmi_phy_dump(&hdmi.phy, s);
 312         hdmi5_core_dump(&hdmi.core, s);
 313
 314         hdmi_runtime_put();
 315         mutex_unlock(&hdmi.lock);
 316 }
 317
 318 static int read_edid(u8 *buf, int len)
 319 {
 320         int r;
 321         int idlemode;
 322
 323         mutex_lock(&hdmi.lock);
 324
 325         r = hdmi_runtime_get();
 326         BUG_ON(r);
 327
 328         idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
 329         /* No-idle mode */
 330         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
 331
 332         r = hdmi5_read_edid(&hdmi.core,  buf, len);
 333
 334         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
 335
 336         hdmi_runtime_put();
 337         mutex_unlock(&hdmi.lock);
 338
 339         return r;
 340 }
 341
 342 static void hdmi_start_audio_stream(struct omap_hdmi *hd)
 343 {
 344         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
 345         hdmi_wp_audio_enable(&hd->wp, true);
 346         hdmi_wp_audio_core_req_enable(&hd->wp, true);
 347 }
 348
 349 static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
 350 {
 351         hdmi_wp_audio_core_req_enable(&hd->wp, false);
 352         hdmi_wp_audio_enable(&hd->wp, false);
 353         REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
 354 }
 355
 356 static int hdmi_display_enable(struct omap_dss_device *dssdev)
 357 {
 358         struct omap_dss_device *out = &hdmi.output;
 359         unsigned long flags;
 360         int r = 0;
 361
 362         DSSDBG("ENTER hdmi_display_enable\n");
 363
 364         mutex_lock(&hdmi.lock);
 365
 366         if (!out->dispc_channel_connected) {
 367                 DSSERR("failed to enable display: no output/manager\n");
 368                 r = -ENODEV;
 369                 goto err0;
 370         }
 371
 372         r = hdmi_power_on_full(dssdev);
 373         if (r) {
 374                 DSSERR("failed to power on device\n");
 375                 goto err0;
 376         }
 377
 378         if (hdmi.audio_configured) {
 379                 r = hdmi5_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
 380                                        hdmi.cfg.timings.pixelclock);
 381                 if (r) {
 382                         DSSERR("Error restoring audio configuration: %d", r);
 383                         hdmi.audio_abort_cb(&hdmi.pdev->dev);
 384                         hdmi.audio_configured = false;
 385                 }
 386         }
 387
 388         spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
 389         if (hdmi.audio_configured && hdmi.audio_playing)
 390                 hdmi_start_audio_stream(&hdmi);
 391         hdmi.display_enabled = true;
 392         spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
 393
 394         mutex_unlock(&hdmi.lock);
 395         return 0;
 396
 397 err0:
 398         mutex_unlock(&hdmi.lock);
 399         return r;
 400 }
 401
 402 static void hdmi_display_disable(struct omap_dss_device *dssdev)
 403 {
 404         unsigned long flags;
 405
 406         DSSDBG("Enter hdmi_display_disable\n");
 407
 408         mutex_lock(&hdmi.lock);
 409
 410         spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
 411         hdmi_stop_audio_stream(&hdmi);
 412         hdmi.display_enabled = false;
 413         spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
 414
 415         hdmi_power_off_full(dssdev);
 416
 417         mutex_unlock(&hdmi.lock);
 418 }
 419
 420 static int hdmi_core_enable(struct omap_dss_device *dssdev)
 421 {
 422         int r = 0;
 423
 424         DSSDBG("ENTER omapdss_hdmi_core_enable\n");
 425
 426         mutex_lock(&hdmi.lock);
 427
 428         r = hdmi_power_on_core(dssdev);
 429         if (r) {
 430                 DSSERR("failed to power on device\n");
 431                 goto err0;
 432         }
 433
 434         mutex_unlock(&hdmi.lock);
 435         return 0;
 436
 437 err0:
 438         mutex_unlock(&hdmi.lock);
 439         return r;
 440 }
 441
 442 static void hdmi_core_disable(struct omap_dss_device *dssdev)
 443 {
 444         DSSDBG("Enter omapdss_hdmi_core_disable\n");
 445
 446         mutex_lock(&hdmi.lock);
 447
 448         hdmi_power_off_core(dssdev);
 449
 450         mutex_unlock(&hdmi.lock);
 451 }
 452
 453 static int hdmi_connect(struct omap_dss_device *dssdev,
 454                 struct omap_dss_device *dst)
 455 {
 456         enum omap_channel channel = dssdev->dispc_channel;
 457         int r;
 458
 459         r = hdmi_init_regulator();
 460         if (r)
 461                 return r;
 462
 463         r = dss_mgr_connect(channel, dssdev);
 464         if (r)
 465                 return r;
 466
 467         r = omapdss_output_set_device(dssdev, dst);
 468         if (r) {
 469                 DSSERR("failed to connect output to new device: %s\n",
 470                                 dst->name);
 471                 dss_mgr_disconnect(channel, dssdev);
 472                 return r;
 473         }
 474
 475         return 0;
 476 }
 477
 478 static void hdmi_disconnect(struct omap_dss_device *dssdev,
 479                 struct omap_dss_device *dst)
 480 {
 481         enum omap_channel channel = dssdev->dispc_channel;
 482
 483         WARN_ON(dst != dssdev->dst);
 484
 485         if (dst != dssdev->dst)
 486                 return;
 487
 488         omapdss_output_unset_device(dssdev);
 489
 490         dss_mgr_disconnect(channel, dssdev);
 491 }
 492
 493 static int hdmi_read_edid(struct omap_dss_device *dssdev,
 494                 u8 *edid, int len)
 495 {
 496         bool need_enable;
 497         int r;
 498
 499         need_enable = hdmi.core_enabled == false;
 500
 501         if (need_enable) {
 502                 r = hdmi_core_enable(dssdev);
 503                 if (r)
 504                         return r;
 505         }
 506
 507         r = read_edid(edid, len);
 508
 509         if (need_enable)
 510                 hdmi_core_disable(dssdev);
 511
 512         return r;
 513 }
 514
 515 static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
 516                 const struct hdmi_avi_infoframe *avi)
 517 {
 518         hdmi.cfg.infoframe = *avi;
 519         return 0;
 520 }
 521
 522 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
 523                 bool hdmi_mode)
 524 {
 525         hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
 526         return 0;
 527 }
 528
 529 static const struct omapdss_hdmi_ops hdmi_ops = {
 530         .connect                = hdmi_connect,
 531         .disconnect             = hdmi_disconnect,
 532
 533         .enable                 = hdmi_display_enable,
 534         .disable                = hdmi_display_disable,
 535
 536         .check_timings          = hdmi_display_check_timing,
 537         .set_timings            = hdmi_display_set_timing,
 538         .get_timings            = hdmi_display_get_timings,
 539
 540         .read_edid              = hdmi_read_edid,
 541         .set_infoframe          = hdmi_set_infoframe,
 542         .set_hdmi_mode          = hdmi_set_hdmi_mode,
 543 };
 544
 545 static void hdmi_init_output(struct platform_device *pdev)
 546 {
 547         struct omap_dss_device *out = &hdmi.output;
 548
 549         out->dev = &pdev->dev;
 550         out->id = OMAP_DSS_OUTPUT_HDMI;
 551         out->output_type = OMAP_DISPLAY_TYPE_HDMI;
 552         out->name = "hdmi.0";
 553         out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
 554         out->ops.hdmi = &hdmi_ops;
 555         out->owner = THIS_MODULE;
 556
 557         omapdss_register_output(out);
 558 }
 559
 560 static void hdmi_uninit_output(struct platform_device *pdev)
 561 {
 562         struct omap_dss_device *out = &hdmi.output;
 563
 564         omapdss_unregister_output(out);
 565 }
 566
 567 static int hdmi_probe_of(struct platform_device *pdev)
 568 {
 569         struct device_node *node = pdev->dev.of_node;
 570         struct device_node *ep;
 571         int r;
 572
 573         ep = omapdss_of_get_first_endpoint(node);
 574         if (!ep)
 575                 return 0;
 576
 577         r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
 578         if (r)
 579                 goto err;
 580
 581         of_node_put(ep);
 582         return 0;
 583
 584 err:
 585         of_node_put(ep);
 586         return r;
 587 }
 588
 589 /* Audio callbacks */
 590 static int hdmi_audio_startup(struct device *dev,
 591                               void (*abort_cb)(struct device *dev))
 592 {
 593         struct omap_hdmi *hd = dev_get_drvdata(dev);
 594         int ret = 0;
 595
 596         mutex_lock(&hd->lock);
 597
 598         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
 599                 ret = -EPERM;
 600                 goto out;
 601         }
 602
 603         hd->audio_abort_cb = abort_cb;
 604
 605 out:
 606         mutex_unlock(&hd->lock);
 607
 608         return ret;
 609 }
 610
 611 static int hdmi_audio_shutdown(struct device *dev)
 612 {
 613         struct omap_hdmi *hd = dev_get_drvdata(dev);
 614
 615         mutex_lock(&hd->lock);
 616         hd->audio_abort_cb = NULL;
 617         hd->audio_configured = false;
 618         hd->audio_playing = false;
 619         mutex_unlock(&hd->lock);
 620
 621         return 0;
 622 }
 623
 624 static int hdmi_audio_start(struct device *dev)
 625 {
 626         struct omap_hdmi *hd = dev_get_drvdata(dev);
 627         unsigned long flags;
 628
 629         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
 630
 631         spin_lock_irqsave(&hd->audio_playing_lock, flags);
 632
 633         if (hd->display_enabled)
 634                 hdmi_start_audio_stream(hd);
 635         hd->audio_playing = true;
 636
 637         spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
 638         return 0;
 639 }
 640
 641 static void hdmi_audio_stop(struct device *dev)
 642 {
 643         struct omap_hdmi *hd = dev_get_drvdata(dev);
 644         unsigned long flags;
 645
 646         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
 647
 648         spin_lock_irqsave(&hd->audio_playing_lock, flags);
 649
 650         if (hd->display_enabled)
 651                 hdmi_stop_audio_stream(hd);
 652         hd->audio_playing = false;
 653
 654         spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
 655 }
 656
 657 static int hdmi_audio_config(struct device *dev,
 658                              struct omap_dss_audio *dss_audio)
 659 {
 660         struct omap_hdmi *hd = dev_get_drvdata(dev);
 661         int ret;
 662
 663         mutex_lock(&hd->lock);
 664
 665         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
 666                 ret = -EPERM;
 667                 goto out;
 668         }
 669
 670         ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
 671                                  hd->cfg.timings.pixelclock);
 672
 673         if (!ret) {
 674                 hd->audio_configured = true;
 675                 hd->audio_config = *dss_audio;
 676         }
 677 out:
 678         mutex_unlock(&hd->lock);
 679
 680         return ret;
 681 }
 682
 683 static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
 684         .audio_startup = hdmi_audio_startup,
 685         .audio_shutdown = hdmi_audio_shutdown,
 686         .audio_start = hdmi_audio_start,
 687         .audio_stop = hdmi_audio_stop,
 688         .audio_config = hdmi_audio_config,
 689 };
 690
 691 static int hdmi_audio_register(struct device *dev)
 692 {
 693         struct omap_hdmi_audio_pdata pdata = {
 694                 .dev = dev,
 695                 .dss_version = omapdss_get_version(),
 696                 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
 697                 .ops = &hdmi_audio_ops,
 698         };
 699
 700         hdmi.audio_pdev = platform_device_register_data(
 701                 dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
 702                 &pdata, sizeof(pdata));
 703
 704         if (IS_ERR(hdmi.audio_pdev))
 705                 return PTR_ERR(hdmi.audio_pdev);
 706
 707         hdmi_runtime_get();
 708         hdmi.wp_idlemode =
 709                 REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
 710         hdmi_runtime_put();
 711
 712         return 0;
 713 }
 714
 715 /* HDMI HW IP initialisation */
 716 static int hdmi5_bind(struct device *dev, struct device *master, void *data)
 717 {
 718         struct platform_device *pdev = to_platform_device(dev);
 719         int r;
 720         int irq;
 721
 722         hdmi.pdev = pdev;
 723         dev_set_drvdata(&pdev->dev, &hdmi);
 724
 725         mutex_init(&hdmi.lock);
 726         spin_lock_init(&hdmi.audio_playing_lock);
 727
 728         if (pdev->dev.of_node) {
 729                 r = hdmi_probe_of(pdev);
 730                 if (r)
 731                         return r;
 732         }
 733
 734         r = hdmi_wp_init(pdev, &hdmi.wp);
 735         if (r)
 736                 return r;
 737
 738         r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
 739         if (r)
 740                 return r;
 741
 742         r = hdmi_phy_init(pdev, &hdmi.phy);
 743         if (r)
 744                 goto err;
 745
 746         r = hdmi5_core_init(pdev, &hdmi.core);
 747         if (r)
 748                 goto err;
 749
 750         irq = platform_get_irq(pdev, 0);
 751         if (irq < 0) {
 752                 DSSERR("platform_get_irq failed\n");
 753                 r = -ENODEV;
 754                 goto err;
 755         }
 756
 757         r = devm_request_threaded_irq(&pdev->dev, irq,
 758                         NULL, hdmi_irq_handler,
 759                         IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
 760         if (r) {
 761                 DSSERR("HDMI IRQ request failed\n");
 762                 goto err;
 763         }
 764
 765         pm_runtime_enable(&pdev->dev);
 766
 767         hdmi_init_output(pdev);
 768
 769         r = hdmi_audio_register(&pdev->dev);
 770         if (r) {
 771                 DSSERR("Registering HDMI audio failed %d\n", r);
 772                 hdmi_uninit_output(pdev);
 773                 pm_runtime_disable(&pdev->dev);
 774                 return r;
 775         }
 776
 777         dss_debugfs_create_file("hdmi", hdmi_dump_regs);
 778
 779         return 0;
 780 err:
 781         hdmi_pll_uninit(&hdmi.pll);
 782         return r;
 783 }
 784
 785 static void hdmi5_unbind(struct device *dev, struct device *master, void *data)
 786 {
 787         struct platform_device *pdev = to_platform_device(dev);
 788
 789         if (hdmi.audio_pdev)
 790                 platform_device_unregister(hdmi.audio_pdev);
 791
 792         hdmi_uninit_output(pdev);
 793
 794         hdmi_pll_uninit(&hdmi.pll);
 795
 796         pm_runtime_disable(&pdev->dev);
 797 }
 798
 799 static const struct component_ops hdmi5_component_ops = {
 800         .bind   = hdmi5_bind,
 801         .unbind = hdmi5_unbind,
 802 };
 803
 804 static int hdmi5_probe(struct platform_device *pdev)
 805 {
 806         return component_add(&pdev->dev, &hdmi5_component_ops);
 807 }
 808
 809 static int hdmi5_remove(struct platform_device *pdev)
 810 {
 811         component_del(&pdev->dev, &hdmi5_component_ops);
 812         return 0;
 813 }
 814
 815 static int hdmi_runtime_suspend(struct device *dev)
 816 {
 817         dispc_runtime_put();
 818
 819         return 0;
 820 }
 821
 822 static int hdmi_runtime_resume(struct device *dev)
 823 {
 824         int r;
 825
 826         r = dispc_runtime_get();
 827         if (r < 0)
 828                 return r;
 829
 830         return 0;
 831 }
 832
 833 static const struct dev_pm_ops hdmi_pm_ops = {
 834         .runtime_suspend = hdmi_runtime_suspend,
 835         .runtime_resume = hdmi_runtime_resume,
 836 };
 837
 838 static const struct of_device_id hdmi_of_match[] = {
 839         { .compatible = "ti,omap5-hdmi", },
 840         { .compatible = "ti,dra7-hdmi", },
 841         {},
 842 };
 843
 844 static struct platform_driver omapdss_hdmihw_driver = {
 845         .probe          = hdmi5_probe,
 846         .remove         = hdmi5_remove,
 847         .driver         = {
 848                 .name   = "omapdss_hdmi5",
 849                 .pm     = &hdmi_pm_ops,
 850                 .of_match_table = hdmi_of_match,
 851                 .suppress_bind_attrs = true,
 852         },
 853 };
 854
 855 int __init hdmi5_init_platform_driver(void)
 856 {
 857         return platform_driver_register(&omapdss_hdmihw_driver);
 858 }
 859
 860 void hdmi5_uninit_platform_driver(void)
 861 {
 862         platform_driver_unregister(&omapdss_hdmihw_driver);
 863 }