drivers/media/platform/coda/coda-bit.c

   1 /*
   2  * Coda multi-standard codec IP - BIT processor functions
   3  *
   4  * Copyright (C) 2012 Vista Silicon S.L.
   5  *    Javier Martin, <javier.martin@vista-silicon.com>
   6  *    Xavier Duret
   7  * Copyright (C) 2012-2014 Philipp Zabel, Pengutronix
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/irqreturn.h>
  17 #include <linux/kernel.h>
  18 #include <linux/log2.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/reset.h>
  21 #include <linux/slab.h>
  22 #include <linux/videodev2.h>
  23
  24 #include <media/v4l2-common.h>
  25 #include <media/v4l2-ctrls.h>
  26 #include <media/v4l2-fh.h>
  27 #include <media/v4l2-mem2mem.h>
  28 #include <media/videobuf2-v4l2.h>
  29 #include <media/videobuf2-dma-contig.h>
  30 #include <media/videobuf2-vmalloc.h>
  31
  32 #include "coda.h"
  33 #include "imx-vdoa.h"
  34 #define CREATE_TRACE_POINTS
  35 #include "trace.h"
  36
  37 #define CODA_PARA_BUF_SIZE      (10 * 1024)
  38 #define CODA7_PS_BUF_SIZE       0x28000
  39 #define CODA9_PS_SAVE_SIZE      (512 * 1024)
  40
  41 #define CODA_DEFAULT_GAMMA      4096
  42 #define CODA9_DEFAULT_GAMMA     24576   /* 0.75 * 32768 */
  43
  44 static void coda_free_bitstream_buffer(struct coda_ctx *ctx);
  45
  46 static inline int coda_is_initialized(struct coda_dev *dev)
  47 {
  48         return coda_read(dev, CODA_REG_BIT_CUR_PC) != 0;
  49 }
  50
  51 static inline unsigned long coda_isbusy(struct coda_dev *dev)
  52 {
  53         return coda_read(dev, CODA_REG_BIT_BUSY);
  54 }
  55
  56 static int coda_wait_timeout(struct coda_dev *dev)
  57 {
  58         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  59
  60         while (coda_isbusy(dev)) {
  61                 if (time_after(jiffies, timeout))
  62                         return -ETIMEDOUT;
  63         }
  64         return 0;
  65 }
  66
  67 static void coda_command_async(struct coda_ctx *ctx, int cmd)
  68 {
  69         struct coda_dev *dev = ctx->dev;
  70
  71         if (dev->devtype->product == CODA_960 ||
  72             dev->devtype->product == CODA_7541) {
  73                 /* Restore context related registers to CODA */
  74                 coda_write(dev, ctx->bit_stream_param,
  75                                 CODA_REG_BIT_BIT_STREAM_PARAM);
  76                 coda_write(dev, ctx->frm_dis_flg,
  77                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  78                 coda_write(dev, ctx->frame_mem_ctrl,
  79                                 CODA_REG_BIT_FRAME_MEM_CTRL);
  80                 coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
  81         }
  82
  83         if (dev->devtype->product == CODA_960) {
  84                 coda_write(dev, 1, CODA9_GDI_WPROT_ERR_CLR);
  85                 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
  86         }
  87
  88         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  89
  90         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
  91         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
  92         coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
  93
  94         trace_coda_bit_run(ctx, cmd);
  95
  96         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
  97 }
  98
  99 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
 100 {
 101         struct coda_dev *dev = ctx->dev;
 102         int ret;
 103
 104         coda_command_async(ctx, cmd);
 105         ret = coda_wait_timeout(dev);
 106         trace_coda_bit_done(ctx);
 107
 108         return ret;
 109 }
 110
 111 int coda_hw_reset(struct coda_ctx *ctx)
 112 {
 113         struct coda_dev *dev = ctx->dev;
 114         unsigned long timeout;
 115         unsigned int idx;
 116         int ret;
 117
 118         if (!dev->rstc)
 119                 return -ENOENT;
 120
 121         idx = coda_read(dev, CODA_REG_BIT_RUN_INDEX);
 122
 123         if (dev->devtype->product == CODA_960) {
 124                 timeout = jiffies + msecs_to_jiffies(100);
 125                 coda_write(dev, 0x11, CODA9_GDI_BUS_CTRL);
 126                 while (coda_read(dev, CODA9_GDI_BUS_STATUS) != 0x77) {
 127                         if (time_after(jiffies, timeout))
 128                                 return -ETIME;
 129                         cpu_relax();
 130                 }
 131         }
 132
 133         ret = reset_control_reset(dev->rstc);
 134         if (ret < 0)
 135                 return ret;
 136
 137         if (dev->devtype->product == CODA_960)
 138                 coda_write(dev, 0x00, CODA9_GDI_BUS_CTRL);
 139         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 140         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
 141         ret = coda_wait_timeout(dev);
 142         coda_write(dev, idx, CODA_REG_BIT_RUN_INDEX);
 143
 144         return ret;
 145 }
 146
 147 static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
 148 {
 149         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 150         struct coda_dev *dev = ctx->dev;
 151         u32 rd_ptr;
 152
 153         rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 154         kfifo->out = (kfifo->in & ~kfifo->mask) |
 155                       (rd_ptr - ctx->bitstream.paddr);
 156         if (kfifo->out > kfifo->in)
 157                 kfifo->out -= kfifo->mask + 1;
 158 }
 159
 160 static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
 161 {
 162         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 163         struct coda_dev *dev = ctx->dev;
 164         u32 rd_ptr, wr_ptr;
 165
 166         rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
 167         coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 168         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
 169         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 170 }
 171
 172 static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
 173 {
 174         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 175         struct coda_dev *dev = ctx->dev;
 176         u32 wr_ptr;
 177
 178         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
 179         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 180 }
 181
 182 static int coda_bitstream_pad(struct coda_ctx *ctx, u32 size)
 183 {
 184         unsigned char *buf;
 185         u32 n;
 186
 187         if (size < 6)
 188                 size = 6;
 189
 190         buf = kmalloc(size, GFP_KERNEL);
 191         if (!buf)
 192                 return -ENOMEM;
 193
 194         coda_h264_filler_nal(size, buf);
 195         n = kfifo_in(&ctx->bitstream_fifo, buf, size);
 196         kfree(buf);
 197
 198         return (n < size) ? -ENOSPC : 0;
 199 }
 200
 201 static int coda_bitstream_queue(struct coda_ctx *ctx,
 202                                 struct vb2_v4l2_buffer *src_buf)
 203 {
 204         u32 src_size = vb2_get_plane_payload(&src_buf->vb2_buf, 0);
 205         u32 n;
 206
 207         n = kfifo_in(&ctx->bitstream_fifo,
 208                         vb2_plane_vaddr(&src_buf->vb2_buf, 0), src_size);
 209         if (n < src_size)
 210                 return -ENOSPC;
 211
 212         src_buf->sequence = ctx->qsequence++;
 213
 214         return 0;
 215 }
 216
 217 static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
 218                                      struct vb2_v4l2_buffer *src_buf)
 219 {
 220         unsigned long payload = vb2_get_plane_payload(&src_buf->vb2_buf, 0);
 221         int ret;
 222
 223         if (coda_get_bitstream_payload(ctx) + payload + 512 >=
 224             ctx->bitstream.size)
 225                 return false;
 226
 227         if (vb2_plane_vaddr(&src_buf->vb2_buf, 0) == NULL) {
 228                 v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
 229                 return true;
 230         }
 231
 232         /* Add zero padding before the first H.264 buffer, if it is too small */
 233         if (ctx->qsequence == 0 && payload < 512 &&
 234             ctx->codec->src_fourcc == V4L2_PIX_FMT_H264)
 235                 coda_bitstream_pad(ctx, 512 - payload);
 236
 237         ret = coda_bitstream_queue(ctx, src_buf);
 238         if (ret < 0) {
 239                 v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
 240                 return false;
 241         }
 242         /* Sync read pointer to device */
 243         if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
 244                 coda_kfifo_sync_to_device_write(ctx);
 245
 246         ctx->hold = false;
 247
 248         return true;
 249 }
 250
 251 void coda_fill_bitstream(struct coda_ctx *ctx, struct list_head *buffer_list)
 252 {
 253         struct vb2_v4l2_buffer *src_buf;
 254         struct coda_buffer_meta *meta;
 255         unsigned long flags;
 256         u32 start;
 257
 258         if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG)
 259                 return;
 260
 261         while (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) > 0) {
 262                 /*
 263                  * Only queue a single JPEG into the bitstream buffer, except
 264                  * to increase payload over 512 bytes or if in hold state.
 265                  */
 266                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
 267                     (coda_get_bitstream_payload(ctx) >= 512) && !ctx->hold)
 268                         break;
 269
 270                 src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
 271
 272                 /* Drop frames that do not start/end with a SOI/EOI markers */
 273                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
 274                     !coda_jpeg_check_buffer(ctx, &src_buf->vb2_buf)) {
 275                         v4l2_err(&ctx->dev->v4l2_dev,
 276                                  "dropping invalid JPEG frame %d\n",
 277                                  ctx->qsequence);
 278                         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
 279                         if (buffer_list) {
 280                                 struct v4l2_m2m_buffer *m2m_buf;
 281
 282                                 m2m_buf = container_of(src_buf,
 283                                                        struct v4l2_m2m_buffer,
 284                                                        vb);
 285                                 list_add_tail(&m2m_buf->list, buffer_list);
 286                         } else {
 287                                 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_ERROR);
 288                         }
 289                         continue;
 290                 }
 291
 292                 /* Dump empty buffers */
 293                 if (!vb2_get_plane_payload(&src_buf->vb2_buf, 0)) {
 294                         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
 295                         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
 296                         continue;
 297                 }
 298
 299                 /* Buffer start position */
 300                 start = ctx->bitstream_fifo.kfifo.in &
 301                         ctx->bitstream_fifo.kfifo.mask;
 302
 303                 if (coda_bitstream_try_queue(ctx, src_buf)) {
 304                         /*
 305                          * Source buffer is queued in the bitstream ringbuffer;
 306                          * queue the timestamp and mark source buffer as done
 307                          */
 308                         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
 309
 310                         meta = kmalloc(sizeof(*meta), GFP_KERNEL);
 311                         if (meta) {
 312                                 meta->sequence = src_buf->sequence;
 313                                 meta->timecode = src_buf->timecode;
 314                                 meta->timestamp = src_buf->vb2_buf.timestamp;
 315                                 meta->start = start;
 316                                 meta->end = ctx->bitstream_fifo.kfifo.in &
 317                                             ctx->bitstream_fifo.kfifo.mask;
 318                                 spin_lock_irqsave(&ctx->buffer_meta_lock,
 319                                                   flags);
 320                                 list_add_tail(&meta->list,
 321                                               &ctx->buffer_meta_list);
 322                                 ctx->num_metas++;
 323                                 spin_unlock_irqrestore(&ctx->buffer_meta_lock,
 324                                                        flags);
 325
 326                                 trace_coda_bit_queue(ctx, src_buf, meta);
 327                         }
 328
 329                         if (buffer_list) {
 330                                 struct v4l2_m2m_buffer *m2m_buf;
 331
 332                                 m2m_buf = container_of(src_buf,
 333                                                        struct v4l2_m2m_buffer,
 334                                                        vb);
 335                                 list_add_tail(&m2m_buf->list, buffer_list);
 336                         } else {
 337                                 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
 338                         }
 339                 } else {
 340                         break;
 341                 }
 342         }
 343 }
 344
 345 void coda_bit_stream_end_flag(struct coda_ctx *ctx)
 346 {
 347         struct coda_dev *dev = ctx->dev;
 348
 349         ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
 350
 351         /* If this context is currently running, update the hardware flag */
 352         if ((dev->devtype->product == CODA_960) &&
 353             coda_isbusy(dev) &&
 354             (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
 355                 coda_write(dev, ctx->bit_stream_param,
 356                            CODA_REG_BIT_BIT_STREAM_PARAM);
 357         }
 358 }
 359
 360 static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
 361 {
 362         struct coda_dev *dev = ctx->dev;
 363         u32 *p = ctx->parabuf.vaddr;
 364
 365         if (dev->devtype->product == CODA_DX6)
 366                 p[index] = value;
 367         else
 368                 p[index ^ 1] = value;
 369 }
 370
 371 static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
 372                                          struct coda_aux_buf *buf, size_t size,
 373                                          const char *name)
 374 {
 375         return coda_alloc_aux_buf(ctx->dev, buf, size, name, ctx->debugfs_entry);
 376 }
 377
 378
 379 static void coda_free_framebuffers(struct coda_ctx *ctx)
 380 {
 381         int i;
 382
 383         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
 384                 coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
 385 }
 386
 387 static int coda_alloc_framebuffers(struct coda_ctx *ctx,
 388                                    struct coda_q_data *q_data, u32 fourcc)
 389 {
 390         struct coda_dev *dev = ctx->dev;
 391         int width, height;
 392         int ysize;
 393         int ret;
 394         int i;
 395
 396         if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 ||
 397             ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264) {
 398                 width = round_up(q_data->width, 16);
 399                 height = round_up(q_data->height, 16);
 400         } else {
 401                 width = round_up(q_data->width, 8);
 402                 height = q_data->height;
 403         }
 404         ysize = width * height;
 405
 406         /* Allocate frame buffers */
 407         for (i = 0; i < ctx->num_internal_frames; i++) {
 408                 size_t size;
 409                 char *name;
 410
 411                 if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
 412                         size = round_up(ysize, 4096) + ysize / 2;
 413                 else
 414                         size = ysize + ysize / 2;
 415                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
 416                     dev->devtype->product != CODA_DX6)
 417                         size += ysize / 4;
 418                 name = kasprintf(GFP_KERNEL, "fb%d", i);
 419                 ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i],
 420                                              size, name);
 421                 kfree(name);
 422                 if (ret < 0) {
 423                         coda_free_framebuffers(ctx);
 424                         return ret;
 425                 }
 426         }
 427
 428         /* Register frame buffers in the parameter buffer */
 429         for (i = 0; i < ctx->num_internal_frames; i++) {
 430                 u32 y, cb, cr, mvcol;
 431
 432                 /* Start addresses of Y, Cb, Cr planes */
 433                 y = ctx->internal_frames[i].paddr;
 434                 cb = y + ysize;
 435                 cr = y + ysize + ysize/4;
 436                 mvcol = y + ysize + ysize/4 + ysize/4;
 437                 if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP) {
 438                         cb = round_up(cb, 4096);
 439                         mvcol = cb + ysize/2;
 440                         cr = 0;
 441                         /* Packed 20-bit MSB of base addresses */
 442                         /* YYYYYCCC, CCyyyyyc, cccc.... */
 443                         y = (y & 0xfffff000) | cb >> 20;
 444                         cb = (cb & 0x000ff000) << 12;
 445                 }
 446                 coda_parabuf_write(ctx, i * 3 + 0, y);
 447                 coda_parabuf_write(ctx, i * 3 + 1, cb);
 448                 coda_parabuf_write(ctx, i * 3 + 2, cr);
 449
 450                 /* mvcol buffer for h.264 */
 451                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
 452                     dev->devtype->product != CODA_DX6)
 453                         coda_parabuf_write(ctx, 96 + i, mvcol);
 454         }
 455
 456         /* mvcol buffer for mpeg4 */
 457         if ((dev->devtype->product != CODA_DX6) &&
 458             (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
 459                 coda_parabuf_write(ctx, 97, ctx->internal_frames[0].paddr +
 460                                             ysize + ysize/4 + ysize/4);
 461
 462         return 0;
 463 }
 464
 465 static void coda_free_context_buffers(struct coda_ctx *ctx)
 466 {
 467         struct coda_dev *dev = ctx->dev;
 468
 469         coda_free_aux_buf(dev, &ctx->slicebuf);
 470         coda_free_aux_buf(dev, &ctx->psbuf);
 471         if (dev->devtype->product != CODA_DX6)
 472                 coda_free_aux_buf(dev, &ctx->workbuf);
 473         coda_free_aux_buf(dev, &ctx->parabuf);
 474 }
 475
 476 static int coda_alloc_context_buffers(struct coda_ctx *ctx,
 477                                       struct coda_q_data *q_data)
 478 {
 479         struct coda_dev *dev = ctx->dev;
 480         size_t size;
 481         int ret;
 482
 483         if (!ctx->parabuf.vaddr) {
 484                 ret = coda_alloc_context_buf(ctx, &ctx->parabuf,
 485                                              CODA_PARA_BUF_SIZE, "parabuf");
 486                 if (ret < 0)
 487                         return ret;
 488         }
 489
 490         if (dev->devtype->product == CODA_DX6)
 491                 return 0;
 492
 493         if (!ctx->slicebuf.vaddr && q_data->fourcc == V4L2_PIX_FMT_H264) {
 494                 /* worst case slice size */
 495                 size = (DIV_ROUND_UP(q_data->width, 16) *
 496                         DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
 497                 ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size,
 498                                              "slicebuf");
 499                 if (ret < 0)
 500                         goto err;
 501         }
 502
 503         if (!ctx->psbuf.vaddr && dev->devtype->product == CODA_7541) {
 504                 ret = coda_alloc_context_buf(ctx, &ctx->psbuf,
 505                                              CODA7_PS_BUF_SIZE, "psbuf");
 506                 if (ret < 0)
 507                         goto err;
 508         }
 509
 510         if (!ctx->workbuf.vaddr) {
 511                 size = dev->devtype->workbuf_size;
 512                 if (dev->devtype->product == CODA_960 &&
 513                     q_data->fourcc == V4L2_PIX_FMT_H264)
 514                         size += CODA9_PS_SAVE_SIZE;
 515                 ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size,
 516                                              "workbuf");
 517                 if (ret < 0)
 518                         goto err;
 519         }
 520
 521         return 0;
 522
 523 err:
 524         coda_free_context_buffers(ctx);
 525         return ret;
 526 }
 527
 528 static int coda_encode_header(struct coda_ctx *ctx, struct vb2_v4l2_buffer *buf,
 529                               int header_code, u8 *header, int *size)
 530 {
 531         struct vb2_buffer *vb = &buf->vb2_buf;
 532         struct coda_dev *dev = ctx->dev;
 533         size_t bufsize;
 534         int ret;
 535         int i;
 536
 537         if (dev->devtype->product == CODA_960)
 538                 memset(vb2_plane_vaddr(vb, 0), 0, 64);
 539
 540         coda_write(dev, vb2_dma_contig_plane_dma_addr(vb, 0),
 541                    CODA_CMD_ENC_HEADER_BB_START);
 542         bufsize = vb2_plane_size(vb, 0);
 543         if (dev->devtype->product == CODA_960)
 544                 bufsize /= 1024;
 545         coda_write(dev, bufsize, CODA_CMD_ENC_HEADER_BB_SIZE);
 546         coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
 547         ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
 548         if (ret < 0) {
 549                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
 550                 return ret;
 551         }
 552
 553         if (dev->devtype->product == CODA_960) {
 554                 for (i = 63; i > 0; i--)
 555                         if (((char *)vb2_plane_vaddr(vb, 0))[i] != 0)
 556                                 break;
 557                 *size = i + 1;
 558         } else {
 559                 *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
 560                         coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
 561         }
 562         memcpy(header, vb2_plane_vaddr(vb, 0), *size);
 563
 564         return 0;
 565 }
 566
 567 static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size)
 568 {
 569         phys_addr_t ret;
 570
 571         size = round_up(size, 1024);
 572         if (size > iram->remaining)
 573                 return 0;
 574         iram->remaining -= size;
 575
 576         ret = iram->next_paddr;
 577         iram->next_paddr += size;
 578
 579         return ret;
 580 }
 581
 582 static void coda_setup_iram(struct coda_ctx *ctx)
 583 {
 584         struct coda_iram_info *iram_info = &ctx->iram_info;
 585         struct coda_dev *dev = ctx->dev;
 586         int w64, w128;
 587         int mb_width;
 588         int dbk_bits;
 589         int bit_bits;
 590         int ip_bits;
 591
 592         memset(iram_info, 0, sizeof(*iram_info));
 593         iram_info->next_paddr = dev->iram.paddr;
 594         iram_info->remaining = dev->iram.size;
 595
 596         if (!dev->iram.vaddr)
 597                 return;
 598
 599         switch (dev->devtype->product) {
 600         case CODA_7541:
 601                 dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
 602                 bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
 603                 ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
 604                 break;
 605         case CODA_960:
 606                 dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE;
 607                 bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
 608                 ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
 609                 break;
 610         default: /* CODA_DX6 */
 611                 return;
 612         }
 613
 614         if (ctx->inst_type == CODA_INST_ENCODER) {
 615                 struct coda_q_data *q_data_src;
 616
 617                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 618                 mb_width = DIV_ROUND_UP(q_data_src->width, 16);
 619                 w128 = mb_width * 128;
 620                 w64 = mb_width * 64;
 621
 622                 /* Prioritize in case IRAM is too small for everything */
 623                 if (dev->devtype->product == CODA_7541) {
 624                         iram_info->search_ram_size = round_up(mb_width * 16 *
 625                                                               36 + 2048, 1024);
 626                         iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
 627                                                 iram_info->search_ram_size);
 628                         if (!iram_info->search_ram_paddr) {
 629                                 pr_err("IRAM is smaller than the search ram size\n");
 630                                 goto out;
 631                         }
 632                         iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE |
 633                                                    CODA7_USE_ME_ENABLE;
 634                 }
 635
 636                 /* Only H.264BP and H.263P3 are considered */
 637                 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w64);
 638                 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w64);
 639                 if (!iram_info->buf_dbk_c_use)
 640                         goto out;
 641                 iram_info->axi_sram_use |= dbk_bits;
 642
 643                 iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
 644                 if (!iram_info->buf_bit_use)
 645                         goto out;
 646                 iram_info->axi_sram_use |= bit_bits;
 647
 648                 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
 649                 if (!iram_info->buf_ip_ac_dc_use)
 650                         goto out;
 651                 iram_info->axi_sram_use |= ip_bits;
 652
 653                 /* OVL and BTP disabled for encoder */
 654         } else if (ctx->inst_type == CODA_INST_DECODER) {
 655                 struct coda_q_data *q_data_dst;
 656
 657                 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 658                 mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
 659                 w128 = mb_width * 128;
 660
 661                 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w128);
 662                 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w128);
 663                 if (!iram_info->buf_dbk_c_use)
 664                         goto out;
 665                 iram_info->axi_sram_use |= dbk_bits;
 666
 667                 iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
 668                 if (!iram_info->buf_bit_use)
 669                         goto out;
 670                 iram_info->axi_sram_use |= bit_bits;
 671
 672                 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
 673                 if (!iram_info->buf_ip_ac_dc_use)
 674                         goto out;
 675                 iram_info->axi_sram_use |= ip_bits;
 676
 677                 /* OVL and BTP unused as there is no VC1 support yet */
 678         }
 679
 680 out:
 681         if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
 682                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 683                          "IRAM smaller than needed\n");
 684
 685         if (dev->devtype->product == CODA_7541) {
 686                 /* TODO - Enabling these causes picture errors on CODA7541 */
 687                 if (ctx->inst_type == CODA_INST_DECODER) {
 688                         /* fw 1.4.50 */
 689                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
 690                                                      CODA7_USE_IP_ENABLE);
 691                 } else {
 692                         /* fw 13.4.29 */
 693                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
 694                                                      CODA7_USE_HOST_DBK_ENABLE |
 695                                                      CODA7_USE_IP_ENABLE |
 696                                                      CODA7_USE_DBK_ENABLE);
 697                 }
 698         }
 699 }
 700
 701 static u32 coda_supported_firmwares[] = {
 702         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
 703         CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
 704         CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5),
 705 };
 706
 707 static bool coda_firmware_supported(u32 vernum)
 708 {
 709         int i;
 710
 711         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
 712                 if (vernum == coda_supported_firmwares[i])
 713                         return true;
 714         return false;
 715 }
 716
 717 int coda_check_firmware(struct coda_dev *dev)
 718 {
 719         u16 product, major, minor, release;
 720         u32 data;
 721         int ret;
 722
 723         ret = clk_prepare_enable(dev->clk_per);
 724         if (ret)
 725                 goto err_clk_per;
 726
 727         ret = clk_prepare_enable(dev->clk_ahb);
 728         if (ret)
 729                 goto err_clk_ahb;
 730
 731         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
 732         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 733         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
 734         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
 735         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
 736         if (coda_wait_timeout(dev)) {
 737                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
 738                 ret = -EIO;
 739                 goto err_run_cmd;
 740         }
 741
 742         if (dev->devtype->product == CODA_960) {
 743                 data = coda_read(dev, CODA9_CMD_FIRMWARE_CODE_REV);
 744                 v4l2_info(&dev->v4l2_dev, "Firmware code revision: %d\n",
 745                           data);
 746         }
 747
 748         /* Check we are compatible with the loaded firmware */
 749         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
 750         product = CODA_FIRMWARE_PRODUCT(data);
 751         major = CODA_FIRMWARE_MAJOR(data);
 752         minor = CODA_FIRMWARE_MINOR(data);
 753         release = CODA_FIRMWARE_RELEASE(data);
 754
 755         clk_disable_unprepare(dev->clk_per);
 756         clk_disable_unprepare(dev->clk_ahb);
 757
 758         if (product != dev->devtype->product) {
 759                 v4l2_err(&dev->v4l2_dev,
 760                          "Wrong firmware. Hw: %s, Fw: %s, Version: %u.%u.%u\n",
 761                          coda_product_name(dev->devtype->product),
 762                          coda_product_name(product), major, minor, release);
 763                 return -EINVAL;
 764         }
 765
 766         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
 767                   coda_product_name(product));
 768
 769         if (coda_firmware_supported(data)) {
 770                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
 771                           major, minor, release);
 772         } else {
 773                 v4l2_warn(&dev->v4l2_dev,
 774                           "Unsupported firmware version: %u.%u.%u\n",
 775                           major, minor, release);
 776         }
 777
 778         return 0;
 779
 780 err_run_cmd:
 781         clk_disable_unprepare(dev->clk_ahb);
 782 err_clk_ahb:
 783         clk_disable_unprepare(dev->clk_per);
 784 err_clk_per:
 785         return ret;
 786 }
 787
 788 static void coda9_set_frame_cache(struct coda_ctx *ctx, u32 fourcc)
 789 {
 790         u32 cache_size, cache_config;
 791
 792         if (ctx->tiled_map_type == GDI_LINEAR_FRAME_MAP) {
 793                 /* Luma 2x0 page, 2x6 cache, chroma 2x0 page, 2x4 cache size */
 794                 cache_size = 0x20262024;
 795                 cache_config = 2 << CODA9_CACHE_PAGEMERGE_OFFSET;
 796         } else {
 797                 /* Luma 0x2 page, 4x4 cache, chroma 0x2 page, 4x3 cache size */
 798                 cache_size = 0x02440243;
 799                 cache_config = 1 << CODA9_CACHE_PAGEMERGE_OFFSET;
 800         }
 801         coda_write(ctx->dev, cache_size, CODA9_CMD_SET_FRAME_CACHE_SIZE);
 802         if (fourcc == V4L2_PIX_FMT_NV12 || fourcc == V4L2_PIX_FMT_YUYV) {
 803                 cache_config |= 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
 804                                 16 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET |
 805                                 0 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET;
 806         } else {
 807                 cache_config |= 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
 808                                 8 << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET |
 809                                 8 << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET;
 810         }
 811         coda_write(ctx->dev, cache_config, CODA9_CMD_SET_FRAME_CACHE_CONFIG);
 812 }
 813
 814 /*
 815  * Encoder context operations
 816  */
 817
 818 static int coda_encoder_reqbufs(struct coda_ctx *ctx,
 819                                 struct v4l2_requestbuffers *rb)
 820 {
 821         struct coda_q_data *q_data_src;
 822         int ret;
 823
 824         if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
 825                 return 0;
 826
 827         if (rb->count) {
 828                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 829                 ret = coda_alloc_context_buffers(ctx, q_data_src);
 830                 if (ret < 0)
 831                         return ret;
 832         } else {
 833                 coda_free_context_buffers(ctx);
 834         }
 835
 836         return 0;
 837 }
 838
 839 static int coda_start_encoding(struct coda_ctx *ctx)
 840 {
 841         struct coda_dev *dev = ctx->dev;
 842         struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
 843         struct coda_q_data *q_data_src, *q_data_dst;
 844         u32 bitstream_buf, bitstream_size;
 845         struct vb2_v4l2_buffer *buf;
 846         int gamma, ret, value;
 847         u32 dst_fourcc;
 848         int num_fb;
 849         u32 stride;
 850
 851         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 852         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 853         dst_fourcc = q_data_dst->fourcc;
 854
 855         buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
 856         bitstream_buf = vb2_dma_contig_plane_dma_addr(&buf->vb2_buf, 0);
 857         bitstream_size = q_data_dst->sizeimage;
 858
 859         if (!coda_is_initialized(dev)) {
 860                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
 861                 return -EFAULT;
 862         }
 863
 864         if (dst_fourcc == V4L2_PIX_FMT_JPEG) {
 865                 if (!ctx->params.jpeg_qmat_tab[0])
 866                         ctx->params.jpeg_qmat_tab[0] = kmalloc(64, GFP_KERNEL);
 867                 if (!ctx->params.jpeg_qmat_tab[1])
 868                         ctx->params.jpeg_qmat_tab[1] = kmalloc(64, GFP_KERNEL);
 869                 coda_set_jpeg_compression_quality(ctx, ctx->params.jpeg_quality);
 870         }
 871
 872         mutex_lock(&dev->coda_mutex);
 873
 874         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
 875         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 876         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 877         switch (dev->devtype->product) {
 878         case CODA_DX6:
 879                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
 880                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
 881                 break;
 882         case CODA_960:
 883                 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
 884                 /* fallthrough */
 885         case CODA_7541:
 886                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
 887                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
 888                 break;
 889         }
 890
 891         ctx->frame_mem_ctrl &= ~(CODA_FRAME_CHROMA_INTERLEAVE | (0x3 << 9) |
 892                                  CODA9_FRAME_TILED2LINEAR);
 893         if (q_data_src->fourcc == V4L2_PIX_FMT_NV12)
 894                 ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
 895         if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
 896                 ctx->frame_mem_ctrl |= (0x3 << 9) | CODA9_FRAME_TILED2LINEAR;
 897         coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
 898
 899         if (dev->devtype->product == CODA_DX6) {
 900                 /* Configure the coda */
 901                 coda_write(dev, dev->iram.paddr,
 902                            CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
 903         }
 904
 905         /* Could set rotation here if needed */
 906         value = 0;
 907         switch (dev->devtype->product) {
 908         case CODA_DX6:
 909                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK)
 910                         << CODADX6_PICWIDTH_OFFSET;
 911                 value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK)
 912                          << CODA_PICHEIGHT_OFFSET;
 913                 break;
 914         case CODA_7541:
 915                 if (dst_fourcc == V4L2_PIX_FMT_H264) {
 916                         value = (round_up(q_data_src->width, 16) &
 917                                  CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
 918                         value |= (round_up(q_data_src->height, 16) &
 919                                  CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
 920                         break;
 921                 }
 922                 /* fallthrough */
 923         case CODA_960:
 924                 value = (q_data_src->width & CODA7_PICWIDTH_MASK)
 925                         << CODA7_PICWIDTH_OFFSET;
 926                 value |= (q_data_src->height & CODA7_PICHEIGHT_MASK)
 927                          << CODA_PICHEIGHT_OFFSET;
 928         }
 929         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
 930         if (dst_fourcc == V4L2_PIX_FMT_JPEG)
 931                 ctx->params.framerate = 0;
 932         coda_write(dev, ctx->params.framerate,
 933                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
 934
 935         ctx->params.codec_mode = ctx->codec->mode;
 936         switch (dst_fourcc) {
 937         case V4L2_PIX_FMT_MPEG4:
 938                 if (dev->devtype->product == CODA_960)
 939                         coda_write(dev, CODA9_STD_MPEG4,
 940                                    CODA_CMD_ENC_SEQ_COD_STD);
 941                 else
 942                         coda_write(dev, CODA_STD_MPEG4,
 943                                    CODA_CMD_ENC_SEQ_COD_STD);
 944                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
 945                 break;
 946         case V4L2_PIX_FMT_H264:
 947                 if (dev->devtype->product == CODA_960)
 948                         coda_write(dev, CODA9_STD_H264,
 949                                    CODA_CMD_ENC_SEQ_COD_STD);
 950                 else
 951                         coda_write(dev, CODA_STD_H264,
 952                                    CODA_CMD_ENC_SEQ_COD_STD);
 953                 if (ctx->params.h264_deblk_enabled) {
 954                         value = ((ctx->params.h264_deblk_alpha &
 955                                   CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) <<
 956                                  CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) |
 957                                 ((ctx->params.h264_deblk_beta &
 958                                   CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) <<
 959                                  CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET);
 960                 } else {
 961                         value = 1 << CODA_264PARAM_DISABLEDEBLK_OFFSET;
 962                 }
 963                 coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA);
 964                 break;
 965         case V4L2_PIX_FMT_JPEG:
 966                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_PARA);
 967                 coda_write(dev, ctx->params.jpeg_restart_interval,
 968                                 CODA_CMD_ENC_SEQ_JPG_RST_INTERVAL);
 969                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_EN);
 970                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_SIZE);
 971                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_OFFSET);
 972
 973                 coda_jpeg_write_tables(ctx);
 974                 break;
 975         default:
 976                 v4l2_err(v4l2_dev,
 977                          "dst format (0x%08x) invalid.\n", dst_fourcc);
 978                 ret = -EINVAL;
 979                 goto out;
 980         }
 981
 982         /*
 983          * slice mode and GOP size registers are used for thumb size/offset
 984          * in JPEG mode
 985          */
 986         if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
 987                 switch (ctx->params.slice_mode) {
 988                 case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
 989                         value = 0;
 990                         break;
 991                 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
 992                         value  = (ctx->params.slice_max_mb &
 993                                   CODA_SLICING_SIZE_MASK)
 994                                  << CODA_SLICING_SIZE_OFFSET;
 995                         value |= (1 & CODA_SLICING_UNIT_MASK)
 996                                  << CODA_SLICING_UNIT_OFFSET;
 997                         value |=  1 & CODA_SLICING_MODE_MASK;
 998                         break;
 999                 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
1000                         value  = (ctx->params.slice_max_bits &
1001                                   CODA_SLICING_SIZE_MASK)
1002                                  << CODA_SLICING_SIZE_OFFSET;
1003                         value |= (0 & CODA_SLICING_UNIT_MASK)
1004                                  << CODA_SLICING_UNIT_OFFSET;
1005                         value |=  1 & CODA_SLICING_MODE_MASK;
1006                         break;
1007                 }
1008                 coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
1009                 value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
1010                 coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
1011         }
1012
1013         if (ctx->params.bitrate) {
1014                 /* Rate control enabled */
1015                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK)
1016                         << CODA_RATECONTROL_BITRATE_OFFSET;
1017                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
1018                 value |= (ctx->params.vbv_delay &
1019                           CODA_RATECONTROL_INITIALDELAY_MASK)
1020                          << CODA_RATECONTROL_INITIALDELAY_OFFSET;
1021                 if (dev->devtype->product == CODA_960)
1022                         value |= BIT(31); /* disable autoskip */
1023         } else {
1024                 value = 0;
1025         }
1026         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
1027
1028         coda_write(dev, ctx->params.vbv_size, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
1029         coda_write(dev, ctx->params.intra_refresh,
1030                    CODA_CMD_ENC_SEQ_INTRA_REFRESH);
1031
1032         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
1033         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
1034
1035
1036         value = 0;
1037         if (dev->devtype->product == CODA_960)
1038                 gamma = CODA9_DEFAULT_GAMMA;
1039         else
1040                 gamma = CODA_DEFAULT_GAMMA;
1041         if (gamma > 0) {
1042                 coda_write(dev, (gamma & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET,
1043                            CODA_CMD_ENC_SEQ_RC_GAMMA);
1044         }
1045
1046         if (ctx->params.h264_min_qp || ctx->params.h264_max_qp) {
1047                 coda_write(dev,
1048                            ctx->params.h264_min_qp << CODA_QPMIN_OFFSET |
1049                            ctx->params.h264_max_qp << CODA_QPMAX_OFFSET,
1050                            CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX);
1051         }
1052         if (dev->devtype->product == CODA_960) {
1053                 if (ctx->params.h264_max_qp)
1054                         value |= 1 << CODA9_OPTION_RCQPMAX_OFFSET;
1055                 if (CODA_DEFAULT_GAMMA > 0)
1056                         value |= 1 << CODA9_OPTION_GAMMA_OFFSET;
1057         } else {
1058                 if (CODA_DEFAULT_GAMMA > 0) {
1059                         if (dev->devtype->product == CODA_DX6)
1060                                 value |= 1 << CODADX6_OPTION_GAMMA_OFFSET;
1061                         else
1062                                 value |= 1 << CODA7_OPTION_GAMMA_OFFSET;
1063                 }
1064                 if (ctx->params.h264_min_qp)
1065                         value |= 1 << CODA7_OPTION_RCQPMIN_OFFSET;
1066                 if (ctx->params.h264_max_qp)
1067                         value |= 1 << CODA7_OPTION_RCQPMAX_OFFSET;
1068         }
1069         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1070
1071         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE);
1072
1073         coda_setup_iram(ctx);
1074
1075         if (dst_fourcc == V4L2_PIX_FMT_H264) {
1076                 switch (dev->devtype->product) {
1077                 case CODA_DX6:
1078                         value = FMO_SLICE_SAVE_BUF_SIZE << 7;
1079                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1080                         break;
1081                 case CODA_7541:
1082                         coda_write(dev, ctx->iram_info.search_ram_paddr,
1083                                         CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1084                         coda_write(dev, ctx->iram_info.search_ram_size,
1085                                         CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1086                         break;
1087                 case CODA_960:
1088                         coda_write(dev, 0, CODA9_CMD_ENC_SEQ_ME_OPTION);
1089                         coda_write(dev, 0, CODA9_CMD_ENC_SEQ_INTRA_WEIGHT);
1090                 }
1091         }
1092
1093         ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
1094         if (ret < 0) {
1095                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1096                 goto out;
1097         }
1098
1099         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
1100                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
1101                 ret = -EFAULT;
1102                 goto out;
1103         }
1104         ctx->initialized = 1;
1105
1106         if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
1107                 if (dev->devtype->product == CODA_960)
1108                         ctx->num_internal_frames = 4;
1109                 else
1110                         ctx->num_internal_frames = 2;
1111                 ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1112                 if (ret < 0) {
1113                         v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
1114                         goto out;
1115                 }
1116                 num_fb = 2;
1117                 stride = q_data_src->bytesperline;
1118         } else {
1119                 ctx->num_internal_frames = 0;
1120                 num_fb = 0;
1121                 stride = 0;
1122         }
1123         coda_write(dev, num_fb, CODA_CMD_SET_FRAME_BUF_NUM);
1124         coda_write(dev, stride, CODA_CMD_SET_FRAME_BUF_STRIDE);
1125
1126         if (dev->devtype->product == CODA_7541) {
1127                 coda_write(dev, q_data_src->bytesperline,
1128                                 CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1129         }
1130         if (dev->devtype->product != CODA_DX6) {
1131                 coda_write(dev, ctx->iram_info.buf_bit_use,
1132                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1133                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1134                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1135                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1136                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1137                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1138                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1139                 coda_write(dev, ctx->iram_info.buf_ovl_use,
1140                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1141                 if (dev->devtype->product == CODA_960) {
1142                         coda_write(dev, ctx->iram_info.buf_btp_use,
1143                                         CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
1144
1145                         coda9_set_frame_cache(ctx, q_data_src->fourcc);
1146
1147                         /* FIXME */
1148                         coda_write(dev, ctx->internal_frames[2].paddr,
1149                                    CODA9_CMD_SET_FRAME_SUBSAMP_A);
1150                         coda_write(dev, ctx->internal_frames[3].paddr,
1151                                    CODA9_CMD_SET_FRAME_SUBSAMP_B);
1152                 }
1153         }
1154
1155         ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
1156         if (ret < 0) {
1157                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1158                 goto out;
1159         }
1160
1161         /* Save stream headers */
1162         buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1163         switch (dst_fourcc) {
1164         case V4L2_PIX_FMT_H264:
1165                 /*
1166                  * Get SPS in the first frame and copy it to an
1167                  * intermediate buffer.
1168                  */
1169                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
1170                                          &ctx->vpu_header[0][0],
1171                                          &ctx->vpu_header_size[0]);
1172                 if (ret < 0)
1173                         goto out;
1174
1175                 /*
1176                  * Get PPS in the first frame and copy it to an
1177                  * intermediate buffer.
1178                  */
1179                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
1180                                          &ctx->vpu_header[1][0],
1181                                          &ctx->vpu_header_size[1]);
1182                 if (ret < 0)
1183                         goto out;
1184
1185                 /*
1186                  * Length of H.264 headers is variable and thus it might not be
1187                  * aligned for the coda to append the encoded frame. In that is
1188                  * the case a filler NAL must be added to header 2.
1189                  */
1190                 ctx->vpu_header_size[2] = coda_h264_padding(
1191                                         (ctx->vpu_header_size[0] +
1192                                          ctx->vpu_header_size[1]),
1193                                          ctx->vpu_header[2]);
1194                 break;
1195         case V4L2_PIX_FMT_MPEG4:
1196                 /*
1197                  * Get VOS in the first frame and copy it to an
1198                  * intermediate buffer
1199                  */
1200                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
1201                                          &ctx->vpu_header[0][0],
1202                                          &ctx->vpu_header_size[0]);
1203                 if (ret < 0)
1204                         goto out;
1205
1206                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
1207                                          &ctx->vpu_header[1][0],
1208                                          &ctx->vpu_header_size[1]);
1209                 if (ret < 0)
1210                         goto out;
1211
1212                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
1213                                          &ctx->vpu_header[2][0],
1214                                          &ctx->vpu_header_size[2]);
1215                 if (ret < 0)
1216                         goto out;
1217                 break;
1218         default:
1219                 /* No more formats need to save headers at the moment */
1220                 break;
1221         }
1222
1223 out:
1224         mutex_unlock(&dev->coda_mutex);
1225         return ret;
1226 }
1227
1228 static int coda_prepare_encode(struct coda_ctx *ctx)
1229 {
1230         struct coda_q_data *q_data_src, *q_data_dst;
1231         struct vb2_v4l2_buffer *src_buf, *dst_buf;
1232         struct coda_dev *dev = ctx->dev;
1233         int force_ipicture;
1234         int quant_param = 0;
1235         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1236         u32 rot_mode = 0;
1237         u32 dst_fourcc;
1238         u32 reg;
1239
1240         src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
1241         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1242         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1243         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1244         dst_fourcc = q_data_dst->fourcc;
1245
1246         src_buf->sequence = ctx->osequence;
1247         dst_buf->sequence = ctx->osequence;
1248         ctx->osequence++;
1249
1250         force_ipicture = ctx->params.force_ipicture;
1251         if (force_ipicture)
1252                 ctx->params.force_ipicture = false;
1253         else if ((src_buf->sequence % ctx->params.gop_size) == 0)
1254                 force_ipicture = 1;
1255
1256         /*
1257          * Workaround coda firmware BUG that only marks the first
1258          * frame as IDR. This is a problem for some decoders that can't
1259          * recover when a frame is lost.
1260          */
1261         if (!force_ipicture) {
1262                 src_buf->flags |= V4L2_BUF_FLAG_PFRAME;
1263                 src_buf->flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1264         } else {
1265                 src_buf->flags |= V4L2_BUF_FLAG_KEYFRAME;
1266                 src_buf->flags &= ~V4L2_BUF_FLAG_PFRAME;
1267         }
1268
1269         if (dev->devtype->product == CODA_960)
1270                 coda_set_gdi_regs(ctx);
1271
1272         /*
1273          * Copy headers in front of the first frame and forced I frames for
1274          * H.264 only. In MPEG4 they are already copied by the CODA.
1275          */
1276         if (src_buf->sequence == 0 || force_ipicture) {
1277                 pic_stream_buffer_addr =
1278                         vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0) +
1279                         ctx->vpu_header_size[0] +
1280                         ctx->vpu_header_size[1] +
1281                         ctx->vpu_header_size[2];
1282                 pic_stream_buffer_size = q_data_dst->sizeimage -
1283                         ctx->vpu_header_size[0] -
1284                         ctx->vpu_header_size[1] -
1285                         ctx->vpu_header_size[2];
1286                 memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0),
1287                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1288                 memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0)
1289                         + ctx->vpu_header_size[0], &ctx->vpu_header[1][0],
1290                         ctx->vpu_header_size[1]);
1291                 memcpy(vb2_plane_vaddr(&dst_buf->vb2_buf, 0)
1292                         + ctx->vpu_header_size[0] + ctx->vpu_header_size[1],
1293                         &ctx->vpu_header[2][0], ctx->vpu_header_size[2]);
1294         } else {
1295                 pic_stream_buffer_addr =
1296                         vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0);
1297                 pic_stream_buffer_size = q_data_dst->sizeimage;
1298         }
1299
1300         if (force_ipicture) {
1301                 switch (dst_fourcc) {
1302                 case V4L2_PIX_FMT_H264:
1303                         quant_param = ctx->params.h264_intra_qp;
1304                         break;
1305                 case V4L2_PIX_FMT_MPEG4:
1306                         quant_param = ctx->params.mpeg4_intra_qp;
1307                         break;
1308                 case V4L2_PIX_FMT_JPEG:
1309                         quant_param = 30;
1310                         break;
1311                 default:
1312                         v4l2_warn(&ctx->dev->v4l2_dev,
1313                                 "cannot set intra qp, fmt not supported\n");
1314                         break;
1315                 }
1316         } else {
1317                 switch (dst_fourcc) {
1318                 case V4L2_PIX_FMT_H264:
1319                         quant_param = ctx->params.h264_inter_qp;
1320                         break;
1321                 case V4L2_PIX_FMT_MPEG4:
1322                         quant_param = ctx->params.mpeg4_inter_qp;
1323                         break;
1324                 default:
1325                         v4l2_warn(&ctx->dev->v4l2_dev,
1326                                 "cannot set inter qp, fmt not supported\n");
1327                         break;
1328                 }
1329         }
1330
1331         /* submit */
1332         if (ctx->params.rot_mode)
1333                 rot_mode = CODA_ROT_MIR_ENABLE | ctx->params.rot_mode;
1334         coda_write(dev, rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
1335         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1336
1337         if (dev->devtype->product == CODA_960) {
1338                 coda_write(dev, 4/*FIXME: 0*/, CODA9_CMD_ENC_PIC_SRC_INDEX);
1339                 coda_write(dev, q_data_src->width, CODA9_CMD_ENC_PIC_SRC_STRIDE);
1340                 coda_write(dev, 0, CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC);
1341
1342                 reg = CODA9_CMD_ENC_PIC_SRC_ADDR_Y;
1343         } else {
1344                 reg = CODA_CMD_ENC_PIC_SRC_ADDR_Y;
1345         }
1346         coda_write_base(ctx, q_data_src, src_buf, reg);
1347
1348         coda_write(dev, force_ipicture << 1 & 0x2,
1349                    CODA_CMD_ENC_PIC_OPTION);
1350
1351         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1352         coda_write(dev, pic_stream_buffer_size / 1024,
1353                    CODA_CMD_ENC_PIC_BB_SIZE);
1354
1355         if (!ctx->streamon_out) {
1356                 /* After streamoff on the output side, set stream end flag */
1357                 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1358                 coda_write(dev, ctx->bit_stream_param,
1359                            CODA_REG_BIT_BIT_STREAM_PARAM);
1360         }
1361
1362         if (dev->devtype->product != CODA_DX6)
1363                 coda_write(dev, ctx->iram_info.axi_sram_use,
1364                                 CODA7_REG_BIT_AXI_SRAM_USE);
1365
1366         trace_coda_enc_pic_run(ctx, src_buf);
1367
1368         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1369
1370         return 0;
1371 }
1372
1373 static void coda_finish_encode(struct coda_ctx *ctx)
1374 {
1375         struct vb2_v4l2_buffer *src_buf, *dst_buf;
1376         struct coda_dev *dev = ctx->dev;
1377         u32 wr_ptr, start_ptr;
1378
1379         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
1380         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1381
1382         trace_coda_enc_pic_done(ctx, dst_buf);
1383
1384         /* Get results from the coda */
1385         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1386         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1387
1388         /* Calculate bytesused field */
1389         if (dst_buf->sequence == 0 ||
1390             src_buf->flags & V4L2_BUF_FLAG_KEYFRAME) {
1391                 vb2_set_plane_payload(&dst_buf->vb2_buf, 0, wr_ptr - start_ptr +
1392                                         ctx->vpu_header_size[0] +
1393                                         ctx->vpu_header_size[1] +
1394                                         ctx->vpu_header_size[2]);
1395         } else {
1396                 vb2_set_plane_payload(&dst_buf->vb2_buf, 0, wr_ptr - start_ptr);
1397         }
1398
1399         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1400                  wr_ptr - start_ptr);
1401
1402         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1403         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1404
1405         if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
1406                 dst_buf->flags |= V4L2_BUF_FLAG_KEYFRAME;
1407                 dst_buf->flags &= ~V4L2_BUF_FLAG_PFRAME;
1408         } else {
1409                 dst_buf->flags |= V4L2_BUF_FLAG_PFRAME;
1410                 dst_buf->flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1411         }
1412
1413         dst_buf->vb2_buf.timestamp = src_buf->vb2_buf.timestamp;
1414         dst_buf->flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
1415         dst_buf->flags |=
1416                 src_buf->flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
1417         dst_buf->timecode = src_buf->timecode;
1418
1419         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1420
1421         dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
1422         coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_DONE);
1423
1424         ctx->gopcounter--;
1425         if (ctx->gopcounter < 0)
1426                 ctx->gopcounter = ctx->params.gop_size - 1;
1427
1428         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1429                 "job finished: encoding frame (%d) (%s)\n",
1430                 dst_buf->sequence,
1431                 (dst_buf->flags & V4L2_BUF_FLAG_KEYFRAME) ?
1432                 "KEYFRAME" : "PFRAME");
1433 }
1434
1435 static void coda_seq_end_work(struct work_struct *work)
1436 {
1437         struct coda_ctx *ctx = container_of(work, struct coda_ctx, seq_end_work);
1438         struct coda_dev *dev = ctx->dev;
1439
1440         mutex_lock(&ctx->buffer_mutex);
1441         mutex_lock(&dev->coda_mutex);
1442
1443         if (ctx->initialized == 0)
1444                 goto out;
1445
1446         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1447                  "%d: %s: sent command 'SEQ_END' to coda\n", ctx->idx,
1448                  __func__);
1449         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1450                 v4l2_err(&dev->v4l2_dev,
1451                          "CODA_COMMAND_SEQ_END failed\n");
1452         }
1453
1454         /*
1455          * FIXME: Sometimes h.264 encoding fails with 8-byte sequences missing
1456          * from the output stream after the h.264 decoder has run. Resetting the
1457          * hardware after the decoder has finished seems to help.
1458          */
1459         if (dev->devtype->product == CODA_960)
1460                 coda_hw_reset(ctx);
1461
1462         kfifo_init(&ctx->bitstream_fifo,
1463                 ctx->bitstream.vaddr, ctx->bitstream.size);
1464
1465         coda_free_framebuffers(ctx);
1466
1467         ctx->initialized = 0;
1468
1469 out:
1470         mutex_unlock(&dev->coda_mutex);
1471         mutex_unlock(&ctx->buffer_mutex);
1472 }
1473
1474 static void coda_bit_release(struct coda_ctx *ctx)
1475 {
1476         mutex_lock(&ctx->buffer_mutex);
1477         coda_free_framebuffers(ctx);
1478         coda_free_context_buffers(ctx);
1479         coda_free_bitstream_buffer(ctx);
1480         mutex_unlock(&ctx->buffer_mutex);
1481 }
1482
1483 const struct coda_context_ops coda_bit_encode_ops = {
1484         .queue_init = coda_encoder_queue_init,
1485         .reqbufs = coda_encoder_reqbufs,
1486         .start_streaming = coda_start_encoding,
1487         .prepare_run = coda_prepare_encode,
1488         .finish_run = coda_finish_encode,
1489         .seq_end_work = coda_seq_end_work,
1490         .release = coda_bit_release,
1491 };
1492
1493 /*
1494  * Decoder context operations
1495  */
1496
1497 static int coda_alloc_bitstream_buffer(struct coda_ctx *ctx,
1498                                        struct coda_q_data *q_data)
1499 {
1500         if (ctx->bitstream.vaddr)
1501                 return 0;
1502
1503         ctx->bitstream.size = roundup_pow_of_two(q_data->sizeimage * 2);
1504         ctx->bitstream.vaddr = dma_alloc_wc(&ctx->dev->plat_dev->dev,
1505                                             ctx->bitstream.size,
1506                                             &ctx->bitstream.paddr, GFP_KERNEL);
1507         if (!ctx->bitstream.vaddr) {
1508                 v4l2_err(&ctx->dev->v4l2_dev,
1509                          "failed to allocate bitstream ringbuffer");
1510                 return -ENOMEM;
1511         }
1512         kfifo_init(&ctx->bitstream_fifo,
1513                    ctx->bitstream.vaddr, ctx->bitstream.size);
1514
1515         return 0;
1516 }
1517
1518 static void coda_free_bitstream_buffer(struct coda_ctx *ctx)
1519 {
1520         if (ctx->bitstream.vaddr == NULL)
1521                 return;
1522
1523         dma_free_wc(&ctx->dev->plat_dev->dev, ctx->bitstream.size,
1524                     ctx->bitstream.vaddr, ctx->bitstream.paddr);
1525         ctx->bitstream.vaddr = NULL;
1526         kfifo_init(&ctx->bitstream_fifo, NULL, 0);
1527 }
1528
1529 static int coda_decoder_reqbufs(struct coda_ctx *ctx,
1530                                 struct v4l2_requestbuffers *rb)
1531 {
1532         struct coda_q_data *q_data_src;
1533         int ret;
1534
1535         if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
1536                 return 0;
1537
1538         if (rb->count) {
1539                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1540                 ret = coda_alloc_context_buffers(ctx, q_data_src);
1541                 if (ret < 0)
1542                         return ret;
1543                 ret = coda_alloc_bitstream_buffer(ctx, q_data_src);
1544                 if (ret < 0) {
1545                         coda_free_context_buffers(ctx);
1546                         return ret;
1547                 }
1548         } else {
1549                 coda_free_bitstream_buffer(ctx);
1550                 coda_free_context_buffers(ctx);
1551         }
1552
1553         return 0;
1554 }
1555
1556 static bool coda_reorder_enable(struct coda_ctx *ctx)
1557 {
1558         const char * const *profile_names;
1559         const char * const *level_names;
1560         struct coda_dev *dev = ctx->dev;
1561         int profile, level;
1562
1563         if (dev->devtype->product != CODA_7541 &&
1564             dev->devtype->product != CODA_960)
1565                 return false;
1566
1567         if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG)
1568                 return false;
1569
1570         if (ctx->codec->src_fourcc != V4L2_PIX_FMT_H264)
1571                 return true;
1572
1573         profile = coda_h264_profile(ctx->params.h264_profile_idc);
1574         if (profile < 0) {
1575                 v4l2_warn(&dev->v4l2_dev, "Invalid H264 Profile: %d\n",
1576                          ctx->params.h264_profile_idc);
1577                 return false;
1578         }
1579
1580         level = coda_h264_level(ctx->params.h264_level_idc);
1581         if (level < 0) {
1582                 v4l2_warn(&dev->v4l2_dev, "Invalid H264 Level: %d\n",
1583                          ctx->params.h264_level_idc);
1584                 return false;
1585         }
1586
1587         profile_names = v4l2_ctrl_get_menu(V4L2_CID_MPEG_VIDEO_H264_PROFILE);
1588         level_names = v4l2_ctrl_get_menu(V4L2_CID_MPEG_VIDEO_H264_LEVEL);
1589
1590         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "H264 Profile/Level: %s L%s\n",
1591                  profile_names[profile], level_names[level]);
1592
1593         /* Baseline profile does not support reordering */
1594         return profile > V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE;
1595 }
1596
1597 static int __coda_start_decoding(struct coda_ctx *ctx)
1598 {
1599         struct coda_q_data *q_data_src, *q_data_dst;
1600         u32 bitstream_buf, bitstream_size;
1601         struct coda_dev *dev = ctx->dev;
1602         int width, height;
1603         u32 src_fourcc, dst_fourcc;
1604         u32 val;
1605         int ret;
1606
1607         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1608                  "Video Data Order Adapter: %s\n",
1609                  ctx->use_vdoa ? "Enabled" : "Disabled");
1610
1611         /* Start decoding */
1612         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1613         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1614         bitstream_buf = ctx->bitstream.paddr;
1615         bitstream_size = ctx->bitstream.size;
1616         src_fourcc = q_data_src->fourcc;
1617         dst_fourcc = q_data_dst->fourcc;
1618
1619         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1620
1621         /* Update coda bitstream read and write pointers from kfifo */
1622         coda_kfifo_sync_to_device_full(ctx);
1623
1624         ctx->frame_mem_ctrl &= ~(CODA_FRAME_CHROMA_INTERLEAVE | (0x3 << 9) |
1625                                  CODA9_FRAME_TILED2LINEAR);
1626         if (dst_fourcc == V4L2_PIX_FMT_NV12 || dst_fourcc == V4L2_PIX_FMT_YUYV)
1627                 ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
1628         if (ctx->tiled_map_type == GDI_TILED_FRAME_MB_RASTER_MAP)
1629                 ctx->frame_mem_ctrl |= (0x3 << 9) |
1630                         ((ctx->use_vdoa) ? 0 : CODA9_FRAME_TILED2LINEAR);
1631         coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
1632
1633         ctx->display_idx = -1;
1634         ctx->frm_dis_flg = 0;
1635         coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1636
1637         coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
1638                         CODA_REG_BIT_BIT_STREAM_PARAM);
1639
1640         coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
1641         coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
1642         val = 0;
1643         if (coda_reorder_enable(ctx))
1644                 val |= CODA_REORDER_ENABLE;
1645         if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG)
1646                 val |= CODA_NO_INT_ENABLE;
1647         coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
1648
1649         ctx->params.codec_mode = ctx->codec->mode;
1650         if (dev->devtype->product == CODA_960 &&
1651             src_fourcc == V4L2_PIX_FMT_MPEG4)
1652                 ctx->params.codec_mode_aux = CODA_MP4_AUX_MPEG4;
1653         else
1654                 ctx->params.codec_mode_aux = 0;
1655         if (src_fourcc == V4L2_PIX_FMT_H264) {
1656                 if (dev->devtype->product == CODA_7541) {
1657                         coda_write(dev, ctx->psbuf.paddr,
1658                                         CODA_CMD_DEC_SEQ_PS_BB_START);
1659                         coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
1660                                         CODA_CMD_DEC_SEQ_PS_BB_SIZE);
1661                 }
1662                 if (dev->devtype->product == CODA_960) {
1663                         coda_write(dev, 0, CODA_CMD_DEC_SEQ_X264_MV_EN);
1664                         coda_write(dev, 512, CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE);
1665                 }
1666         }
1667         if (dev->devtype->product != CODA_960)
1668                 coda_write(dev, 0, CODA_CMD_DEC_SEQ_SRC_SIZE);
1669
1670         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1671                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1672                 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1673                 return -ETIMEDOUT;
1674         }
1675         ctx->initialized = 1;
1676
1677         /* Update kfifo out pointer from coda bitstream read pointer */
1678         coda_kfifo_sync_from_device(ctx);
1679
1680         coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1681
1682         if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
1683                 v4l2_err(&dev->v4l2_dev,
1684                         "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
1685                         coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
1686                 return -EAGAIN;
1687         }
1688
1689         val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
1690         if (dev->devtype->product == CODA_DX6) {
1691                 width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
1692                 height = val & CODADX6_PICHEIGHT_MASK;
1693         } else {
1694                 width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
1695                 height = val & CODA7_PICHEIGHT_MASK;
1696         }
1697
1698         if (width > q_data_dst->bytesperline || height > q_data_dst->height) {
1699                 v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
1700                          width, height, q_data_dst->bytesperline,
1701                          q_data_dst->height);
1702                 return -EINVAL;
1703         }
1704
1705         width = round_up(width, 16);
1706         height = round_up(height, 16);
1707
1708         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
1709                  __func__, ctx->idx, width, height);
1710
1711         ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED);
1712         /*
1713          * If the VDOA is used, the decoder needs one additional frame,
1714          * because the frames are freed when the next frame is decoded.
1715          * Otherwise there are visible errors in the decoded frames (green
1716          * regions in displayed frames) and a broken order of frames (earlier
1717          * frames are sporadically displayed after later frames).
1718          */
1719         if (ctx->use_vdoa)
1720                 ctx->num_internal_frames += 1;
1721         if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
1722                 v4l2_err(&dev->v4l2_dev,
1723                          "not enough framebuffers to decode (%d < %d)\n",
1724                          CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
1725                 return -EINVAL;
1726         }
1727
1728         if (src_fourcc == V4L2_PIX_FMT_H264) {
1729                 u32 left_right;
1730                 u32 top_bottom;
1731
1732                 left_right = coda_read(dev, CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT);
1733                 top_bottom = coda_read(dev, CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM);
1734
1735                 q_data_dst->rect.left = (left_right >> 10) & 0x3ff;
1736                 q_data_dst->rect.top = (top_bottom >> 10) & 0x3ff;
1737                 q_data_dst->rect.width = width - q_data_dst->rect.left -
1738                                          (left_right & 0x3ff);
1739                 q_data_dst->rect.height = height - q_data_dst->rect.top -
1740                                           (top_bottom & 0x3ff);
1741         }
1742
1743         ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
1744         if (ret < 0) {
1745                 v4l2_err(&dev->v4l2_dev, "failed to allocate framebuffers\n");
1746                 return ret;
1747         }
1748
1749         /* Tell the decoder how many frame buffers we allocated. */
1750         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1751         coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
1752
1753         if (dev->devtype->product != CODA_DX6) {
1754                 /* Set secondary AXI IRAM */
1755                 coda_setup_iram(ctx);
1756
1757                 coda_write(dev, ctx->iram_info.buf_bit_use,
1758                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1759                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1760                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1761                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1762                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1763                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1764                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1765                 coda_write(dev, ctx->iram_info.buf_ovl_use,
1766                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1767                 if (dev->devtype->product == CODA_960) {
1768                         coda_write(dev, ctx->iram_info.buf_btp_use,
1769                                         CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
1770
1771                         coda_write(dev, -1, CODA9_CMD_SET_FRAME_DELAY);
1772                         coda9_set_frame_cache(ctx, dst_fourcc);
1773                 }
1774         }
1775
1776         if (src_fourcc == V4L2_PIX_FMT_H264) {
1777                 coda_write(dev, ctx->slicebuf.paddr,
1778                                 CODA_CMD_SET_FRAME_SLICE_BB_START);
1779                 coda_write(dev, ctx->slicebuf.size / 1024,
1780                                 CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
1781         }
1782
1783         if (dev->devtype->product == CODA_7541) {
1784                 int max_mb_x = 1920 / 16;
1785                 int max_mb_y = 1088 / 16;
1786                 int max_mb_num = max_mb_x * max_mb_y;
1787
1788                 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1789                                 CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
1790         } else if (dev->devtype->product == CODA_960) {
1791                 int max_mb_x = 1920 / 16;
1792                 int max_mb_y = 1088 / 16;
1793                 int max_mb_num = max_mb_x * max_mb_y;
1794
1795                 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1796                                 CODA9_CMD_SET_FRAME_MAX_DEC_SIZE);
1797         }
1798
1799         if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1800                 v4l2_err(&ctx->dev->v4l2_dev,
1801                          "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1802                 return -ETIMEDOUT;
1803         }
1804
1805         return 0;
1806 }
1807
1808 static int coda_start_decoding(struct coda_ctx *ctx)
1809 {
1810         struct coda_dev *dev = ctx->dev;
1811         int ret;
1812
1813         mutex_lock(&dev->coda_mutex);
1814         ret = __coda_start_decoding(ctx);
1815         mutex_unlock(&dev->coda_mutex);
1816
1817         return ret;
1818 }
1819
1820 static int coda_prepare_decode(struct coda_ctx *ctx)
1821 {
1822         struct vb2_v4l2_buffer *dst_buf;
1823         struct coda_dev *dev = ctx->dev;
1824         struct coda_q_data *q_data_dst;
1825         struct coda_buffer_meta *meta;
1826         unsigned long flags;
1827         u32 rot_mode = 0;
1828         u32 reg_addr, reg_stride;
1829
1830         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1831         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1832
1833         /* Try to copy source buffer contents into the bitstream ringbuffer */
1834         mutex_lock(&ctx->bitstream_mutex);
1835         coda_fill_bitstream(ctx, NULL);
1836         mutex_unlock(&ctx->bitstream_mutex);
1837
1838         if (coda_get_bitstream_payload(ctx) < 512 &&
1839             (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1840                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1841                          "bitstream payload: %d, skipping\n",
1842                          coda_get_bitstream_payload(ctx));
1843                 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1844                 return -EAGAIN;
1845         }
1846
1847         /* Run coda_start_decoding (again) if not yet initialized */
1848         if (!ctx->initialized) {
1849                 int ret = __coda_start_decoding(ctx);
1850
1851                 if (ret < 0) {
1852                         v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
1853                         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1854                         return -EAGAIN;
1855                 } else {
1856                         ctx->initialized = 1;
1857                 }
1858         }
1859
1860         if (dev->devtype->product == CODA_960)
1861                 coda_set_gdi_regs(ctx);
1862
1863         if (ctx->use_vdoa &&
1864             ctx->display_idx >= 0 &&
1865             ctx->display_idx < ctx->num_internal_frames) {
1866                 vdoa_device_run(ctx->vdoa,
1867                                 vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0),
1868                                 ctx->internal_frames[ctx->display_idx].paddr);
1869         } else {
1870                 if (dev->devtype->product == CODA_960) {
1871                         /*
1872                          * The CODA960 seems to have an internal list of
1873                          * buffers with 64 entries that includes the
1874                          * registered frame buffers as well as the rotator
1875                          * buffer output.
1876                          *
1877                          * ROT_INDEX needs to be < 0x40, but >
1878                          * ctx->num_internal_frames.
1879                          */
1880                         coda_write(dev,
1881                                    CODA_MAX_FRAMEBUFFERS + dst_buf->vb2_buf.index,
1882                                    CODA9_CMD_DEC_PIC_ROT_INDEX);
1883
1884                         reg_addr = CODA9_CMD_DEC_PIC_ROT_ADDR_Y;
1885                         reg_stride = CODA9_CMD_DEC_PIC_ROT_STRIDE;
1886                 } else {
1887                         reg_addr = CODA_CMD_DEC_PIC_ROT_ADDR_Y;
1888                         reg_stride = CODA_CMD_DEC_PIC_ROT_STRIDE;
1889                 }
1890                 coda_write_base(ctx, q_data_dst, dst_buf, reg_addr);
1891                 coda_write(dev, q_data_dst->bytesperline, reg_stride);
1892
1893                 rot_mode = CODA_ROT_MIR_ENABLE | ctx->params.rot_mode;
1894         }
1895
1896         coda_write(dev, rot_mode, CODA_CMD_DEC_PIC_ROT_MODE);
1897
1898         switch (dev->devtype->product) {
1899         case CODA_DX6:
1900                 /* TBD */
1901         case CODA_7541:
1902                 coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
1903                 break;
1904         case CODA_960:
1905                 /* 'hardcode to use interrupt disable mode'? */
1906                 coda_write(dev, (1 << 10), CODA_CMD_DEC_PIC_OPTION);
1907                 break;
1908         }
1909
1910         coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
1911
1912         coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
1913         coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
1914
1915         if (dev->devtype->product != CODA_DX6)
1916                 coda_write(dev, ctx->iram_info.axi_sram_use,
1917                                 CODA7_REG_BIT_AXI_SRAM_USE);
1918
1919         spin_lock_irqsave(&ctx->buffer_meta_lock, flags);
1920         meta = list_first_entry_or_null(&ctx->buffer_meta_list,
1921                                         struct coda_buffer_meta, list);
1922
1923         if (meta && ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG) {
1924
1925                 /* If this is the last buffer in the bitstream, add padding */
1926                 if (meta->end == (ctx->bitstream_fifo.kfifo.in &
1927                                   ctx->bitstream_fifo.kfifo.mask)) {
1928                         static unsigned char buf[512];
1929                         unsigned int pad;
1930
1931                         /* Pad to multiple of 256 and then add 256 more */
1932                         pad = ((0 - meta->end) & 0xff) + 256;
1933
1934                         memset(buf, 0xff, sizeof(buf));
1935
1936                         kfifo_in(&ctx->bitstream_fifo, buf, pad);
1937                 }
1938         }
1939         spin_unlock_irqrestore(&ctx->buffer_meta_lock, flags);
1940
1941         coda_kfifo_sync_to_device_full(ctx);
1942
1943         /* Clear decode success flag */
1944         coda_write(dev, 0, CODA_RET_DEC_PIC_SUCCESS);
1945
1946         trace_coda_dec_pic_run(ctx, meta);
1947
1948         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1949
1950         return 0;
1951 }
1952
1953 static void coda_finish_decode(struct coda_ctx *ctx)
1954 {
1955         struct coda_dev *dev = ctx->dev;
1956         struct coda_q_data *q_data_src;
1957         struct coda_q_data *q_data_dst;
1958         struct vb2_v4l2_buffer *dst_buf;
1959         struct coda_buffer_meta *meta;
1960         unsigned long payload;
1961         unsigned long flags;
1962         int width, height;
1963         int decoded_idx;
1964         int display_idx;
1965         u32 src_fourcc;
1966         int success;
1967         u32 err_mb;
1968         int err_vdoa = 0;
1969         u32 val;
1970
1971         /* Update kfifo out pointer from coda bitstream read pointer */
1972         coda_kfifo_sync_from_device(ctx);
1973
1974         /*
1975          * in stream-end mode, the read pointer can overshoot the write pointer
1976          * by up to 512 bytes
1977          */
1978         if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
1979                 if (coda_get_bitstream_payload(ctx) >= ctx->bitstream.size - 512)
1980                         kfifo_init(&ctx->bitstream_fifo,
1981                                 ctx->bitstream.vaddr, ctx->bitstream.size);
1982         }
1983
1984         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1985         src_fourcc = q_data_src->fourcc;
1986
1987         val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
1988         if (val != 1)
1989                 pr_err("DEC_PIC_SUCCESS = %d\n", val);
1990
1991         success = val & 0x1;
1992         if (!success)
1993                 v4l2_err(&dev->v4l2_dev, "decode failed\n");
1994
1995         if (src_fourcc == V4L2_PIX_FMT_H264) {
1996                 if (val & (1 << 3))
1997                         v4l2_err(&dev->v4l2_dev,
1998                                  "insufficient PS buffer space (%d bytes)\n",
1999                                  ctx->psbuf.size);
2000                 if (val & (1 << 2))
2001                         v4l2_err(&dev->v4l2_dev,
2002                                  "insufficient slice buffer space (%d bytes)\n",
2003                                  ctx->slicebuf.size);
2004         }
2005
2006         val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
2007         width = (val >> 16) & 0xffff;
2008         height = val & 0xffff;
2009
2010         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2011
2012         /* frame crop information */
2013         if (src_fourcc == V4L2_PIX_FMT_H264) {
2014                 u32 left_right;
2015                 u32 top_bottom;
2016
2017                 left_right = coda_read(dev, CODA_RET_DEC_PIC_CROP_LEFT_RIGHT);
2018                 top_bottom = coda_read(dev, CODA_RET_DEC_PIC_CROP_TOP_BOTTOM);
2019
2020                 if (left_right == 0xffffffff && top_bottom == 0xffffffff) {
2021                         /* Keep current crop information */
2022                 } else {
2023                         struct v4l2_rect *rect = &q_data_dst->rect;
2024
2025                         rect->left = left_right >> 16 & 0xffff;
2026                         rect->top = top_bottom >> 16 & 0xffff;
2027                         rect->width = width - rect->left -
2028                                       (left_right & 0xffff);
2029                         rect->height = height - rect->top -
2030                                        (top_bottom & 0xffff);
2031                 }
2032         } else {
2033                 /* no cropping */
2034         }
2035
2036         err_mb = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
2037         if (err_mb > 0)
2038                 v4l2_err(&dev->v4l2_dev,
2039                          "errors in %d macroblocks\n", err_mb);
2040
2041         if (dev->devtype->product == CODA_7541) {
2042                 val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
2043                 if (val == 0) {
2044                         /* not enough bitstream data */
2045                         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2046                                  "prescan failed: %d\n", val);
2047                         ctx->hold = true;
2048                         return;
2049                 }
2050         }
2051
2052         /* Wait until the VDOA finished writing the previous display frame */
2053         if (ctx->use_vdoa &&
2054             ctx->display_idx >= 0 &&
2055             ctx->display_idx < ctx->num_internal_frames) {
2056                 err_vdoa = vdoa_wait_for_completion(ctx->vdoa);
2057         }
2058
2059         ctx->frm_dis_flg = coda_read(dev,
2060                                      CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2061
2062         /* The previous display frame was copied out and can be overwritten */
2063         if (ctx->display_idx >= 0 &&
2064             ctx->display_idx < ctx->num_internal_frames) {
2065                 ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
2066                 coda_write(dev, ctx->frm_dis_flg,
2067                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2068         }
2069
2070         /*
2071          * The index of the last decoded frame, not necessarily in
2072          * display order, and the index of the next display frame.
2073          * The latter could have been decoded in a previous run.
2074          */
2075         decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
2076         display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
2077
2078         if (decoded_idx == -1) {
2079                 /* no frame was decoded, but we might have a display frame */
2080                 if (display_idx >= 0 && display_idx < ctx->num_internal_frames)
2081                         ctx->sequence_offset++;
2082                 else if (ctx->display_idx < 0)
2083                         ctx->hold = true;
2084         } else if (decoded_idx == -2) {
2085                 /* no frame was decoded, we still return remaining buffers */
2086         } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
2087                 v4l2_err(&dev->v4l2_dev,
2088                          "decoded frame index out of range: %d\n", decoded_idx);
2089         } else {
2090                 val = coda_read(dev, CODA_RET_DEC_PIC_FRAME_NUM) - 1;
2091                 val -= ctx->sequence_offset;
2092                 spin_lock_irqsave(&ctx->buffer_meta_lock, flags);
2093                 if (!list_empty(&ctx->buffer_meta_list)) {
2094                         meta = list_first_entry(&ctx->buffer_meta_list,
2095                                               struct coda_buffer_meta, list);
2096                         list_del(&meta->list);
2097                         ctx->num_metas--;
2098                         spin_unlock_irqrestore(&ctx->buffer_meta_lock, flags);
2099                         /*
2100                          * Clamp counters to 16 bits for comparison, as the HW
2101                          * counter rolls over at this point for h.264. This
2102                          * may be different for other formats, but using 16 bits
2103                          * should be enough to detect most errors and saves us
2104                          * from doing different things based on the format.
2105                          */
2106                         if ((val & 0xffff) != (meta->sequence & 0xffff)) {
2107                                 v4l2_err(&dev->v4l2_dev,
2108                                          "sequence number mismatch (%d(%d) != %d)\n",
2109                                          val, ctx->sequence_offset,
2110                                          meta->sequence);
2111                         }
2112                         ctx->frame_metas[decoded_idx] = *meta;
2113                         kfree(meta);
2114                 } else {
2115                         spin_unlock_irqrestore(&ctx->buffer_meta_lock, flags);
2116                         v4l2_err(&dev->v4l2_dev, "empty timestamp list!\n");
2117                         memset(&ctx->frame_metas[decoded_idx], 0,
2118                                sizeof(struct coda_buffer_meta));
2119                         ctx->frame_metas[decoded_idx].sequence = val;
2120                         ctx->sequence_offset++;
2121                 }
2122
2123                 trace_coda_dec_pic_done(ctx, &ctx->frame_metas[decoded_idx]);
2124
2125                 val = coda_read(dev, CODA_RET_DEC_PIC_TYPE) & 0x7;
2126                 if (val == 0)
2127                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_KEYFRAME;
2128                 else if (val == 1)
2129                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_PFRAME;
2130                 else
2131                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_BFRAME;
2132
2133                 ctx->frame_errors[decoded_idx] = err_mb;
2134         }
2135
2136         if (display_idx == -1) {
2137                 /*
2138                  * no more frames to be decoded, but there could still
2139                  * be rotator output to dequeue
2140                  */
2141                 ctx->hold = true;
2142         } else if (display_idx == -3) {
2143                 /* possibly prescan failure */
2144         } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
2145                 v4l2_err(&dev->v4l2_dev,
2146                          "presentation frame index out of range: %d\n",
2147                          display_idx);
2148         }
2149
2150         /* If a frame was copied out, return it */
2151         if (ctx->display_idx >= 0 &&
2152             ctx->display_idx < ctx->num_internal_frames) {
2153                 dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
2154                 dst_buf->sequence = ctx->osequence++;
2155
2156                 dst_buf->flags &= ~(V4L2_BUF_FLAG_KEYFRAME |
2157                                              V4L2_BUF_FLAG_PFRAME |
2158                                              V4L2_BUF_FLAG_BFRAME);
2159                 dst_buf->flags |= ctx->frame_types[ctx->display_idx];
2160                 meta = &ctx->frame_metas[ctx->display_idx];
2161                 dst_buf->timecode = meta->timecode;
2162                 dst_buf->vb2_buf.timestamp = meta->timestamp;
2163
2164                 trace_coda_dec_rot_done(ctx, dst_buf, meta);
2165
2166                 switch (q_data_dst->fourcc) {
2167                 case V4L2_PIX_FMT_YUYV:
2168                         payload = width * height * 2;
2169                         break;
2170                 case V4L2_PIX_FMT_YUV420:
2171                 case V4L2_PIX_FMT_YVU420:
2172                 case V4L2_PIX_FMT_NV12:
2173                 default:
2174                         payload = width * height * 3 / 2;
2175                         break;
2176                 case V4L2_PIX_FMT_YUV422P:
2177                         payload = width * height * 2;
2178                         break;
2179                 }
2180                 vb2_set_plane_payload(&dst_buf->vb2_buf, 0, payload);
2181
2182                 if (ctx->frame_errors[ctx->display_idx] || err_vdoa)
2183                         coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_ERROR);
2184                 else
2185                         coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_DONE);
2186
2187                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2188                         "job finished: decoding frame (%d) (%s)\n",
2189                         dst_buf->sequence,
2190                         (dst_buf->flags & V4L2_BUF_FLAG_KEYFRAME) ?
2191                         "KEYFRAME" : "PFRAME");
2192         } else {
2193                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2194                         "job finished: no frame decoded\n");
2195         }
2196
2197         /* The rotator will copy the current display frame next time */
2198         ctx->display_idx = display_idx;
2199 }
2200
2201 static void coda_decode_timeout(struct coda_ctx *ctx)
2202 {
2203         struct vb2_v4l2_buffer *dst_buf;
2204
2205         /*
2206          * For now this only handles the case where we would deadlock with
2207          * userspace, i.e. userspace issued DEC_CMD_STOP and waits for EOS,
2208          * but after a failed decode run we would hold the context and wait for
2209          * userspace to queue more buffers.
2210          */
2211         if (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))
2212                 return;
2213
2214         dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
2215         dst_buf->sequence = ctx->qsequence - 1;
2216
2217         coda_m2m_buf_done(ctx, dst_buf, VB2_BUF_STATE_ERROR);
2218 }
2219
2220 const struct coda_context_ops coda_bit_decode_ops = {
2221         .queue_init = coda_decoder_queue_init,
2222         .reqbufs = coda_decoder_reqbufs,
2223         .start_streaming = coda_start_decoding,
2224         .prepare_run = coda_prepare_decode,
2225         .finish_run = coda_finish_decode,
2226         .run_timeout = coda_decode_timeout,
2227         .seq_end_work = coda_seq_end_work,
2228         .release = coda_bit_release,
2229 };
2230
2231 irqreturn_t coda_irq_handler(int irq, void *data)
2232 {
2233         struct coda_dev *dev = data;
2234         struct coda_ctx *ctx;
2235
2236         /* read status register to attend the IRQ */
2237         coda_read(dev, CODA_REG_BIT_INT_STATUS);
2238         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
2239                       CODA_REG_BIT_INT_CLEAR);
2240
2241         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
2242         if (ctx == NULL) {
2243                 v4l2_err(&dev->v4l2_dev,
2244                          "Instance released before the end of transaction\n");
2245                 mutex_unlock(&dev->coda_mutex);
2246                 return IRQ_HANDLED;
2247         }
2248
2249         trace_coda_bit_done(ctx);
2250
2251         if (ctx->aborting) {
2252                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2253                          "task has been aborted\n");
2254         }
2255
2256         if (coda_isbusy(ctx->dev)) {
2257                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2258                          "coda is still busy!!!!\n");
2259                 return IRQ_NONE;
2260         }
2261
2262         complete(&ctx->completion);
2263
2264         return IRQ_HANDLED;
2265 }