drivers/net/phy/vitesse.c

   1 /*
   2  * Driver for Vitesse PHYs
   3  *
   4  * Author: Kriston Carson
   5  *
   6  * Copyright (c) 2005, 2009, 2011 Freescale Semiconductor, Inc.
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/module.h>
  17 #include <linux/mii.h>
  18 #include <linux/ethtool.h>
  19 #include <linux/phy.h>
  20
  21 /* Vitesse Extended Page Magic Register(s) */
  22 #define MII_VSC82X4_EXT_PAGE_16E        0x10
  23 #define MII_VSC82X4_EXT_PAGE_17E        0x11
  24 #define MII_VSC82X4_EXT_PAGE_18E        0x12
  25
  26 /* Vitesse Extended Control Register 1 */
  27 #define MII_VSC8244_EXT_CON1           0x17
  28 #define MII_VSC8244_EXTCON1_INIT       0x0000
  29 #define MII_VSC8244_EXTCON1_TX_SKEW_MASK        0x0c00
  30 #define MII_VSC8244_EXTCON1_RX_SKEW_MASK        0x0300
  31 #define MII_VSC8244_EXTCON1_TX_SKEW     0x0800
  32 #define MII_VSC8244_EXTCON1_RX_SKEW     0x0200
  33
  34 /* Vitesse Interrupt Mask Register */
  35 #define MII_VSC8244_IMASK               0x19
  36 #define MII_VSC8244_IMASK_IEN           0x8000
  37 #define MII_VSC8244_IMASK_SPEED         0x4000
  38 #define MII_VSC8244_IMASK_LINK          0x2000
  39 #define MII_VSC8244_IMASK_DUPLEX        0x1000
  40 #define MII_VSC8244_IMASK_MASK          0xf000
  41
  42 #define MII_VSC8221_IMASK_MASK          0xa000
  43
  44 /* Vitesse Interrupt Status Register */
  45 #define MII_VSC8244_ISTAT               0x1a
  46 #define MII_VSC8244_ISTAT_STATUS        0x8000
  47 #define MII_VSC8244_ISTAT_SPEED         0x4000
  48 #define MII_VSC8244_ISTAT_LINK          0x2000
  49 #define MII_VSC8244_ISTAT_DUPLEX        0x1000
  50
  51 /* Vitesse Auxiliary Control/Status Register */
  52 #define MII_VSC8244_AUX_CONSTAT         0x1c
  53 #define MII_VSC8244_AUXCONSTAT_INIT     0x0000
  54 #define MII_VSC8244_AUXCONSTAT_DUPLEX   0x0020
  55 #define MII_VSC8244_AUXCONSTAT_SPEED    0x0018
  56 #define MII_VSC8244_AUXCONSTAT_GBIT     0x0010
  57 #define MII_VSC8244_AUXCONSTAT_100      0x0008
  58
  59 #define MII_VSC8221_AUXCONSTAT_INIT     0x0004 /* need to set this bit? */
  60 #define MII_VSC8221_AUXCONSTAT_RESERVED 0x0004
  61
  62 /* Vitesse Extended Page Access Register */
  63 #define MII_VSC82X4_EXT_PAGE_ACCESS     0x1f
  64
  65 #define PHY_ID_VSC8234                  0x000fc620
  66 #define PHY_ID_VSC8244                  0x000fc6c0
  67 #define PHY_ID_VSC8574                  0x000704a0
  68 #define PHY_ID_VSC8662                  0x00070660
  69 #define PHY_ID_VSC8221                  0x000fc550
  70 #define PHY_ID_VSC8211                  0x000fc4b0
  71
  72 MODULE_DESCRIPTION("Vitesse PHY driver");
  73 MODULE_AUTHOR("Kriston Carson");
  74 MODULE_LICENSE("GPL");
  75
  76 static int vsc824x_add_skew(struct phy_device *phydev)
  77 {
  78         int err;
  79         int extcon;
  80
  81         extcon = phy_read(phydev, MII_VSC8244_EXT_CON1);
  82
  83         if (extcon < 0)
  84                 return extcon;
  85
  86         extcon &= ~(MII_VSC8244_EXTCON1_TX_SKEW_MASK |
  87                         MII_VSC8244_EXTCON1_RX_SKEW_MASK);
  88
  89         extcon |= (MII_VSC8244_EXTCON1_TX_SKEW |
  90                         MII_VSC8244_EXTCON1_RX_SKEW);
  91
  92         err = phy_write(phydev, MII_VSC8244_EXT_CON1, extcon);
  93
  94         return err;
  95 }
  96
  97 static int vsc824x_config_init(struct phy_device *phydev)
  98 {
  99         int err;
 100
 101         err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
 102                         MII_VSC8244_AUXCONSTAT_INIT);
 103         if (err < 0)
 104                 return err;
 105
 106         if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
 107                 err = vsc824x_add_skew(phydev);
 108
 109         return err;
 110 }
 111
 112 static int vsc824x_ack_interrupt(struct phy_device *phydev)
 113 {
 114         int err = 0;
 115
 116         /* Don't bother to ACK the interrupts if interrupts
 117          * are disabled.  The 824x cannot clear the interrupts
 118          * if they are disabled.
 119          */
 120         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
 121                 err = phy_read(phydev, MII_VSC8244_ISTAT);
 122
 123         return (err < 0) ? err : 0;
 124 }
 125
 126 static int vsc82xx_config_intr(struct phy_device *phydev)
 127 {
 128         int err;
 129
 130         if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
 131                 err = phy_write(phydev, MII_VSC8244_IMASK,
 132                         (phydev->drv->phy_id == PHY_ID_VSC8234 ||
 133                          phydev->drv->phy_id == PHY_ID_VSC8244 ||
 134                          phydev->drv->phy_id == PHY_ID_VSC8574) ?
 135                                 MII_VSC8244_IMASK_MASK :
 136                                 MII_VSC8221_IMASK_MASK);
 137         else {
 138                 /* The Vitesse PHY cannot clear the interrupt
 139                  * once it has disabled them, so we clear them first
 140                  */
 141                 err = phy_read(phydev, MII_VSC8244_ISTAT);
 142
 143                 if (err < 0)
 144                         return err;
 145
 146                 err = phy_write(phydev, MII_VSC8244_IMASK, 0);
 147         }
 148
 149         return err;
 150 }
 151
 152 static int vsc8221_config_init(struct phy_device *phydev)
 153 {
 154         int err;
 155
 156         err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
 157                         MII_VSC8221_AUXCONSTAT_INIT);
 158         return err;
 159
 160         /* Perhaps we should set EXT_CON1 based on the interface?
 161          * Options are 802.3Z SerDes or SGMII
 162          */
 163 }
 164
 165 /* vsc82x4_config_autocross_enable - Enable auto MDI/MDI-X for forced links
 166  * @phydev: target phy_device struct
 167  *
 168  * Enable auto MDI/MDI-X when in 10/100 forced link speeds by writing
 169  * special values in the VSC8234/VSC8244 extended reserved registers
 170  */
 171 static int vsc82x4_config_autocross_enable(struct phy_device *phydev)
 172 {
 173         int ret;
 174
 175         if (phydev->autoneg == AUTONEG_ENABLE || phydev->speed > SPEED_100)
 176                 return 0;
 177
 178         /* map extended registers set 0x10 - 0x1e */
 179         ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_ACCESS, 0x52b5);
 180         if (ret >= 0)
 181                 ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_18E, 0x0012);
 182         if (ret >= 0)
 183                 ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_17E, 0x2803);
 184         if (ret >= 0)
 185                 ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_16E, 0x87fa);
 186         /* map standard registers set 0x10 - 0x1e */
 187         if (ret >= 0)
 188                 ret = phy_write(phydev, MII_VSC82X4_EXT_PAGE_ACCESS, 0x0000);
 189         else
 190                 phy_write(phydev, MII_VSC82X4_EXT_PAGE_ACCESS, 0x0000);
 191
 192         return ret;
 193 }
 194
 195 /* vsc82x4_config_aneg - restart auto-negotiation or write BMCR
 196  * @phydev: target phy_device struct
 197  *
 198  * Description: If auto-negotiation is enabled, we configure the
 199  *   advertising, and then restart auto-negotiation.  If it is not
 200  *   enabled, then we write the BMCR and also start the auto
 201  *   MDI/MDI-X feature
 202  */
 203 static int vsc82x4_config_aneg(struct phy_device *phydev)
 204 {
 205         int ret;
 206
 207         /* Enable auto MDI/MDI-X when in 10/100 forced link speeds by
 208          * writing special values in the VSC8234 extended reserved registers
 209          */
 210         if (phydev->autoneg != AUTONEG_ENABLE && phydev->speed <= SPEED_100) {
 211                 ret = genphy_setup_forced(phydev);
 212
 213                 if (ret < 0) /* error */
 214                         return ret;
 215
 216                 return vsc82x4_config_autocross_enable(phydev);
 217         }
 218
 219         return genphy_config_aneg(phydev);
 220 }
 221
 222 /* Vitesse 82xx */
 223 static struct phy_driver vsc82xx_driver[] = {
 224 {
 225         .phy_id         = PHY_ID_VSC8234,
 226         .name           = "Vitesse VSC8234",
 227         .phy_id_mask    = 0x000ffff0,
 228         .features       = PHY_GBIT_FEATURES,
 229         .flags          = PHY_HAS_INTERRUPT,
 230         .config_init    = &vsc824x_config_init,
 231         .config_aneg    = &vsc82x4_config_aneg,
 232         .read_status    = &genphy_read_status,
 233         .ack_interrupt  = &vsc824x_ack_interrupt,
 234         .config_intr    = &vsc82xx_config_intr,
 235         .driver         = { .owner = THIS_MODULE,},
 236 }, {
 237         .phy_id         = PHY_ID_VSC8244,
 238         .name           = "Vitesse VSC8244",
 239         .phy_id_mask    = 0x000fffc0,
 240         .features       = PHY_GBIT_FEATURES,
 241         .flags          = PHY_HAS_INTERRUPT,
 242         .config_init    = &vsc824x_config_init,
 243         .config_aneg    = &vsc82x4_config_aneg,
 244         .read_status    = &genphy_read_status,
 245         .ack_interrupt  = &vsc824x_ack_interrupt,
 246         .config_intr    = &vsc82xx_config_intr,
 247         .driver         = { .owner = THIS_MODULE,},
 248 }, {
 249         .phy_id         = PHY_ID_VSC8574,
 250         .name           = "Vitesse VSC8574",
 251         .phy_id_mask    = 0x000ffff0,
 252         .features       = PHY_GBIT_FEATURES,
 253         .flags          = PHY_HAS_INTERRUPT,
 254         .config_init    = &vsc824x_config_init,
 255         .config_aneg    = &vsc82x4_config_aneg,
 256         .read_status    = &genphy_read_status,
 257         .ack_interrupt  = &vsc824x_ack_interrupt,
 258         .config_intr    = &vsc82xx_config_intr,
 259         .driver         = { .owner = THIS_MODULE,},
 260 }, {
 261         .phy_id         = PHY_ID_VSC8662,
 262         .name           = "Vitesse VSC8662",
 263         .phy_id_mask    = 0x000ffff0,
 264         .features       = PHY_GBIT_FEATURES,
 265         .flags          = PHY_HAS_INTERRUPT,
 266         .config_init    = &vsc824x_config_init,
 267         .config_aneg    = &vsc82x4_config_aneg,
 268         .read_status    = &genphy_read_status,
 269         .ack_interrupt  = &vsc824x_ack_interrupt,
 270         .config_intr    = &vsc82xx_config_intr,
 271         .driver         = { .owner = THIS_MODULE,},
 272 }, {
 273         /* Vitesse 8221 */
 274         .phy_id         = PHY_ID_VSC8221,
 275         .phy_id_mask    = 0x000ffff0,
 276         .name           = "Vitesse VSC8221",
 277         .features       = PHY_GBIT_FEATURES,
 278         .flags          = PHY_HAS_INTERRUPT,
 279         .config_init    = &vsc8221_config_init,
 280         .config_aneg    = &genphy_config_aneg,
 281         .read_status    = &genphy_read_status,
 282         .ack_interrupt  = &vsc824x_ack_interrupt,
 283         .config_intr    = &vsc82xx_config_intr,
 284         .driver         = { .owner = THIS_MODULE,},
 285 }, {
 286         /* Vitesse 8211 */
 287         .phy_id         = PHY_ID_VSC8211,
 288         .phy_id_mask    = 0x000ffff0,
 289         .name           = "Vitesse VSC8211",
 290         .features       = PHY_GBIT_FEATURES,
 291         .flags          = PHY_HAS_INTERRUPT,
 292         .config_init    = &vsc8221_config_init,
 293         .config_aneg    = &genphy_config_aneg,
 294         .read_status    = &genphy_read_status,
 295         .ack_interrupt  = &vsc824x_ack_interrupt,
 296         .config_intr    = &vsc82xx_config_intr,
 297         .driver         = { .owner = THIS_MODULE,},
 298 } };
 299
 300 static int __init vsc82xx_init(void)
 301 {
 302         return phy_drivers_register(vsc82xx_driver,
 303                 ARRAY_SIZE(vsc82xx_driver));
 304 }
 305
 306 static void __exit vsc82xx_exit(void)
 307 {
 308         return phy_drivers_unregister(vsc82xx_driver,
 309                 ARRAY_SIZE(vsc82xx_driver));
 310 }
 311
 312 module_init(vsc82xx_init);
 313 module_exit(vsc82xx_exit);
 314
 315 static struct mdio_device_id __maybe_unused vitesse_tbl[] = {
 316         { PHY_ID_VSC8234, 0x000ffff0 },
 317         { PHY_ID_VSC8244, 0x000fffc0 },
 318         { PHY_ID_VSC8574, 0x000ffff0 },
 319         { PHY_ID_VSC8662, 0x000ffff0 },
 320         { PHY_ID_VSC8221, 0x000ffff0 },
 321         { PHY_ID_VSC8211, 0x000ffff0 },
 322         { }
 323 };
 324
 325 MODULE_DEVICE_TABLE(mdio, vitesse_tbl);