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1 /*
2  * NVM Express device driver
3  * Copyright (c) 2011-2014, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  */
14
15 #include <linux/bitops.h>
16 #include <linux/blkdev.h>
17 #include <linux/blk-mq.h>
18 #include <linux/cpu.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
21 #include <linux/fs.h>
22 #include <linux/genhd.h>
23 #include <linux/hdreg.h>
24 #include <linux/idr.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/io.h>
28 #include <linux/kdev_t.h>
29 #include <linux/kthread.h>
30 #include <linux/kernel.h>
31 #include <linux/list_sort.h>
32 #include <linux/mm.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/t10-pi.h>
41 #include <linux/types.h>
42 #include <linux/pr.h>
43 #include <scsi/sg.h>
44 #include <linux/io-64-nonatomic-lo-hi.h>
45 #include <asm/unaligned.h>
46
47 #include <uapi/linux/nvme_ioctl.h>
48 #include "nvme.h"
49
50 #define NVME_MINORS             (1U << MINORBITS)
51 #define NVME_Q_DEPTH            1024
52 #define NVME_AQ_DEPTH           256
53 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
54 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
55 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
56 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
57
58 static unsigned char admin_timeout = 60;
59 module_param(admin_timeout, byte, 0644);
60 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
61
62 unsigned char nvme_io_timeout = 30;
63 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
64 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
65
66 static unsigned char shutdown_timeout = 5;
67 module_param(shutdown_timeout, byte, 0644);
68 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
69
70 static int nvme_major;
71 module_param(nvme_major, int, 0);
72
73 static int nvme_char_major;
74 module_param(nvme_char_major, int, 0);
75
76 static int use_threaded_interrupts;
77 module_param(use_threaded_interrupts, int, 0);
78
79 static bool use_cmb_sqes = true;
80 module_param(use_cmb_sqes, bool, 0644);
81 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
82
83 static DEFINE_SPINLOCK(dev_list_lock);
84 static LIST_HEAD(dev_list);
85 static struct task_struct *nvme_thread;
86 static struct workqueue_struct *nvme_workq;
87 static wait_queue_head_t nvme_kthread_wait;
88
89 static struct class *nvme_class;
90
91 static int __nvme_reset(struct nvme_dev *dev);
92 static int nvme_reset(struct nvme_dev *dev);
93 static int nvme_process_cq(struct nvme_queue *nvmeq);
94 static void nvme_dead_ctrl(struct nvme_dev *dev);
95
96 struct async_cmd_info {
97         struct kthread_work work;
98         struct kthread_worker *worker;
99         struct request *req;
100         u32 result;
101         int status;
102         void *ctx;
103 };
104
105 /*
106  * An NVM Express queue.  Each device has at least two (one for admin
107  * commands and one for I/O commands).
108  */
109 struct nvme_queue {
110         struct device *q_dmadev;
111         struct nvme_dev *dev;
112         char irqname[24];       /* nvme4294967295-65535\0 */
113         spinlock_t q_lock;
114         struct nvme_command *sq_cmds;
115         struct nvme_command __iomem *sq_cmds_io;
116         volatile struct nvme_completion *cqes;
117         struct blk_mq_tags **tags;
118         dma_addr_t sq_dma_addr;
119         dma_addr_t cq_dma_addr;
120         u32 __iomem *q_db;
121         u16 q_depth;
122         s16 cq_vector;
123         u16 sq_head;
124         u16 sq_tail;
125         u16 cq_head;
126         u16 qid;
127         u8 cq_phase;
128         u8 cqe_seen;
129         struct async_cmd_info cmdinfo;
130 };
131
132 /*
133  * Check we didin't inadvertently grow the command struct
134  */
135 static inline void _nvme_check_size(void)
136 {
137         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
138         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
139         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
140         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
141         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
142         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
143         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
144         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
145         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
146         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
147         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
148         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
149 }
150
151 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
152                                                 struct nvme_completion *);
153
154 struct nvme_cmd_info {
155         nvme_completion_fn fn;
156         void *ctx;
157         int aborted;
158         struct nvme_queue *nvmeq;
159         struct nvme_iod iod[0];
160 };
161
162 /*
163  * Max size of iod being embedded in the request payload
164  */
165 #define NVME_INT_PAGES          2
166 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
167 #define NVME_INT_MASK           0x01
168
169 /*
170  * Will slightly overestimate the number of pages needed.  This is OK
171  * as it only leads to a small amount of wasted memory for the lifetime of
172  * the I/O.
173  */
174 static int nvme_npages(unsigned size, struct nvme_dev *dev)
175 {
176         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
177         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
178 }
179
180 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
181 {
182         unsigned int ret = sizeof(struct nvme_cmd_info);
183
184         ret += sizeof(struct nvme_iod);
185         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
186         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
187
188         return ret;
189 }
190
191 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
192                                 unsigned int hctx_idx)
193 {
194         struct nvme_dev *dev = data;
195         struct nvme_queue *nvmeq = dev->queues[0];
196
197         WARN_ON(hctx_idx != 0);
198         WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
199         WARN_ON(nvmeq->tags);
200
201         hctx->driver_data = nvmeq;
202         nvmeq->tags = &dev->admin_tagset.tags[0];
203         return 0;
204 }
205
206 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
207 {
208         struct nvme_queue *nvmeq = hctx->driver_data;
209
210         nvmeq->tags = NULL;
211 }
212
213 static int nvme_admin_init_request(void *data, struct request *req,
214                                 unsigned int hctx_idx, unsigned int rq_idx,
215                                 unsigned int numa_node)
216 {
217         struct nvme_dev *dev = data;
218         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
219         struct nvme_queue *nvmeq = dev->queues[0];
220
221         BUG_ON(!nvmeq);
222         cmd->nvmeq = nvmeq;
223         return 0;
224 }
225
226 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
227                           unsigned int hctx_idx)
228 {
229         struct nvme_dev *dev = data;
230         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
231
232         if (!nvmeq->tags)
233                 nvmeq->tags = &dev->tagset.tags[hctx_idx];
234
235         WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
236         hctx->driver_data = nvmeq;
237         return 0;
238 }
239
240 static int nvme_init_request(void *data, struct request *req,
241                                 unsigned int hctx_idx, unsigned int rq_idx,
242                                 unsigned int numa_node)
243 {
244         struct nvme_dev *dev = data;
245         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
246         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
247
248         BUG_ON(!nvmeq);
249         cmd->nvmeq = nvmeq;
250         return 0;
251 }
252
253 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
254                                 nvme_completion_fn handler)
255 {
256         cmd->fn = handler;
257         cmd->ctx = ctx;
258         cmd->aborted = 0;
259         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
260 }
261
262 static void *iod_get_private(struct nvme_iod *iod)
263 {
264         return (void *) (iod->private & ~0x1UL);
265 }
266
267 /*
268  * If bit 0 is set, the iod is embedded in the request payload.
269  */
270 static bool iod_should_kfree(struct nvme_iod *iod)
271 {
272         return (iod->private & NVME_INT_MASK) == 0;
273 }
274
275 /* Special values must be less than 0x1000 */
276 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
277 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
278 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
279 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
280
281 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
282                                                 struct nvme_completion *cqe)
283 {
284         if (ctx == CMD_CTX_CANCELLED)
285                 return;
286         if (ctx == CMD_CTX_COMPLETED) {
287                 dev_warn(nvmeq->q_dmadev,
288                                 "completed id %d twice on queue %d\n",
289                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
290                 return;
291         }
292         if (ctx == CMD_CTX_INVALID) {
293                 dev_warn(nvmeq->q_dmadev,
294                                 "invalid id %d completed on queue %d\n",
295                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
296                 return;
297         }
298         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
299 }
300
301 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
302 {
303         void *ctx;
304
305         if (fn)
306                 *fn = cmd->fn;
307         ctx = cmd->ctx;
308         cmd->fn = special_completion;
309         cmd->ctx = CMD_CTX_CANCELLED;
310         return ctx;
311 }
312
313 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
314                                                 struct nvme_completion *cqe)
315 {
316         u32 result = le32_to_cpup(&cqe->result);
317         u16 status = le16_to_cpup(&cqe->status) >> 1;
318
319         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
320                 ++nvmeq->dev->event_limit;
321         if (status != NVME_SC_SUCCESS)
322                 return;
323
324         switch (result & 0xff07) {
325         case NVME_AER_NOTICE_NS_CHANGED:
326                 dev_info(nvmeq->q_dmadev, "rescanning\n");
327                 schedule_work(&nvmeq->dev->scan_work);
328         default:
329                 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
330         }
331 }
332
333 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
334                                                 struct nvme_completion *cqe)
335 {
336         struct request *req = ctx;
337
338         u16 status = le16_to_cpup(&cqe->status) >> 1;
339         u32 result = le32_to_cpup(&cqe->result);
340
341         blk_mq_free_request(req);
342
343         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
344         ++nvmeq->dev->abort_limit;
345 }
346
347 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
348                                                 struct nvme_completion *cqe)
349 {
350         struct async_cmd_info *cmdinfo = ctx;
351         cmdinfo->result = le32_to_cpup(&cqe->result);
352         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
353         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
354         blk_mq_free_request(cmdinfo->req);
355 }
356
357 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
358                                   unsigned int tag)
359 {
360         struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
361
362         return blk_mq_rq_to_pdu(req);
363 }
364
365 /*
366  * Called with local interrupts disabled and the q_lock held.  May not sleep.
367  */
368 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
369                                                 nvme_completion_fn *fn)
370 {
371         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
372         void *ctx;
373         if (tag >= nvmeq->q_depth) {
374                 *fn = special_completion;
375                 return CMD_CTX_INVALID;
376         }
377         if (fn)
378                 *fn = cmd->fn;
379         ctx = cmd->ctx;
380         cmd->fn = special_completion;
381         cmd->ctx = CMD_CTX_COMPLETED;
382         return ctx;
383 }
384
385 /**
386  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
387  * @nvmeq: The queue to use
388  * @cmd: The command to send
389  *
390  * Safe to use from interrupt context
391  */
392 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
393                                                 struct nvme_command *cmd)
394 {
395         u16 tail = nvmeq->sq_tail;
396
397         if (nvmeq->sq_cmds_io)
398                 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
399         else
400                 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
401
402         if (++tail == nvmeq->q_depth)
403                 tail = 0;
404         writel(tail, nvmeq->q_db);
405         nvmeq->sq_tail = tail;
406 }
407
408 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
409 {
410         unsigned long flags;
411         spin_lock_irqsave(&nvmeq->q_lock, flags);
412         __nvme_submit_cmd(nvmeq, cmd);
413         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
414 }
415
416 static __le64 **iod_list(struct nvme_iod *iod)
417 {
418         return ((void *)iod) + iod->offset;
419 }
420
421 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
422                             unsigned nseg, unsigned long private)
423 {
424         iod->private = private;
425         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
426         iod->npages = -1;
427         iod->length = nbytes;
428         iod->nents = 0;
429 }
430
431 static struct nvme_iod *
432 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
433                  unsigned long priv, gfp_t gfp)
434 {
435         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
436                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
437                                 sizeof(struct scatterlist) * nseg, gfp);
438
439         if (iod)
440                 iod_init(iod, bytes, nseg, priv);
441
442         return iod;
443 }
444
445 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
446                                        gfp_t gfp)
447 {
448         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
449                                                 sizeof(struct nvme_dsm_range);
450         struct nvme_iod *iod;
451
452         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
453             size <= NVME_INT_BYTES(dev)) {
454                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
455
456                 iod = cmd->iod;
457                 iod_init(iod, size, rq->nr_phys_segments,
458                                 (unsigned long) rq | NVME_INT_MASK);
459                 return iod;
460         }
461
462         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
463                                 (unsigned long) rq, gfp);
464 }
465
466 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
467 {
468         const int last_prp = dev->page_size / 8 - 1;
469         int i;
470         __le64 **list = iod_list(iod);
471         dma_addr_t prp_dma = iod->first_dma;
472
473         if (iod->npages == 0)
474                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
475         for (i = 0; i < iod->npages; i++) {
476                 __le64 *prp_list = list[i];
477                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
478                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
479                 prp_dma = next_prp_dma;
480         }
481
482         if (iod_should_kfree(iod))
483                 kfree(iod);
484 }
485
486 static int nvme_error_status(u16 status)
487 {
488         switch (status & 0x7ff) {
489         case NVME_SC_SUCCESS:
490                 return 0;
491         case NVME_SC_CAP_EXCEEDED:
492                 return -ENOSPC;
493         default:
494                 return -EIO;
495         }
496 }
497
498 #ifdef CONFIG_BLK_DEV_INTEGRITY
499 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
500 {
501         if (be32_to_cpu(pi->ref_tag) == v)
502                 pi->ref_tag = cpu_to_be32(p);
503 }
504
505 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
506 {
507         if (be32_to_cpu(pi->ref_tag) == p)
508                 pi->ref_tag = cpu_to_be32(v);
509 }
510
511 /**
512  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
513  *
514  * The virtual start sector is the one that was originally submitted by the
515  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
516  * start sector may be different. Remap protection information to match the
517  * physical LBA on writes, and back to the original seed on reads.
518  *
519  * Type 0 and 3 do not have a ref tag, so no remapping required.
520  */
521 static void nvme_dif_remap(struct request *req,
522                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
523 {
524         struct nvme_ns *ns = req->rq_disk->private_data;
525         struct bio_integrity_payload *bip;
526         struct t10_pi_tuple *pi;
527         void *p, *pmap;
528         u32 i, nlb, ts, phys, virt;
529
530         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
531                 return;
532
533         bip = bio_integrity(req->bio);
534         if (!bip)
535                 return;
536
537         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
538
539         p = pmap;
540         virt = bip_get_seed(bip);
541         phys = nvme_block_nr(ns, blk_rq_pos(req));
542         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
543         ts = ns->disk->queue->integrity.tuple_size;
544
545         for (i = 0; i < nlb; i++, virt++, phys++) {
546                 pi = (struct t10_pi_tuple *)p;
547                 dif_swap(phys, virt, pi);
548                 p += ts;
549         }
550         kunmap_atomic(pmap);
551 }
552
553 static void nvme_init_integrity(struct nvme_ns *ns)
554 {
555         struct blk_integrity integrity;
556
557         switch (ns->pi_type) {
558         case NVME_NS_DPS_PI_TYPE3:
559                 integrity.profile = &t10_pi_type3_crc;
560                 break;
561         case NVME_NS_DPS_PI_TYPE1:
562         case NVME_NS_DPS_PI_TYPE2:
563                 integrity.profile = &t10_pi_type1_crc;
564                 break;
565         default:
566                 integrity.profile = NULL;
567                 break;
568         }
569         integrity.tuple_size = ns->ms;
570         blk_integrity_register(ns->disk, &integrity);
571         blk_queue_max_integrity_segments(ns->queue, 1);
572 }
573 #else /* CONFIG_BLK_DEV_INTEGRITY */
574 static void nvme_dif_remap(struct request *req,
575                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
576 {
577 }
578 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
579 {
580 }
581 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
582 {
583 }
584 static void nvme_init_integrity(struct nvme_ns *ns)
585 {
586 }
587 #endif
588
589 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
590                                                 struct nvme_completion *cqe)
591 {
592         struct nvme_iod *iod = ctx;
593         struct request *req = iod_get_private(iod);
594         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
595         u16 status = le16_to_cpup(&cqe->status) >> 1;
596         bool requeue = false;
597         int error = 0;
598
599         if (unlikely(status)) {
600                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
601                     && (jiffies - req->start_time) < req->timeout) {
602                         unsigned long flags;
603
604                         requeue = true;
605                         blk_mq_requeue_request(req);
606                         spin_lock_irqsave(req->q->queue_lock, flags);
607                         if (!blk_queue_stopped(req->q))
608                                 blk_mq_kick_requeue_list(req->q);
609                         spin_unlock_irqrestore(req->q->queue_lock, flags);
610                         goto release_iod;
611                 }
612
613                 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
614                         if (cmd_rq->ctx == CMD_CTX_CANCELLED)
615                                 error = -EINTR;
616                         else
617                                 error = status;
618                 } else {
619                         error = nvme_error_status(status);
620                 }
621         }
622
623         if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
624                 u32 result = le32_to_cpup(&cqe->result);
625                 req->special = (void *)(uintptr_t)result;
626         }
627
628         if (cmd_rq->aborted)
629                 dev_warn(nvmeq->dev->dev,
630                         "completing aborted command with status:%04x\n",
631                         error);
632
633 release_iod:
634         if (iod->nents) {
635                 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
636                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
637                 if (blk_integrity_rq(req)) {
638                         if (!rq_data_dir(req))
639                                 nvme_dif_remap(req, nvme_dif_complete);
640                         dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
641                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
642                 }
643         }
644         nvme_free_iod(nvmeq->dev, iod);
645
646         if (likely(!requeue))
647                 blk_mq_complete_request(req, error);
648 }
649
650 /* length is in bytes.  gfp flags indicates whether we may sleep. */
651 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
652                 int total_len, gfp_t gfp)
653 {
654         struct dma_pool *pool;
655         int length = total_len;
656         struct scatterlist *sg = iod->sg;
657         int dma_len = sg_dma_len(sg);
658         u64 dma_addr = sg_dma_address(sg);
659         u32 page_size = dev->page_size;
660         int offset = dma_addr & (page_size - 1);
661         __le64 *prp_list;
662         __le64 **list = iod_list(iod);
663         dma_addr_t prp_dma;
664         int nprps, i;
665
666         length -= (page_size - offset);
667         if (length <= 0)
668                 return total_len;
669
670         dma_len -= (page_size - offset);
671         if (dma_len) {
672                 dma_addr += (page_size - offset);
673         } else {
674                 sg = sg_next(sg);
675                 dma_addr = sg_dma_address(sg);
676                 dma_len = sg_dma_len(sg);
677         }
678
679         if (length <= page_size) {
680                 iod->first_dma = dma_addr;
681                 return total_len;
682         }
683
684         nprps = DIV_ROUND_UP(length, page_size);
685         if (nprps <= (256 / 8)) {
686                 pool = dev->prp_small_pool;
687                 iod->npages = 0;
688         } else {
689                 pool = dev->prp_page_pool;
690                 iod->npages = 1;
691         }
692
693         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
694         if (!prp_list) {
695                 iod->first_dma = dma_addr;
696                 iod->npages = -1;
697                 return (total_len - length) + page_size;
698         }
699         list[0] = prp_list;
700         iod->first_dma = prp_dma;
701         i = 0;
702         for (;;) {
703                 if (i == page_size >> 3) {
704                         __le64 *old_prp_list = prp_list;
705                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
706                         if (!prp_list)
707                                 return total_len - length;
708                         list[iod->npages++] = prp_list;
709                         prp_list[0] = old_prp_list[i - 1];
710                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
711                         i = 1;
712                 }
713                 prp_list[i++] = cpu_to_le64(dma_addr);
714                 dma_len -= page_size;
715                 dma_addr += page_size;
716                 length -= page_size;
717                 if (length <= 0)
718                         break;
719                 if (dma_len > 0)
720                         continue;
721                 BUG_ON(dma_len < 0);
722                 sg = sg_next(sg);
723                 dma_addr = sg_dma_address(sg);
724                 dma_len = sg_dma_len(sg);
725         }
726
727         return total_len;
728 }
729
730 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
731                 struct nvme_iod *iod)
732 {
733         struct nvme_command cmnd;
734
735         memcpy(&cmnd, req->cmd, sizeof(cmnd));
736         cmnd.rw.command_id = req->tag;
737         if (req->nr_phys_segments) {
738                 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
739                 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
740         }
741
742         __nvme_submit_cmd(nvmeq, &cmnd);
743 }
744
745 /*
746  * We reuse the small pool to allocate the 16-byte range here as it is not
747  * worth having a special pool for these or additional cases to handle freeing
748  * the iod.
749  */
750 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
751                 struct request *req, struct nvme_iod *iod)
752 {
753         struct nvme_dsm_range *range =
754                                 (struct nvme_dsm_range *)iod_list(iod)[0];
755         struct nvme_command cmnd;
756
757         range->cattr = cpu_to_le32(0);
758         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
759         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
760
761         memset(&cmnd, 0, sizeof(cmnd));
762         cmnd.dsm.opcode = nvme_cmd_dsm;
763         cmnd.dsm.command_id = req->tag;
764         cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
765         cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
766         cmnd.dsm.nr = 0;
767         cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
768
769         __nvme_submit_cmd(nvmeq, &cmnd);
770 }
771
772 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
773                                                                 int cmdid)
774 {
775         struct nvme_command cmnd;
776
777         memset(&cmnd, 0, sizeof(cmnd));
778         cmnd.common.opcode = nvme_cmd_flush;
779         cmnd.common.command_id = cmdid;
780         cmnd.common.nsid = cpu_to_le32(ns->ns_id);
781
782         __nvme_submit_cmd(nvmeq, &cmnd);
783 }
784
785 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
786                                                         struct nvme_ns *ns)
787 {
788         struct request *req = iod_get_private(iod);
789         struct nvme_command cmnd;
790         u16 control = 0;
791         u32 dsmgmt = 0;
792
793         if (req->cmd_flags & REQ_FUA)
794                 control |= NVME_RW_FUA;
795         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
796                 control |= NVME_RW_LR;
797
798         if (req->cmd_flags & REQ_RAHEAD)
799                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
800
801         memset(&cmnd, 0, sizeof(cmnd));
802         cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
803         cmnd.rw.command_id = req->tag;
804         cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
805         cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
806         cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
807         cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
808         cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
809
810         if (ns->ms) {
811                 switch (ns->pi_type) {
812                 case NVME_NS_DPS_PI_TYPE3:
813                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
814                         break;
815                 case NVME_NS_DPS_PI_TYPE1:
816                 case NVME_NS_DPS_PI_TYPE2:
817                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
818                                         NVME_RW_PRINFO_PRCHK_REF;
819                         cmnd.rw.reftag = cpu_to_le32(
820                                         nvme_block_nr(ns, blk_rq_pos(req)));
821                         break;
822                 }
823                 if (blk_integrity_rq(req))
824                         cmnd.rw.metadata =
825                                 cpu_to_le64(sg_dma_address(iod->meta_sg));
826                 else
827                         control |= NVME_RW_PRINFO_PRACT;
828         }
829
830         cmnd.rw.control = cpu_to_le16(control);
831         cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
832
833         __nvme_submit_cmd(nvmeq, &cmnd);
834
835         return 0;
836 }
837
838 /*
839  * NOTE: ns is NULL when called on the admin queue.
840  */
841 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
842                          const struct blk_mq_queue_data *bd)
843 {
844         struct nvme_ns *ns = hctx->queue->queuedata;
845         struct nvme_queue *nvmeq = hctx->driver_data;
846         struct nvme_dev *dev = nvmeq->dev;
847         struct request *req = bd->rq;
848         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
849         struct nvme_iod *iod;
850         enum dma_data_direction dma_dir;
851
852         /*
853          * If formated with metadata, require the block layer provide a buffer
854          * unless this namespace is formated such that the metadata can be
855          * stripped/generated by the controller with PRACT=1.
856          */
857         if (ns && ns->ms && !blk_integrity_rq(req)) {
858                 if (!(ns->pi_type && ns->ms == 8) &&
859                                         req->cmd_type != REQ_TYPE_DRV_PRIV) {
860                         blk_mq_complete_request(req, -EFAULT);
861                         return BLK_MQ_RQ_QUEUE_OK;
862                 }
863         }
864
865         iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
866         if (!iod)
867                 return BLK_MQ_RQ_QUEUE_BUSY;
868
869         if (req->cmd_flags & REQ_DISCARD) {
870                 void *range;
871                 /*
872                  * We reuse the small pool to allocate the 16-byte range here
873                  * as it is not worth having a special pool for these or
874                  * additional cases to handle freeing the iod.
875                  */
876                 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
877                                                 &iod->first_dma);
878                 if (!range)
879                         goto retry_cmd;
880                 iod_list(iod)[0] = (__le64 *)range;
881                 iod->npages = 0;
882         } else if (req->nr_phys_segments) {
883                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
884
885                 sg_init_table(iod->sg, req->nr_phys_segments);
886                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
887                 if (!iod->nents)
888                         goto error_cmd;
889
890                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
891                         goto retry_cmd;
892
893                 if (blk_rq_bytes(req) !=
894                     nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
895                         dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
896                         goto retry_cmd;
897                 }
898                 if (blk_integrity_rq(req)) {
899                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
900                                 goto error_cmd;
901
902                         sg_init_table(iod->meta_sg, 1);
903                         if (blk_rq_map_integrity_sg(
904                                         req->q, req->bio, iod->meta_sg) != 1)
905                                 goto error_cmd;
906
907                         if (rq_data_dir(req))
908                                 nvme_dif_remap(req, nvme_dif_prep);
909
910                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
911                                 goto error_cmd;
912                 }
913         }
914
915         nvme_set_info(cmd, iod, req_completion);
916         spin_lock_irq(&nvmeq->q_lock);
917         if (req->cmd_type == REQ_TYPE_DRV_PRIV)
918                 nvme_submit_priv(nvmeq, req, iod);
919         else if (req->cmd_flags & REQ_DISCARD)
920                 nvme_submit_discard(nvmeq, ns, req, iod);
921         else if (req->cmd_flags & REQ_FLUSH)
922                 nvme_submit_flush(nvmeq, ns, req->tag);
923         else
924                 nvme_submit_iod(nvmeq, iod, ns);
925
926         nvme_process_cq(nvmeq);
927         spin_unlock_irq(&nvmeq->q_lock);
928         return BLK_MQ_RQ_QUEUE_OK;
929
930  error_cmd:
931         nvme_free_iod(dev, iod);
932         return BLK_MQ_RQ_QUEUE_ERROR;
933  retry_cmd:
934         nvme_free_iod(dev, iod);
935         return BLK_MQ_RQ_QUEUE_BUSY;
936 }
937
938 static int nvme_process_cq(struct nvme_queue *nvmeq)
939 {
940         u16 head, phase;
941
942         head = nvmeq->cq_head;
943         phase = nvmeq->cq_phase;
944
945         for (;;) {
946                 void *ctx;
947                 nvme_completion_fn fn;
948                 struct nvme_completion cqe = nvmeq->cqes[head];
949                 if ((le16_to_cpu(cqe.status) & 1) != phase)
950                         break;
951                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
952                 if (++head == nvmeq->q_depth) {
953                         head = 0;
954                         phase = !phase;
955                 }
956                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
957                 fn(nvmeq, ctx, &cqe);
958         }
959
960         /* If the controller ignores the cq head doorbell and continuously
961          * writes to the queue, it is theoretically possible to wrap around
962          * the queue twice and mistakenly return IRQ_NONE.  Linux only
963          * requires that 0.1% of your interrupts are handled, so this isn't
964          * a big problem.
965          */
966         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
967                 return 0;
968
969         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
970         nvmeq->cq_head = head;
971         nvmeq->cq_phase = phase;
972
973         nvmeq->cqe_seen = 1;
974         return 1;
975 }
976
977 static irqreturn_t nvme_irq(int irq, void *data)
978 {
979         irqreturn_t result;
980         struct nvme_queue *nvmeq = data;
981         spin_lock(&nvmeq->q_lock);
982         nvme_process_cq(nvmeq);
983         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
984         nvmeq->cqe_seen = 0;
985         spin_unlock(&nvmeq->q_lock);
986         return result;
987 }
988
989 static irqreturn_t nvme_irq_check(int irq, void *data)
990 {
991         struct nvme_queue *nvmeq = data;
992         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
993         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
994                 return IRQ_NONE;
995         return IRQ_WAKE_THREAD;
996 }
997
998 /*
999  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1000  * if the result is positive, it's an NVM Express status code
1001  */
1002 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1003                 void *buffer, void __user *ubuffer, unsigned bufflen,
1004                 u32 *result, unsigned timeout)
1005 {
1006         bool write = cmd->common.opcode & 1;
1007         struct bio *bio = NULL;
1008         struct request *req;
1009         int ret;
1010
1011         req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1012         if (IS_ERR(req))
1013                 return PTR_ERR(req);
1014
1015         req->cmd_type = REQ_TYPE_DRV_PRIV;
1016         req->cmd_flags |= REQ_FAILFAST_DRIVER;
1017         req->__data_len = 0;
1018         req->__sector = (sector_t) -1;
1019         req->bio = req->biotail = NULL;
1020
1021         req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1022
1023         req->cmd = (unsigned char *)cmd;
1024         req->cmd_len = sizeof(struct nvme_command);
1025         req->special = (void *)0;
1026
1027         if (buffer && bufflen) {
1028                 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1029                 if (ret)
1030                         goto out;
1031         } else if (ubuffer && bufflen) {
1032                 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1033                 if (ret)
1034                         goto out;
1035                 bio = req->bio;
1036         }
1037
1038         blk_execute_rq(req->q, NULL, req, 0);
1039         if (bio)
1040                 blk_rq_unmap_user(bio);
1041         if (result)
1042                 *result = (u32)(uintptr_t)req->special;
1043         ret = req->errors;
1044  out:
1045         blk_mq_free_request(req);
1046         return ret;
1047 }
1048
1049 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1050                 void *buffer, unsigned bufflen)
1051 {
1052         return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1053 }
1054
1055 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1056 {
1057         struct nvme_queue *nvmeq = dev->queues[0];
1058         struct nvme_command c;
1059         struct nvme_cmd_info *cmd_info;
1060         struct request *req;
1061
1062         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1063         if (IS_ERR(req))
1064                 return PTR_ERR(req);
1065
1066         req->cmd_flags |= REQ_NO_TIMEOUT;
1067         cmd_info = blk_mq_rq_to_pdu(req);
1068         nvme_set_info(cmd_info, NULL, async_req_completion);
1069
1070         memset(&c, 0, sizeof(c));
1071         c.common.opcode = nvme_admin_async_event;
1072         c.common.command_id = req->tag;
1073
1074         blk_mq_free_request(req);
1075         __nvme_submit_cmd(nvmeq, &c);
1076         return 0;
1077 }
1078
1079 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1080                         struct nvme_command *cmd,
1081                         struct async_cmd_info *cmdinfo, unsigned timeout)
1082 {
1083         struct nvme_queue *nvmeq = dev->queues[0];
1084         struct request *req;
1085         struct nvme_cmd_info *cmd_rq;
1086
1087         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1088         if (IS_ERR(req))
1089                 return PTR_ERR(req);
1090
1091         req->timeout = timeout;
1092         cmd_rq = blk_mq_rq_to_pdu(req);
1093         cmdinfo->req = req;
1094         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1095         cmdinfo->status = -EINTR;
1096
1097         cmd->common.command_id = req->tag;
1098
1099         nvme_submit_cmd(nvmeq, cmd);
1100         return 0;
1101 }
1102
1103 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1104 {
1105         struct nvme_command c;
1106
1107         memset(&c, 0, sizeof(c));
1108         c.delete_queue.opcode = opcode;
1109         c.delete_queue.qid = cpu_to_le16(id);
1110
1111         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1112 }
1113
1114 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1115                                                 struct nvme_queue *nvmeq)
1116 {
1117         struct nvme_command c;
1118         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1119
1120         /*
1121          * Note: we (ab)use the fact the the prp fields survive if no data
1122          * is attached to the request.
1123          */
1124         memset(&c, 0, sizeof(c));
1125         c.create_cq.opcode = nvme_admin_create_cq;
1126         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1127         c.create_cq.cqid = cpu_to_le16(qid);
1128         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1129         c.create_cq.cq_flags = cpu_to_le16(flags);
1130         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1131
1132         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1133 }
1134
1135 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1136                                                 struct nvme_queue *nvmeq)
1137 {
1138         struct nvme_command c;
1139         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1140
1141         /*
1142          * Note: we (ab)use the fact the the prp fields survive if no data
1143          * is attached to the request.
1144          */
1145         memset(&c, 0, sizeof(c));
1146         c.create_sq.opcode = nvme_admin_create_sq;
1147         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1148         c.create_sq.sqid = cpu_to_le16(qid);
1149         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1150         c.create_sq.sq_flags = cpu_to_le16(flags);
1151         c.create_sq.cqid = cpu_to_le16(qid);
1152
1153         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1154 }
1155
1156 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1157 {
1158         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1159 }
1160
1161 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1162 {
1163         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1164 }
1165
1166 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1167 {
1168         struct nvme_command c = { };
1169         int error;
1170
1171         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1172         c.identify.opcode = nvme_admin_identify;
1173         c.identify.cns = cpu_to_le32(1);
1174
1175         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1176         if (!*id)
1177                 return -ENOMEM;
1178
1179         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1180                         sizeof(struct nvme_id_ctrl));
1181         if (error)
1182                 kfree(*id);
1183         return error;
1184 }
1185
1186 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1187                 struct nvme_id_ns **id)
1188 {
1189         struct nvme_command c = { };
1190         int error;
1191
1192         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1193         c.identify.opcode = nvme_admin_identify,
1194         c.identify.nsid = cpu_to_le32(nsid),
1195
1196         *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1197         if (!*id)
1198                 return -ENOMEM;
1199
1200         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1201                         sizeof(struct nvme_id_ns));
1202         if (error)
1203                 kfree(*id);
1204         return error;
1205 }
1206
1207 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1208                                         dma_addr_t dma_addr, u32 *result)
1209 {
1210         struct nvme_command c;
1211
1212         memset(&c, 0, sizeof(c));
1213         c.features.opcode = nvme_admin_get_features;
1214         c.features.nsid = cpu_to_le32(nsid);
1215         c.features.prp1 = cpu_to_le64(dma_addr);
1216         c.features.fid = cpu_to_le32(fid);
1217
1218         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1219                         result, 0);
1220 }
1221
1222 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1223                                         dma_addr_t dma_addr, u32 *result)
1224 {
1225         struct nvme_command c;
1226
1227         memset(&c, 0, sizeof(c));
1228         c.features.opcode = nvme_admin_set_features;
1229         c.features.prp1 = cpu_to_le64(dma_addr);
1230         c.features.fid = cpu_to_le32(fid);
1231         c.features.dword11 = cpu_to_le32(dword11);
1232
1233         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1234                         result, 0);
1235 }
1236
1237 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1238 {
1239         struct nvme_command c = { };
1240         int error;
1241
1242         c.common.opcode = nvme_admin_get_log_page,
1243         c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1244         c.common.cdw10[0] = cpu_to_le32(
1245                         (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1246                          NVME_LOG_SMART),
1247
1248         *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1249         if (!*log)
1250                 return -ENOMEM;
1251
1252         error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1253                         sizeof(struct nvme_smart_log));
1254         if (error)
1255                 kfree(*log);
1256         return error;
1257 }
1258
1259 /**
1260  * nvme_abort_req - Attempt aborting a request
1261  *
1262  * Schedule controller reset if the command was already aborted once before and
1263  * still hasn't been returned to the driver, or if this is the admin queue.
1264  */
1265 static void nvme_abort_req(struct request *req)
1266 {
1267         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1268         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1269         struct nvme_dev *dev = nvmeq->dev;
1270         struct request *abort_req;
1271         struct nvme_cmd_info *abort_cmd;
1272         struct nvme_command cmd;
1273
1274         if (!nvmeq->qid || cmd_rq->aborted) {
1275                 spin_lock(&dev_list_lock);
1276                 if (!__nvme_reset(dev)) {
1277                         dev_warn(dev->dev,
1278                                  "I/O %d QID %d timeout, reset controller\n",
1279                                  req->tag, nvmeq->qid);
1280                 }
1281                 spin_unlock(&dev_list_lock);
1282                 return;
1283         }
1284
1285         if (!dev->abort_limit)
1286                 return;
1287
1288         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1289                                                                         false);
1290         if (IS_ERR(abort_req))
1291                 return;
1292
1293         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1294         nvme_set_info(abort_cmd, abort_req, abort_completion);
1295
1296         memset(&cmd, 0, sizeof(cmd));
1297         cmd.abort.opcode = nvme_admin_abort_cmd;
1298         cmd.abort.cid = req->tag;
1299         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1300         cmd.abort.command_id = abort_req->tag;
1301
1302         --dev->abort_limit;
1303         cmd_rq->aborted = 1;
1304
1305         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1306                                                         nvmeq->qid);
1307         nvme_submit_cmd(dev->queues[0], &cmd);
1308 }
1309
1310 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1311 {
1312         struct nvme_queue *nvmeq = data;
1313         void *ctx;
1314         nvme_completion_fn fn;
1315         struct nvme_cmd_info *cmd;
1316         struct nvme_completion cqe;
1317
1318         if (!blk_mq_request_started(req))
1319                 return;
1320
1321         cmd = blk_mq_rq_to_pdu(req);
1322
1323         if (cmd->ctx == CMD_CTX_CANCELLED)
1324                 return;
1325
1326         if (blk_queue_dying(req->q))
1327                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1328         else
1329                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1330
1331
1332         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1333                                                 req->tag, nvmeq->qid);
1334         ctx = cancel_cmd_info(cmd, &fn);
1335         fn(nvmeq, ctx, &cqe);
1336 }
1337
1338 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1339 {
1340         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1341         struct nvme_queue *nvmeq = cmd->nvmeq;
1342
1343         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1344                                                         nvmeq->qid);
1345         spin_lock_irq(&nvmeq->q_lock);
1346         nvme_abort_req(req);
1347         spin_unlock_irq(&nvmeq->q_lock);
1348
1349         /*
1350          * The aborted req will be completed on receiving the abort req.
1351          * We enable the timer again. If hit twice, it'll cause a device reset,
1352          * as the device then is in a faulty state.
1353          */
1354         return BLK_EH_RESET_TIMER;
1355 }
1356
1357 static void nvme_free_queue(struct nvme_queue *nvmeq)
1358 {
1359         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1360                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1361         if (nvmeq->sq_cmds)
1362                 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1363                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1364         kfree(nvmeq);
1365 }
1366
1367 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1368 {
1369         int i;
1370
1371         for (i = dev->queue_count - 1; i >= lowest; i--) {
1372                 struct nvme_queue *nvmeq = dev->queues[i];
1373                 dev->queue_count--;
1374                 dev->queues[i] = NULL;
1375                 nvme_free_queue(nvmeq);
1376         }
1377 }
1378
1379 /**
1380  * nvme_suspend_queue - put queue into suspended state
1381  * @nvmeq - queue to suspend
1382  */
1383 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1384 {
1385         int vector;
1386
1387         spin_lock_irq(&nvmeq->q_lock);
1388         if (nvmeq->cq_vector == -1) {
1389                 spin_unlock_irq(&nvmeq->q_lock);
1390                 return 1;
1391         }
1392         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1393         nvmeq->dev->online_queues--;
1394         nvmeq->cq_vector = -1;
1395         spin_unlock_irq(&nvmeq->q_lock);
1396
1397         if (!nvmeq->qid && nvmeq->dev->admin_q)
1398                 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1399
1400         irq_set_affinity_hint(vector, NULL);
1401         free_irq(vector, nvmeq);
1402
1403         return 0;
1404 }
1405
1406 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1407 {
1408         spin_lock_irq(&nvmeq->q_lock);
1409         if (nvmeq->tags && *nvmeq->tags)
1410                 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1411         spin_unlock_irq(&nvmeq->q_lock);
1412 }
1413
1414 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1415 {
1416         struct nvme_queue *nvmeq = dev->queues[qid];
1417
1418         if (!nvmeq)
1419                 return;
1420         if (nvme_suspend_queue(nvmeq))
1421                 return;
1422
1423         /* Don't tell the adapter to delete the admin queue.
1424          * Don't tell a removed adapter to delete IO queues. */
1425         if (qid && readl(&dev->bar->csts) != -1) {
1426                 adapter_delete_sq(dev, qid);
1427                 adapter_delete_cq(dev, qid);
1428         }
1429
1430         spin_lock_irq(&nvmeq->q_lock);
1431         nvme_process_cq(nvmeq);
1432         spin_unlock_irq(&nvmeq->q_lock);
1433 }
1434
1435 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1436                                 int entry_size)
1437 {
1438         int q_depth = dev->q_depth;
1439         unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1440
1441         if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1442                 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1443                 mem_per_q = round_down(mem_per_q, dev->page_size);
1444                 q_depth = div_u64(mem_per_q, entry_size);
1445
1446                 /*
1447                  * Ensure the reduced q_depth is above some threshold where it
1448                  * would be better to map queues in system memory with the
1449                  * original depth
1450                  */
1451                 if (q_depth < 64)
1452                         return -ENOMEM;
1453         }
1454
1455         return q_depth;
1456 }
1457
1458 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1459                                 int qid, int depth)
1460 {
1461         if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1462                 unsigned offset = (qid - 1) *
1463                                         roundup(SQ_SIZE(depth), dev->page_size);
1464                 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1465                 nvmeq->sq_cmds_io = dev->cmb + offset;
1466         } else {
1467                 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1468                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1469                 if (!nvmeq->sq_cmds)
1470                         return -ENOMEM;
1471         }
1472
1473         return 0;
1474 }
1475
1476 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1477                                                         int depth)
1478 {
1479         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1480         if (!nvmeq)
1481                 return NULL;
1482
1483         nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1484                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1485         if (!nvmeq->cqes)
1486                 goto free_nvmeq;
1487
1488         if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1489                 goto free_cqdma;
1490
1491         nvmeq->q_dmadev = dev->dev;
1492         nvmeq->dev = dev;
1493         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1494                         dev->instance, qid);
1495         spin_lock_init(&nvmeq->q_lock);
1496         nvmeq->cq_head = 0;
1497         nvmeq->cq_phase = 1;
1498         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1499         nvmeq->q_depth = depth;
1500         nvmeq->qid = qid;
1501         nvmeq->cq_vector = -1;
1502         dev->queues[qid] = nvmeq;
1503
1504         /* make sure queue descriptor is set before queue count, for kthread */
1505         mb();
1506         dev->queue_count++;
1507
1508         return nvmeq;
1509
1510  free_cqdma:
1511         dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1512                                                         nvmeq->cq_dma_addr);
1513  free_nvmeq:
1514         kfree(nvmeq);
1515         return NULL;
1516 }
1517
1518 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1519                                                         const char *name)
1520 {
1521         if (use_threaded_interrupts)
1522                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1523                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1524                                         name, nvmeq);
1525         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1526                                 IRQF_SHARED, name, nvmeq);
1527 }
1528
1529 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1530 {
1531         struct nvme_dev *dev = nvmeq->dev;
1532
1533         spin_lock_irq(&nvmeq->q_lock);
1534         nvmeq->sq_tail = 0;
1535         nvmeq->cq_head = 0;
1536         nvmeq->cq_phase = 1;
1537         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1538         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1539         dev->online_queues++;
1540         spin_unlock_irq(&nvmeq->q_lock);
1541 }
1542
1543 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1544 {
1545         struct nvme_dev *dev = nvmeq->dev;
1546         int result;
1547
1548         nvmeq->cq_vector = qid - 1;
1549         result = adapter_alloc_cq(dev, qid, nvmeq);
1550         if (result < 0)
1551                 return result;
1552
1553         result = adapter_alloc_sq(dev, qid, nvmeq);
1554         if (result < 0)
1555                 goto release_cq;
1556
1557         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1558         if (result < 0)
1559                 goto release_sq;
1560
1561         nvme_init_queue(nvmeq, qid);
1562         return result;
1563
1564  release_sq:
1565         adapter_delete_sq(dev, qid);
1566  release_cq:
1567         adapter_delete_cq(dev, qid);
1568         return result;
1569 }
1570
1571 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1572 {
1573         unsigned long timeout;
1574         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1575
1576         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1577
1578         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1579                 msleep(100);
1580                 if (fatal_signal_pending(current))
1581                         return -EINTR;
1582                 if (time_after(jiffies, timeout)) {
1583                         dev_err(dev->dev,
1584                                 "Device not ready; aborting %s\n", enabled ?
1585                                                 "initialisation" : "reset");
1586                         return -ENODEV;
1587                 }
1588         }
1589
1590         return 0;
1591 }
1592
1593 /*
1594  * If the device has been passed off to us in an enabled state, just clear
1595  * the enabled bit.  The spec says we should set the 'shutdown notification
1596  * bits', but doing so may cause the device to complete commands to the
1597  * admin queue ... and we don't know what memory that might be pointing at!
1598  */
1599 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1600 {
1601         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1602         dev->ctrl_config &= ~NVME_CC_ENABLE;
1603         writel(dev->ctrl_config, &dev->bar->cc);
1604
1605         return nvme_wait_ready(dev, cap, false);
1606 }
1607
1608 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1609 {
1610         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1611         dev->ctrl_config |= NVME_CC_ENABLE;
1612         writel(dev->ctrl_config, &dev->bar->cc);
1613
1614         return nvme_wait_ready(dev, cap, true);
1615 }
1616
1617 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1618 {
1619         unsigned long timeout;
1620
1621         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1622         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1623
1624         writel(dev->ctrl_config, &dev->bar->cc);
1625
1626         timeout = SHUTDOWN_TIMEOUT + jiffies;
1627         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1628                                                         NVME_CSTS_SHST_CMPLT) {
1629                 msleep(100);
1630                 if (fatal_signal_pending(current))
1631                         return -EINTR;
1632                 if (time_after(jiffies, timeout)) {
1633                         dev_err(dev->dev,
1634                                 "Device shutdown incomplete; abort shutdown\n");
1635                         return -ENODEV;
1636                 }
1637         }
1638
1639         return 0;
1640 }
1641
1642 static struct blk_mq_ops nvme_mq_admin_ops = {
1643         .queue_rq       = nvme_queue_rq,
1644         .map_queue      = blk_mq_map_queue,
1645         .init_hctx      = nvme_admin_init_hctx,
1646         .exit_hctx      = nvme_admin_exit_hctx,
1647         .init_request   = nvme_admin_init_request,
1648         .timeout        = nvme_timeout,
1649 };
1650
1651 static struct blk_mq_ops nvme_mq_ops = {
1652         .queue_rq       = nvme_queue_rq,
1653         .map_queue      = blk_mq_map_queue,
1654         .init_hctx      = nvme_init_hctx,
1655         .init_request   = nvme_init_request,
1656         .timeout        = nvme_timeout,
1657 };
1658
1659 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1660 {
1661         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1662                 blk_cleanup_queue(dev->admin_q);
1663                 blk_mq_free_tag_set(&dev->admin_tagset);
1664         }
1665 }
1666
1667 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1668 {
1669         if (!dev->admin_q) {
1670                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1671                 dev->admin_tagset.nr_hw_queues = 1;
1672                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1673                 dev->admin_tagset.reserved_tags = 1;
1674                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1675                 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1676                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1677                 dev->admin_tagset.driver_data = dev;
1678
1679                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1680                         return -ENOMEM;
1681
1682                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1683                 if (IS_ERR(dev->admin_q)) {
1684                         blk_mq_free_tag_set(&dev->admin_tagset);
1685                         return -ENOMEM;
1686                 }
1687                 if (!blk_get_queue(dev->admin_q)) {
1688                         nvme_dev_remove_admin(dev);
1689                         dev->admin_q = NULL;
1690                         return -ENODEV;
1691                 }
1692         } else
1693                 blk_mq_unfreeze_queue(dev->admin_q);
1694
1695         return 0;
1696 }
1697
1698 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1699 {
1700         int result;
1701         u32 aqa;
1702         u64 cap = readq(&dev->bar->cap);
1703         struct nvme_queue *nvmeq;
1704         unsigned page_shift = PAGE_SHIFT;
1705         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1706         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1707
1708         if (page_shift < dev_page_min) {
1709                 dev_err(dev->dev,
1710                                 "Minimum device page size (%u) too large for "
1711                                 "host (%u)\n", 1 << dev_page_min,
1712                                 1 << page_shift);
1713                 return -ENODEV;
1714         }
1715         if (page_shift > dev_page_max) {
1716                 dev_info(dev->dev,
1717                                 "Device maximum page size (%u) smaller than "
1718                                 "host (%u); enabling work-around\n",
1719                                 1 << dev_page_max, 1 << page_shift);
1720                 page_shift = dev_page_max;
1721         }
1722
1723         dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1724                                                 NVME_CAP_NSSRC(cap) : 0;
1725
1726         if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1727                 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1728
1729         result = nvme_disable_ctrl(dev, cap);
1730         if (result < 0)
1731                 return result;
1732
1733         nvmeq = dev->queues[0];
1734         if (!nvmeq) {
1735                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1736                 if (!nvmeq)
1737                         return -ENOMEM;
1738         }
1739
1740         aqa = nvmeq->q_depth - 1;
1741         aqa |= aqa << 16;
1742
1743         dev->page_size = 1 << page_shift;
1744
1745         dev->ctrl_config = NVME_CC_CSS_NVM;
1746         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1747         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1748         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1749
1750         writel(aqa, &dev->bar->aqa);
1751         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1752         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1753
1754         result = nvme_enable_ctrl(dev, cap);
1755         if (result)
1756                 goto free_nvmeq;
1757
1758         nvmeq->cq_vector = 0;
1759         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1760         if (result) {
1761                 nvmeq->cq_vector = -1;
1762                 goto free_nvmeq;
1763         }
1764
1765         return result;
1766
1767  free_nvmeq:
1768         nvme_free_queues(dev, 0);
1769         return result;
1770 }
1771
1772 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1773 {
1774         struct nvme_dev *dev = ns->dev;
1775         struct nvme_user_io io;
1776         struct nvme_command c;
1777         unsigned length, meta_len;
1778         int status, write;
1779         dma_addr_t meta_dma = 0;
1780         void *meta = NULL;
1781         void __user *metadata;
1782
1783         if (copy_from_user(&io, uio, sizeof(io)))
1784                 return -EFAULT;
1785
1786         switch (io.opcode) {
1787         case nvme_cmd_write:
1788         case nvme_cmd_read:
1789         case nvme_cmd_compare:
1790                 break;
1791         default:
1792                 return -EINVAL;
1793         }
1794
1795         length = (io.nblocks + 1) << ns->lba_shift;
1796         meta_len = (io.nblocks + 1) * ns->ms;
1797         metadata = (void __user *)(uintptr_t)io.metadata;
1798         write = io.opcode & 1;
1799
1800         if (ns->ext) {
1801                 length += meta_len;
1802                 meta_len = 0;
1803         }
1804         if (meta_len) {
1805                 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1806                         return -EINVAL;
1807
1808                 meta = dma_alloc_coherent(dev->dev, meta_len,
1809                                                 &meta_dma, GFP_KERNEL);
1810
1811                 if (!meta) {
1812                         status = -ENOMEM;
1813                         goto unmap;
1814                 }
1815                 if (write) {
1816                         if (copy_from_user(meta, metadata, meta_len)) {
1817                                 status = -EFAULT;
1818                                 goto unmap;
1819                         }
1820                 }
1821         }
1822
1823         memset(&c, 0, sizeof(c));
1824         c.rw.opcode = io.opcode;
1825         c.rw.flags = io.flags;
1826         c.rw.nsid = cpu_to_le32(ns->ns_id);
1827         c.rw.slba = cpu_to_le64(io.slba);
1828         c.rw.length = cpu_to_le16(io.nblocks);
1829         c.rw.control = cpu_to_le16(io.control);
1830         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1831         c.rw.reftag = cpu_to_le32(io.reftag);
1832         c.rw.apptag = cpu_to_le16(io.apptag);
1833         c.rw.appmask = cpu_to_le16(io.appmask);
1834         c.rw.metadata = cpu_to_le64(meta_dma);
1835
1836         status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1837                         (void __user *)(uintptr_t)io.addr, length, NULL, 0);
1838  unmap:
1839         if (meta) {
1840                 if (status == NVME_SC_SUCCESS && !write) {
1841                         if (copy_to_user(metadata, meta, meta_len))
1842                                 status = -EFAULT;
1843                 }
1844                 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1845         }
1846         return status;
1847 }
1848
1849 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1850                         struct nvme_passthru_cmd __user *ucmd)
1851 {
1852         struct nvme_passthru_cmd cmd;
1853         struct nvme_command c;
1854         unsigned timeout = 0;
1855         int status;
1856
1857         if (!capable(CAP_SYS_ADMIN))
1858                 return -EACCES;
1859         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1860                 return -EFAULT;
1861
1862         memset(&c, 0, sizeof(c));
1863         c.common.opcode = cmd.opcode;
1864         c.common.flags = cmd.flags;
1865         c.common.nsid = cpu_to_le32(cmd.nsid);
1866         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1867         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1868         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1869         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1870         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1871         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1872         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1873         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1874
1875         if (cmd.timeout_ms)
1876                 timeout = msecs_to_jiffies(cmd.timeout_ms);
1877
1878         status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1879                         NULL, (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1880                         &cmd.result, timeout);
1881         if (status >= 0) {
1882                 if (put_user(cmd.result, &ucmd->result))
1883                         return -EFAULT;
1884         }
1885
1886         return status;
1887 }
1888
1889 static int nvme_subsys_reset(struct nvme_dev *dev)
1890 {
1891         if (!dev->subsystem)
1892                 return -ENOTTY;
1893
1894         writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1895         return 0;
1896 }
1897
1898 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1899                                                         unsigned long arg)
1900 {
1901         struct nvme_ns *ns = bdev->bd_disk->private_data;
1902
1903         switch (cmd) {
1904         case NVME_IOCTL_ID:
1905                 force_successful_syscall_return();
1906                 return ns->ns_id;
1907         case NVME_IOCTL_ADMIN_CMD:
1908                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1909         case NVME_IOCTL_IO_CMD:
1910                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1911         case NVME_IOCTL_SUBMIT_IO:
1912                 return nvme_submit_io(ns, (void __user *)arg);
1913         case SG_GET_VERSION_NUM:
1914                 return nvme_sg_get_version_num((void __user *)arg);
1915         case SG_IO:
1916                 return nvme_sg_io(ns, (void __user *)arg);
1917         default:
1918                 return -ENOTTY;
1919         }
1920 }
1921
1922 #ifdef CONFIG_COMPAT
1923 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1924                                         unsigned int cmd, unsigned long arg)
1925 {
1926         switch (cmd) {
1927         case SG_IO:
1928                 return -ENOIOCTLCMD;
1929         }
1930         return nvme_ioctl(bdev, mode, cmd, arg);
1931 }
1932 #else
1933 #define nvme_compat_ioctl       NULL
1934 #endif
1935
1936 static void nvme_free_dev(struct kref *kref);
1937 static void nvme_free_ns(struct kref *kref)
1938 {
1939         struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
1940
1941         if (ns->type == NVME_NS_LIGHTNVM)
1942                 nvme_nvm_unregister(ns->queue, ns->disk->disk_name);
1943
1944         spin_lock(&dev_list_lock);
1945         ns->disk->private_data = NULL;
1946         spin_unlock(&dev_list_lock);
1947
1948         kref_put(&ns->dev->kref, nvme_free_dev);
1949         put_disk(ns->disk);
1950         kfree(ns);
1951 }
1952
1953 static int nvme_open(struct block_device *bdev, fmode_t mode)
1954 {
1955         int ret = 0;
1956         struct nvme_ns *ns;
1957
1958         spin_lock(&dev_list_lock);
1959         ns = bdev->bd_disk->private_data;
1960         if (!ns)
1961                 ret = -ENXIO;
1962         else if (!kref_get_unless_zero(&ns->kref))
1963                 ret = -ENXIO;
1964         spin_unlock(&dev_list_lock);
1965
1966         return ret;
1967 }
1968
1969 static void nvme_release(struct gendisk *disk, fmode_t mode)
1970 {
1971         struct nvme_ns *ns = disk->private_data;
1972         kref_put(&ns->kref, nvme_free_ns);
1973 }
1974
1975 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1976 {
1977         /* some standard values */
1978         geo->heads = 1 << 6;
1979         geo->sectors = 1 << 5;
1980         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1981         return 0;
1982 }
1983
1984 static void nvme_config_discard(struct nvme_ns *ns)
1985 {
1986         u32 logical_block_size = queue_logical_block_size(ns->queue);
1987         ns->queue->limits.discard_zeroes_data = 0;
1988         ns->queue->limits.discard_alignment = logical_block_size;
1989         ns->queue->limits.discard_granularity = logical_block_size;
1990         blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
1991         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1992 }
1993
1994 static int nvme_revalidate_disk(struct gendisk *disk)
1995 {
1996         struct nvme_ns *ns = disk->private_data;
1997         struct nvme_dev *dev = ns->dev;
1998         struct nvme_id_ns *id;
1999         u8 lbaf, pi_type;
2000         u16 old_ms;
2001         unsigned short bs;
2002
2003         if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2004                 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2005                                                 dev->instance, ns->ns_id);
2006                 return -ENODEV;
2007         }
2008         if (id->ncap == 0) {
2009                 kfree(id);
2010                 return -ENODEV;
2011         }
2012
2013         if (nvme_nvm_ns_supported(ns, id) && ns->type != NVME_NS_LIGHTNVM) {
2014                 if (nvme_nvm_register(ns->queue, disk->disk_name)) {
2015                         dev_warn(dev->dev,
2016                                 "%s: LightNVM init failure\n", __func__);
2017                         kfree(id);
2018                         return -ENODEV;
2019                 }
2020                 ns->type = NVME_NS_LIGHTNVM;
2021         }
2022
2023         old_ms = ns->ms;
2024         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2025         ns->lba_shift = id->lbaf[lbaf].ds;
2026         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2027         ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2028
2029         /*
2030          * If identify namespace failed, use default 512 byte block size so
2031          * block layer can use before failing read/write for 0 capacity.
2032          */
2033         if (ns->lba_shift == 0)
2034                 ns->lba_shift = 9;
2035         bs = 1 << ns->lba_shift;
2036
2037         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2038         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2039                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
2040
2041         blk_mq_freeze_queue(disk->queue);
2042         if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2043                                 ns->ms != old_ms ||
2044                                 bs != queue_logical_block_size(disk->queue) ||
2045                                 (ns->ms && ns->ext)))
2046                 blk_integrity_unregister(disk);
2047
2048         ns->pi_type = pi_type;
2049         blk_queue_logical_block_size(ns->queue, bs);
2050
2051         if (ns->ms && !ns->ext)
2052                 nvme_init_integrity(ns);
2053
2054         if ((ns->ms && !(ns->ms == 8 && ns->pi_type) &&
2055                                                 !blk_get_integrity(disk)) ||
2056                                                 ns->type == NVME_NS_LIGHTNVM)
2057                 set_capacity(disk, 0);
2058         else
2059                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2060
2061         if (dev->oncs & NVME_CTRL_ONCS_DSM)
2062                 nvme_config_discard(ns);
2063         blk_mq_unfreeze_queue(disk->queue);
2064
2065         kfree(id);
2066         return 0;
2067 }
2068
2069 static char nvme_pr_type(enum pr_type type)
2070 {
2071         switch (type) {
2072         case PR_WRITE_EXCLUSIVE:
2073                 return 1;
2074         case PR_EXCLUSIVE_ACCESS:
2075                 return 2;
2076         case PR_WRITE_EXCLUSIVE_REG_ONLY:
2077                 return 3;
2078         case PR_EXCLUSIVE_ACCESS_REG_ONLY:
2079                 return 4;
2080         case PR_WRITE_EXCLUSIVE_ALL_REGS:
2081                 return 5;
2082         case PR_EXCLUSIVE_ACCESS_ALL_REGS:
2083                 return 6;
2084         default:
2085                 return 0;
2086         }
2087 };
2088
2089 static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
2090                                 u64 key, u64 sa_key, u8 op)
2091 {
2092         struct nvme_ns *ns = bdev->bd_disk->private_data;
2093         struct nvme_command c;
2094         u8 data[16] = { 0, };
2095
2096         put_unaligned_le64(key, &data[0]);
2097         put_unaligned_le64(sa_key, &data[8]);
2098
2099         memset(&c, 0, sizeof(c));
2100         c.common.opcode = op;
2101         c.common.nsid = cpu_to_le32(ns->ns_id);
2102         c.common.cdw10[0] = cpu_to_le32(cdw10);
2103
2104         return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
2105 }
2106
2107 static int nvme_pr_register(struct block_device *bdev, u64 old,
2108                 u64 new, unsigned flags)
2109 {
2110         u32 cdw10;
2111
2112         if (flags & ~PR_FL_IGNORE_KEY)
2113                 return -EOPNOTSUPP;
2114
2115         cdw10 = old ? 2 : 0;
2116         cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
2117         cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
2118         return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
2119 }
2120
2121 static int nvme_pr_reserve(struct block_device *bdev, u64 key,
2122                 enum pr_type type, unsigned flags)
2123 {
2124         u32 cdw10;
2125
2126         if (flags & ~PR_FL_IGNORE_KEY)
2127                 return -EOPNOTSUPP;
2128
2129         cdw10 = nvme_pr_type(type) << 8;
2130         cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
2131         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
2132 }
2133
2134 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
2135                 enum pr_type type, bool abort)
2136 {
2137         u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
2138         return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
2139 }
2140
2141 static int nvme_pr_clear(struct block_device *bdev, u64 key)
2142 {
2143         u32 cdw10 = 1 | key ? 1 << 3 : 0;
2144         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
2145 }
2146
2147 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
2148 {
2149         u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
2150         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
2151 }
2152
2153 static const struct pr_ops nvme_pr_ops = {
2154         .pr_register    = nvme_pr_register,
2155         .pr_reserve     = nvme_pr_reserve,
2156         .pr_release     = nvme_pr_release,
2157         .pr_preempt     = nvme_pr_preempt,
2158         .pr_clear       = nvme_pr_clear,
2159 };
2160
2161 static const struct block_device_operations nvme_fops = {
2162         .owner          = THIS_MODULE,
2163         .ioctl          = nvme_ioctl,
2164         .compat_ioctl   = nvme_compat_ioctl,
2165         .open           = nvme_open,
2166         .release        = nvme_release,
2167         .getgeo         = nvme_getgeo,
2168         .revalidate_disk= nvme_revalidate_disk,
2169         .pr_ops         = &nvme_pr_ops,
2170 };
2171
2172 static int nvme_kthread(void *data)
2173 {
2174         struct nvme_dev *dev, *next;
2175
2176         while (!kthread_should_stop()) {
2177                 set_current_state(TASK_INTERRUPTIBLE);
2178                 spin_lock(&dev_list_lock);
2179                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2180                         int i;
2181                         u32 csts = readl(&dev->bar->csts);
2182
2183                         if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2184                                                         csts & NVME_CSTS_CFS) {
2185                                 if (!__nvme_reset(dev)) {
2186                                         dev_warn(dev->dev,
2187                                                 "Failed status: %x, reset controller\n",
2188                                                 readl(&dev->bar->csts));
2189                                 }
2190                                 continue;
2191                         }
2192                         for (i = 0; i < dev->queue_count; i++) {
2193                                 struct nvme_queue *nvmeq = dev->queues[i];
2194                                 if (!nvmeq)
2195                                         continue;
2196                                 spin_lock_irq(&nvmeq->q_lock);
2197                                 nvme_process_cq(nvmeq);
2198
2199                                 while ((i == 0) && (dev->event_limit > 0)) {
2200                                         if (nvme_submit_async_admin_req(dev))
2201                                                 break;
2202                                         dev->event_limit--;
2203                                 }
2204                                 spin_unlock_irq(&nvmeq->q_lock);
2205                         }
2206                 }
2207                 spin_unlock(&dev_list_lock);
2208                 schedule_timeout(round_jiffies_relative(HZ));
2209         }
2210         return 0;
2211 }
2212
2213 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2214 {
2215         struct nvme_ns *ns;
2216         struct gendisk *disk;
2217         int node = dev_to_node(dev->dev);
2218
2219         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2220         if (!ns)
2221                 return;
2222
2223         ns->queue = blk_mq_init_queue(&dev->tagset);
2224         if (IS_ERR(ns->queue))
2225                 goto out_free_ns;
2226         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2227         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2228         ns->dev = dev;
2229         ns->queue->queuedata = ns;
2230
2231         disk = alloc_disk_node(0, node);
2232         if (!disk)
2233                 goto out_free_queue;
2234
2235         kref_init(&ns->kref);
2236         ns->ns_id = nsid;
2237         ns->disk = disk;
2238         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2239         list_add_tail(&ns->list, &dev->namespaces);
2240
2241         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2242         if (dev->max_hw_sectors) {
2243                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2244                 blk_queue_max_segments(ns->queue,
2245                         ((dev->max_hw_sectors << 9) / dev->page_size) + 1);
2246         }
2247         if (dev->stripe_size)
2248                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2249         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2250                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2251         blk_queue_virt_boundary(ns->queue, dev->page_size - 1);
2252
2253         disk->major = nvme_major;
2254         disk->first_minor = 0;
2255         disk->fops = &nvme_fops;
2256         disk->private_data = ns;
2257         disk->queue = ns->queue;
2258         disk->driverfs_dev = dev->device;
2259         disk->flags = GENHD_FL_EXT_DEVT;
2260         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2261
2262         /*
2263          * Initialize capacity to 0 until we establish the namespace format and
2264          * setup integrity extentions if necessary. The revalidate_disk after
2265          * add_disk allows the driver to register with integrity if the format
2266          * requires it.
2267          */
2268         set_capacity(disk, 0);
2269         if (nvme_revalidate_disk(ns->disk))
2270                 goto out_free_disk;
2271
2272         kref_get(&dev->kref);
2273         if (ns->type != NVME_NS_LIGHTNVM) {
2274                 add_disk(ns->disk);
2275                 if (ns->ms) {
2276                         struct block_device *bd = bdget_disk(ns->disk, 0);
2277                         if (!bd)
2278                                 return;
2279                         if (blkdev_get(bd, FMODE_READ, NULL)) {
2280                                 bdput(bd);
2281                                 return;
2282                         }
2283                         blkdev_reread_part(bd);
2284                         blkdev_put(bd, FMODE_READ);
2285                 }
2286         }
2287         return;
2288  out_free_disk:
2289         kfree(disk);
2290         list_del(&ns->list);
2291  out_free_queue:
2292         blk_cleanup_queue(ns->queue);
2293  out_free_ns:
2294         kfree(ns);
2295 }
2296
2297 /*
2298  * Create I/O queues.  Failing to create an I/O queue is not an issue,
2299  * we can continue with less than the desired amount of queues, and
2300  * even a controller without I/O queues an still be used to issue
2301  * admin commands.  This might be useful to upgrade a buggy firmware
2302  * for example.
2303  */
2304 static void nvme_create_io_queues(struct nvme_dev *dev)
2305 {
2306         unsigned i;
2307
2308         for (i = dev->queue_count; i <= dev->max_qid; i++)
2309                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2310                         break;
2311
2312         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2313                 if (nvme_create_queue(dev->queues[i], i)) {
2314                         nvme_free_queues(dev, i);
2315                         break;
2316                 }
2317 }
2318
2319 static int set_queue_count(struct nvme_dev *dev, int count)
2320 {
2321         int status;
2322         u32 result;
2323         u32 q_count = (count - 1) | ((count - 1) << 16);
2324
2325         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2326                                                                 &result);
2327         if (status < 0)
2328                 return status;
2329         if (status > 0) {
2330                 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2331                 return 0;
2332         }
2333         return min(result & 0xffff, result >> 16) + 1;
2334 }
2335
2336 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2337 {
2338         u64 szu, size, offset;
2339         u32 cmbloc;
2340         resource_size_t bar_size;
2341         struct pci_dev *pdev = to_pci_dev(dev->dev);
2342         void __iomem *cmb;
2343         dma_addr_t dma_addr;
2344
2345         if (!use_cmb_sqes)
2346                 return NULL;
2347
2348         dev->cmbsz = readl(&dev->bar->cmbsz);
2349         if (!(NVME_CMB_SZ(dev->cmbsz)))
2350                 return NULL;
2351
2352         cmbloc = readl(&dev->bar->cmbloc);
2353
2354         szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2355         size = szu * NVME_CMB_SZ(dev->cmbsz);
2356         offset = szu * NVME_CMB_OFST(cmbloc);
2357         bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2358
2359         if (offset > bar_size)
2360                 return NULL;
2361
2362         /*
2363          * Controllers may support a CMB size larger than their BAR,
2364          * for example, due to being behind a bridge. Reduce the CMB to
2365          * the reported size of the BAR
2366          */
2367         if (size > bar_size - offset)
2368                 size = bar_size - offset;
2369
2370         dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2371         cmb = ioremap_wc(dma_addr, size);
2372         if (!cmb)
2373                 return NULL;
2374
2375         dev->cmb_dma_addr = dma_addr;
2376         dev->cmb_size = size;
2377         return cmb;
2378 }
2379
2380 static inline void nvme_release_cmb(struct nvme_dev *dev)
2381 {
2382         if (dev->cmb) {
2383                 iounmap(dev->cmb);
2384                 dev->cmb = NULL;
2385         }
2386 }
2387
2388 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2389 {
2390         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2391 }
2392
2393 static int nvme_setup_io_queues(struct nvme_dev *dev)
2394 {
2395         struct nvme_queue *adminq = dev->queues[0];
2396         struct pci_dev *pdev = to_pci_dev(dev->dev);
2397         int result, i, vecs, nr_io_queues, size;
2398
2399         nr_io_queues = num_possible_cpus();
2400         result = set_queue_count(dev, nr_io_queues);
2401         if (result <= 0)
2402                 return result;
2403         if (result < nr_io_queues)
2404                 nr_io_queues = result;
2405
2406         if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2407                 result = nvme_cmb_qdepth(dev, nr_io_queues,
2408                                 sizeof(struct nvme_command));
2409                 if (result > 0)
2410                         dev->q_depth = result;
2411                 else
2412                         nvme_release_cmb(dev);
2413         }
2414
2415         size = db_bar_size(dev, nr_io_queues);
2416         if (size > 8192) {
2417                 iounmap(dev->bar);
2418                 do {
2419                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2420                         if (dev->bar)
2421                                 break;
2422                         if (!--nr_io_queues)
2423                                 return -ENOMEM;
2424                         size = db_bar_size(dev, nr_io_queues);
2425                 } while (1);
2426                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2427                 adminq->q_db = dev->dbs;
2428         }
2429
2430         /* Deregister the admin queue's interrupt */
2431         free_irq(dev->entry[0].vector, adminq);
2432
2433         /*
2434          * If we enable msix early due to not intx, disable it again before
2435          * setting up the full range we need.
2436          */
2437         if (!pdev->irq)
2438                 pci_disable_msix(pdev);
2439
2440         for (i = 0; i < nr_io_queues; i++)
2441                 dev->entry[i].entry = i;
2442         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2443         if (vecs < 0) {
2444                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2445                 if (vecs < 0) {
2446                         vecs = 1;
2447                 } else {
2448                         for (i = 0; i < vecs; i++)
2449                                 dev->entry[i].vector = i + pdev->irq;
2450                 }
2451         }
2452
2453         /*
2454          * Should investigate if there's a performance win from allocating
2455          * more queues than interrupt vectors; it might allow the submission
2456          * path to scale better, even if the receive path is limited by the
2457          * number of interrupts.
2458          */
2459         nr_io_queues = vecs;
2460         dev->max_qid = nr_io_queues;
2461
2462         result = queue_request_irq(dev, adminq, adminq->irqname);
2463         if (result) {
2464                 adminq->cq_vector = -1;
2465                 goto free_queues;
2466         }
2467
2468         /* Free previously allocated queues that are no longer usable */
2469         nvme_free_queues(dev, nr_io_queues + 1);
2470         nvme_create_io_queues(dev);
2471
2472         return 0;
2473
2474  free_queues:
2475         nvme_free_queues(dev, 1);
2476         return result;
2477 }
2478
2479 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2480 {
2481         struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2482         struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2483
2484         return nsa->ns_id - nsb->ns_id;
2485 }
2486
2487 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2488 {
2489         struct nvme_ns *ns;
2490
2491         list_for_each_entry(ns, &dev->namespaces, list) {
2492                 if (ns->ns_id == nsid)
2493                         return ns;
2494                 if (ns->ns_id > nsid)
2495                         break;
2496         }
2497         return NULL;
2498 }
2499
2500 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2501 {
2502         return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2503                                                         dev->online_queues < 2);
2504 }
2505
2506 static void nvme_ns_remove(struct nvme_ns *ns)
2507 {
2508         bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2509
2510         if (kill)
2511                 blk_set_queue_dying(ns->queue);
2512         if (ns->disk->flags & GENHD_FL_UP)
2513                 del_gendisk(ns->disk);
2514         if (kill || !blk_queue_dying(ns->queue)) {
2515                 blk_mq_abort_requeue_list(ns->queue);
2516                 blk_cleanup_queue(ns->queue);
2517         }
2518         list_del_init(&ns->list);
2519         kref_put(&ns->kref, nvme_free_ns);
2520 }
2521
2522 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2523 {
2524         struct nvme_ns *ns, *next;
2525         unsigned i;
2526
2527         for (i = 1; i <= nn; i++) {
2528                 ns = nvme_find_ns(dev, i);
2529                 if (ns) {
2530                         if (revalidate_disk(ns->disk))
2531                                 nvme_ns_remove(ns);
2532                 } else
2533                         nvme_alloc_ns(dev, i);
2534         }
2535         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2536                 if (ns->ns_id > nn)
2537                         nvme_ns_remove(ns);
2538         }
2539         list_sort(NULL, &dev->namespaces, ns_cmp);
2540 }
2541
2542 static void nvme_set_irq_hints(struct nvme_dev *dev)
2543 {
2544         struct nvme_queue *nvmeq;
2545         int i;
2546
2547         for (i = 0; i < dev->online_queues; i++) {
2548                 nvmeq = dev->queues[i];
2549
2550                 if (!nvmeq->tags || !(*nvmeq->tags))
2551                         continue;
2552
2553                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2554                                         blk_mq_tags_cpumask(*nvmeq->tags));
2555         }
2556 }
2557
2558 static void nvme_dev_scan(struct work_struct *work)
2559 {
2560         struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2561         struct nvme_id_ctrl *ctrl;
2562
2563         if (!dev->tagset.tags)
2564                 return;
2565         if (nvme_identify_ctrl(dev, &ctrl))
2566                 return;
2567         nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2568         kfree(ctrl);
2569         nvme_set_irq_hints(dev);
2570 }
2571
2572 /*
2573  * Return: error value if an error occurred setting up the queues or calling
2574  * Identify Device.  0 if these succeeded, even if adding some of the
2575  * namespaces failed.  At the moment, these failures are silent.  TBD which
2576  * failures should be reported.
2577  */
2578 static int nvme_dev_add(struct nvme_dev *dev)
2579 {
2580         struct pci_dev *pdev = to_pci_dev(dev->dev);
2581         int res;
2582         struct nvme_id_ctrl *ctrl;
2583         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2584
2585         res = nvme_identify_ctrl(dev, &ctrl);
2586         if (res) {
2587                 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2588                 return -EIO;
2589         }
2590
2591         dev->oncs = le16_to_cpup(&ctrl->oncs);
2592         dev->abort_limit = ctrl->acl + 1;
2593         dev->vwc = ctrl->vwc;
2594         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2595         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2596         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2597         if (ctrl->mdts)
2598                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2599         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2600                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2601                 unsigned int max_hw_sectors;
2602
2603                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2604                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2605                 if (dev->max_hw_sectors) {
2606                         dev->max_hw_sectors = min(max_hw_sectors,
2607                                                         dev->max_hw_sectors);
2608                 } else
2609                         dev->max_hw_sectors = max_hw_sectors;
2610         }
2611         kfree(ctrl);
2612
2613         if (!dev->tagset.tags) {
2614                 dev->tagset.ops = &nvme_mq_ops;
2615                 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2616                 dev->tagset.timeout = NVME_IO_TIMEOUT;
2617                 dev->tagset.numa_node = dev_to_node(dev->dev);
2618                 dev->tagset.queue_depth =
2619                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2620                 dev->tagset.cmd_size = nvme_cmd_size(dev);
2621                 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2622                 dev->tagset.driver_data = dev;
2623
2624                 if (blk_mq_alloc_tag_set(&dev->tagset))
2625                         return 0;
2626         }
2627         schedule_work(&dev->scan_work);
2628         return 0;
2629 }
2630
2631 static int nvme_dev_map(struct nvme_dev *dev)
2632 {
2633         u64 cap;
2634         int bars, result = -ENOMEM;
2635         struct pci_dev *pdev = to_pci_dev(dev->dev);
2636
2637         if (pci_enable_device_mem(pdev))
2638                 return result;
2639
2640         dev->entry[0].vector = pdev->irq;
2641         pci_set_master(pdev);
2642         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2643         if (!bars)
2644                 goto disable_pci;
2645
2646         if (pci_request_selected_regions(pdev, bars, "nvme"))
2647                 goto disable_pci;
2648
2649         if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2650             dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2651                 goto disable;
2652
2653         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2654         if (!dev->bar)
2655                 goto disable;
2656
2657         if (readl(&dev->bar->csts) == -1) {
2658                 result = -ENODEV;
2659                 goto unmap;
2660         }
2661
2662         /*
2663          * Some devices don't advertse INTx interrupts, pre-enable a single
2664          * MSIX vec for setup. We'll adjust this later.
2665          */
2666         if (!pdev->irq) {
2667                 result = pci_enable_msix(pdev, dev->entry, 1);
2668                 if (result < 0)
2669                         goto unmap;
2670         }
2671
2672         cap = readq(&dev->bar->cap);
2673         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2674         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2675         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2676         if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2677                 dev->cmb = nvme_map_cmb(dev);
2678
2679         return 0;
2680
2681  unmap:
2682         iounmap(dev->bar);
2683         dev->bar = NULL;
2684  disable:
2685         pci_release_regions(pdev);
2686  disable_pci:
2687         pci_disable_device(pdev);
2688         return result;
2689 }
2690
2691 static void nvme_dev_unmap(struct nvme_dev *dev)
2692 {
2693         struct pci_dev *pdev = to_pci_dev(dev->dev);
2694
2695         if (pdev->msi_enabled)
2696                 pci_disable_msi(pdev);
2697         else if (pdev->msix_enabled)
2698                 pci_disable_msix(pdev);
2699
2700         if (dev->bar) {
2701                 iounmap(dev->bar);
2702                 dev->bar = NULL;
2703                 pci_release_regions(pdev);
2704         }
2705
2706         if (pci_is_enabled(pdev))
2707                 pci_disable_device(pdev);
2708 }
2709
2710 struct nvme_delq_ctx {
2711         struct task_struct *waiter;
2712         struct kthread_worker *worker;
2713         atomic_t refcount;
2714 };
2715
2716 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2717 {
2718         dq->waiter = current;
2719         mb();
2720
2721         for (;;) {
2722                 set_current_state(TASK_KILLABLE);
2723                 if (!atomic_read(&dq->refcount))
2724                         break;
2725                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2726                                         fatal_signal_pending(current)) {
2727                         /*
2728                          * Disable the controller first since we can't trust it
2729                          * at this point, but leave the admin queue enabled
2730                          * until all queue deletion requests are flushed.
2731                          * FIXME: This may take a while if there are more h/w
2732                          * queues than admin tags.
2733                          */
2734                         set_current_state(TASK_RUNNING);
2735                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2736                         nvme_clear_queue(dev->queues[0]);
2737                         flush_kthread_worker(dq->worker);
2738                         nvme_disable_queue(dev, 0);
2739                         return;
2740                 }
2741         }
2742         set_current_state(TASK_RUNNING);
2743 }
2744
2745 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2746 {
2747         atomic_dec(&dq->refcount);
2748         if (dq->waiter)
2749                 wake_up_process(dq->waiter);
2750 }
2751
2752 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2753 {
2754         atomic_inc(&dq->refcount);
2755         return dq;
2756 }
2757
2758 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2759 {
2760         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2761         nvme_put_dq(dq);
2762 }
2763
2764 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2765                                                 kthread_work_func_t fn)
2766 {
2767         struct nvme_command c;
2768
2769         memset(&c, 0, sizeof(c));
2770         c.delete_queue.opcode = opcode;
2771         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2772
2773         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2774         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2775                                                                 ADMIN_TIMEOUT);
2776 }
2777
2778 static void nvme_del_cq_work_handler(struct kthread_work *work)
2779 {
2780         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2781                                                         cmdinfo.work);
2782         nvme_del_queue_end(nvmeq);
2783 }
2784
2785 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2786 {
2787         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2788                                                 nvme_del_cq_work_handler);
2789 }
2790
2791 static void nvme_del_sq_work_handler(struct kthread_work *work)
2792 {
2793         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2794                                                         cmdinfo.work);
2795         int status = nvmeq->cmdinfo.status;
2796
2797         if (!status)
2798                 status = nvme_delete_cq(nvmeq);
2799         if (status)
2800                 nvme_del_queue_end(nvmeq);
2801 }
2802
2803 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2804 {
2805         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2806                                                 nvme_del_sq_work_handler);
2807 }
2808
2809 static void nvme_del_queue_start(struct kthread_work *work)
2810 {
2811         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2812                                                         cmdinfo.work);
2813         if (nvme_delete_sq(nvmeq))
2814                 nvme_del_queue_end(nvmeq);
2815 }
2816
2817 static void nvme_disable_io_queues(struct nvme_dev *dev)
2818 {
2819         int i;
2820         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2821         struct nvme_delq_ctx dq;
2822         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2823                                         &worker, "nvme%d", dev->instance);
2824
2825         if (IS_ERR(kworker_task)) {
2826                 dev_err(dev->dev,
2827                         "Failed to create queue del task\n");
2828                 for (i = dev->queue_count - 1; i > 0; i--)
2829                         nvme_disable_queue(dev, i);
2830                 return;
2831         }
2832
2833         dq.waiter = NULL;
2834         atomic_set(&dq.refcount, 0);
2835         dq.worker = &worker;
2836         for (i = dev->queue_count - 1; i > 0; i--) {
2837                 struct nvme_queue *nvmeq = dev->queues[i];
2838
2839                 if (nvme_suspend_queue(nvmeq))
2840                         continue;
2841                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2842                 nvmeq->cmdinfo.worker = dq.worker;
2843                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2844                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2845         }
2846         nvme_wait_dq(&dq, dev);
2847         kthread_stop(kworker_task);
2848 }
2849
2850 /*
2851 * Remove the node from the device list and check
2852 * for whether or not we need to stop the nvme_thread.
2853 */
2854 static void nvme_dev_list_remove(struct nvme_dev *dev)
2855 {
2856         struct task_struct *tmp = NULL;
2857
2858         spin_lock(&dev_list_lock);
2859         list_del_init(&dev->node);
2860         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2861                 tmp = nvme_thread;
2862                 nvme_thread = NULL;
2863         }
2864         spin_unlock(&dev_list_lock);
2865
2866         if (tmp)
2867                 kthread_stop(tmp);
2868 }
2869
2870 static void nvme_freeze_queues(struct nvme_dev *dev)
2871 {
2872         struct nvme_ns *ns;
2873
2874         list_for_each_entry(ns, &dev->namespaces, list) {
2875                 blk_mq_freeze_queue_start(ns->queue);
2876
2877                 spin_lock_irq(ns->queue->queue_lock);
2878                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2879                 spin_unlock_irq(ns->queue->queue_lock);
2880
2881                 blk_mq_cancel_requeue_work(ns->queue);
2882                 blk_mq_stop_hw_queues(ns->queue);
2883         }
2884 }
2885
2886 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2887 {
2888         struct nvme_ns *ns;
2889
2890         list_for_each_entry(ns, &dev->namespaces, list) {
2891                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2892                 blk_mq_unfreeze_queue(ns->queue);
2893                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2894                 blk_mq_kick_requeue_list(ns->queue);
2895         }
2896 }
2897
2898 static void nvme_dev_shutdown(struct nvme_dev *dev)
2899 {
2900         int i;
2901         u32 csts = -1;
2902
2903         nvme_dev_list_remove(dev);
2904
2905         if (dev->bar) {
2906                 nvme_freeze_queues(dev);
2907                 csts = readl(&dev->bar->csts);
2908         }
2909         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2910                 for (i = dev->queue_count - 1; i >= 0; i--) {
2911                         struct nvme_queue *nvmeq = dev->queues[i];
2912                         nvme_suspend_queue(nvmeq);
2913                 }
2914         } else {
2915                 nvme_disable_io_queues(dev);
2916                 nvme_shutdown_ctrl(dev);
2917                 nvme_disable_queue(dev, 0);
2918         }
2919         nvme_dev_unmap(dev);
2920
2921         for (i = dev->queue_count - 1; i >= 0; i--)
2922                 nvme_clear_queue(dev->queues[i]);
2923 }
2924
2925 static void nvme_dev_remove(struct nvme_dev *dev)
2926 {
2927         struct nvme_ns *ns, *next;
2928
2929         list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2930                 nvme_ns_remove(ns);
2931 }
2932
2933 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2934 {
2935         dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2936                                                 PAGE_SIZE, PAGE_SIZE, 0);
2937         if (!dev->prp_page_pool)
2938                 return -ENOMEM;
2939
2940         /* Optimisation for I/Os between 4k and 128k */
2941         dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2942                                                 256, 256, 0);
2943         if (!dev->prp_small_pool) {
2944                 dma_pool_destroy(dev->prp_page_pool);
2945                 return -ENOMEM;
2946         }
2947         return 0;
2948 }
2949
2950 static void nvme_release_prp_pools(struct nvme_dev *dev)
2951 {
2952         dma_pool_destroy(dev->prp_page_pool);
2953         dma_pool_destroy(dev->prp_small_pool);
2954 }
2955
2956 static DEFINE_IDA(nvme_instance_ida);
2957
2958 static int nvme_set_instance(struct nvme_dev *dev)
2959 {
2960         int instance, error;
2961
2962         do {
2963                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2964                         return -ENODEV;
2965
2966                 spin_lock(&dev_list_lock);
2967                 error = ida_get_new(&nvme_instance_ida, &instance);
2968                 spin_unlock(&dev_list_lock);
2969         } while (error == -EAGAIN);
2970
2971         if (error)
2972                 return -ENODEV;
2973
2974         dev->instance = instance;
2975         return 0;
2976 }
2977
2978 static void nvme_release_instance(struct nvme_dev *dev)
2979 {
2980         spin_lock(&dev_list_lock);
2981         ida_remove(&nvme_instance_ida, dev->instance);
2982         spin_unlock(&dev_list_lock);
2983 }
2984
2985 static void nvme_free_dev(struct kref *kref)
2986 {
2987         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2988
2989         put_device(dev->dev);
2990         put_device(dev->device);
2991         nvme_release_instance(dev);
2992         if (dev->tagset.tags)
2993                 blk_mq_free_tag_set(&dev->tagset);
2994         if (dev->admin_q)
2995                 blk_put_queue(dev->admin_q);
2996         kfree(dev->queues);
2997         kfree(dev->entry);
2998         kfree(dev);
2999 }
3000
3001 static int nvme_dev_open(struct inode *inode, struct file *f)
3002 {
3003         struct nvme_dev *dev;
3004         int instance = iminor(inode);
3005         int ret = -ENODEV;
3006
3007         spin_lock(&dev_list_lock);
3008         list_for_each_entry(dev, &dev_list, node) {
3009                 if (dev->instance == instance) {
3010                         if (!dev->admin_q) {
3011                                 ret = -EWOULDBLOCK;
3012                                 break;
3013                         }
3014                         if (!kref_get_unless_zero(&dev->kref))
3015                                 break;
3016                         f->private_data = dev;
3017                         ret = 0;
3018                         break;
3019                 }
3020         }
3021         spin_unlock(&dev_list_lock);
3022
3023         return ret;
3024 }
3025
3026 static int nvme_dev_release(struct inode *inode, struct file *f)
3027 {
3028         struct nvme_dev *dev = f->private_data;
3029         kref_put(&dev->kref, nvme_free_dev);
3030         return 0;
3031 }
3032
3033 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
3034 {
3035         struct nvme_dev *dev = f->private_data;
3036         struct nvme_ns *ns;
3037
3038         switch (cmd) {
3039         case NVME_IOCTL_ADMIN_CMD:
3040                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
3041         case NVME_IOCTL_IO_CMD:
3042                 if (list_empty(&dev->namespaces))
3043                         return -ENOTTY;
3044                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
3045                 return nvme_user_cmd(dev, ns, (void __user *)arg);
3046         case NVME_IOCTL_RESET:
3047                 dev_warn(dev->dev, "resetting controller\n");
3048                 return nvme_reset(dev);
3049         case NVME_IOCTL_SUBSYS_RESET:
3050                 return nvme_subsys_reset(dev);
3051         default:
3052                 return -ENOTTY;
3053         }
3054 }
3055
3056 static const struct file_operations nvme_dev_fops = {
3057         .owner          = THIS_MODULE,
3058         .open           = nvme_dev_open,
3059         .release        = nvme_dev_release,
3060         .unlocked_ioctl = nvme_dev_ioctl,
3061         .compat_ioctl   = nvme_dev_ioctl,
3062 };
3063
3064 static void nvme_probe_work(struct work_struct *work)
3065 {
3066         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3067         bool start_thread = false;
3068         int result;
3069
3070         result = nvme_dev_map(dev);
3071         if (result)
3072                 goto out;
3073
3074         result = nvme_configure_admin_queue(dev);
3075         if (result)
3076                 goto unmap;
3077
3078         spin_lock(&dev_list_lock);
3079         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
3080                 start_thread = true;
3081                 nvme_thread = NULL;
3082         }
3083         list_add(&dev->node, &dev_list);
3084         spin_unlock(&dev_list_lock);
3085
3086         if (start_thread) {
3087                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
3088                 wake_up_all(&nvme_kthread_wait);
3089         } else
3090                 wait_event_killable(nvme_kthread_wait, nvme_thread);
3091
3092         if (IS_ERR_OR_NULL(nvme_thread)) {
3093                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
3094                 goto disable;
3095         }
3096
3097         nvme_init_queue(dev->queues[0], 0);
3098         result = nvme_alloc_admin_tags(dev);
3099         if (result)
3100                 goto disable;
3101
3102         result = nvme_setup_io_queues(dev);
3103         if (result)
3104                 goto free_tags;
3105
3106         dev->event_limit = 1;
3107
3108         /*
3109          * Keep the controller around but remove all namespaces if we don't have
3110          * any working I/O queue.
3111          */
3112         if (dev->online_queues < 2) {
3113                 dev_warn(dev->dev, "IO queues not created\n");
3114                 nvme_dev_remove(dev);
3115         } else {
3116                 nvme_unfreeze_queues(dev);
3117                 nvme_dev_add(dev);
3118         }
3119
3120         return;
3121
3122  free_tags:
3123         nvme_dev_remove_admin(dev);
3124         blk_put_queue(dev->admin_q);
3125         dev->admin_q = NULL;
3126         dev->queues[0]->tags = NULL;
3127  disable:
3128         nvme_disable_queue(dev, 0);
3129         nvme_dev_list_remove(dev);
3130  unmap:
3131         nvme_dev_unmap(dev);
3132  out:
3133         if (!work_busy(&dev->reset_work))
3134                 nvme_dead_ctrl(dev);
3135 }
3136
3137 static int nvme_remove_dead_ctrl(void *arg)
3138 {
3139         struct nvme_dev *dev = (struct nvme_dev *)arg;
3140         struct pci_dev *pdev = to_pci_dev(dev->dev);
3141
3142         if (pci_get_drvdata(pdev))
3143                 pci_stop_and_remove_bus_device_locked(pdev);
3144         kref_put(&dev->kref, nvme_free_dev);
3145         return 0;
3146 }
3147
3148 static void nvme_dead_ctrl(struct nvme_dev *dev)
3149 {
3150         dev_warn(dev->dev, "Device failed to resume\n");
3151         kref_get(&dev->kref);
3152         if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3153                                                 dev->instance))) {
3154                 dev_err(dev->dev,
3155                         "Failed to start controller remove task\n");
3156                 kref_put(&dev->kref, nvme_free_dev);
3157         }
3158 }
3159
3160 static void nvme_reset_work(struct work_struct *ws)
3161 {
3162         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3163         bool in_probe = work_busy(&dev->probe_work);
3164
3165         nvme_dev_shutdown(dev);
3166
3167         /* Synchronize with device probe so that work will see failure status
3168          * and exit gracefully without trying to schedule another reset */
3169         flush_work(&dev->probe_work);
3170
3171         /* Fail this device if reset occured during probe to avoid
3172          * infinite initialization loops. */
3173         if (in_probe) {
3174                 nvme_dead_ctrl(dev);
3175                 return;
3176         }
3177         /* Schedule device resume asynchronously so the reset work is available
3178          * to cleanup errors that may occur during reinitialization */
3179         schedule_work(&dev->probe_work);
3180 }
3181
3182 static int __nvme_reset(struct nvme_dev *dev)
3183 {
3184         if (work_pending(&dev->reset_work))
3185                 return -EBUSY;
3186         list_del_init(&dev->node);
3187         queue_work(nvme_workq, &dev->reset_work);
3188         return 0;
3189 }
3190
3191 static int nvme_reset(struct nvme_dev *dev)
3192 {
3193         int ret;
3194
3195         if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3196                 return -ENODEV;
3197
3198         spin_lock(&dev_list_lock);
3199         ret = __nvme_reset(dev);
3200         spin_unlock(&dev_list_lock);
3201
3202         if (!ret) {
3203                 flush_work(&dev->reset_work);
3204                 flush_work(&dev->probe_work);
3205                 return 0;
3206         }
3207
3208         return ret;
3209 }
3210
3211 static ssize_t nvme_sysfs_reset(struct device *dev,
3212                                 struct device_attribute *attr, const char *buf,
3213                                 size_t count)
3214 {
3215         struct nvme_dev *ndev = dev_get_drvdata(dev);
3216         int ret;
3217
3218         ret = nvme_reset(ndev);
3219         if (ret < 0)
3220                 return ret;
3221
3222         return count;
3223 }
3224 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3225
3226 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3227 {
3228         int node, result = -ENOMEM;
3229         struct nvme_dev *dev;
3230
3231         node = dev_to_node(&pdev->dev);
3232         if (node == NUMA_NO_NODE)
3233                 set_dev_node(&pdev->dev, 0);
3234
3235         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3236         if (!dev)
3237                 return -ENOMEM;
3238         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3239                                                         GFP_KERNEL, node);
3240         if (!dev->entry)
3241                 goto free;
3242         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3243                                                         GFP_KERNEL, node);
3244         if (!dev->queues)
3245                 goto free;
3246
3247         INIT_LIST_HEAD(&dev->namespaces);
3248         INIT_WORK(&dev->reset_work, nvme_reset_work);
3249         dev->dev = get_device(&pdev->dev);
3250         pci_set_drvdata(pdev, dev);
3251         result = nvme_set_instance(dev);
3252         if (result)
3253                 goto put_pci;
3254
3255         result = nvme_setup_prp_pools(dev);
3256         if (result)
3257                 goto release;
3258
3259         kref_init(&dev->kref);
3260         dev->device = device_create(nvme_class, &pdev->dev,
3261                                 MKDEV(nvme_char_major, dev->instance),
3262                                 dev, "nvme%d", dev->instance);
3263         if (IS_ERR(dev->device)) {
3264                 result = PTR_ERR(dev->device);
3265                 goto release_pools;
3266         }
3267         get_device(dev->device);
3268         dev_set_drvdata(dev->device, dev);
3269
3270         result = device_create_file(dev->device, &dev_attr_reset_controller);
3271         if (result)
3272                 goto put_dev;
3273
3274         INIT_LIST_HEAD(&dev->node);
3275         INIT_WORK(&dev->scan_work, nvme_dev_scan);
3276         INIT_WORK(&dev->probe_work, nvme_probe_work);
3277         schedule_work(&dev->probe_work);
3278         return 0;
3279
3280  put_dev:
3281         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3282         put_device(dev->device);
3283  release_pools:
3284         nvme_release_prp_pools(dev);
3285  release:
3286         nvme_release_instance(dev);
3287  put_pci:
3288         put_device(dev->dev);
3289  free:
3290         kfree(dev->queues);
3291         kfree(dev->entry);
3292         kfree(dev);
3293         return result;
3294 }
3295
3296 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3297 {
3298         struct nvme_dev *dev = pci_get_drvdata(pdev);
3299
3300         if (prepare)
3301                 nvme_dev_shutdown(dev);
3302         else
3303                 schedule_work(&dev->probe_work);
3304 }
3305
3306 static void nvme_shutdown(struct pci_dev *pdev)
3307 {
3308         struct nvme_dev *dev = pci_get_drvdata(pdev);
3309         nvme_dev_shutdown(dev);
3310 }
3311
3312 static void nvme_remove(struct pci_dev *pdev)
3313 {
3314         struct nvme_dev *dev = pci_get_drvdata(pdev);
3315
3316         spin_lock(&dev_list_lock);
3317         list_del_init(&dev->node);
3318         spin_unlock(&dev_list_lock);
3319
3320         pci_set_drvdata(pdev, NULL);
3321         flush_work(&dev->probe_work);
3322         flush_work(&dev->reset_work);
3323         flush_work(&dev->scan_work);
3324         device_remove_file(dev->device, &dev_attr_reset_controller);
3325         nvme_dev_remove(dev);
3326         nvme_dev_shutdown(dev);
3327         nvme_dev_remove_admin(dev);
3328         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3329         nvme_free_queues(dev, 0);
3330         nvme_release_cmb(dev);
3331         nvme_release_prp_pools(dev);
3332         kref_put(&dev->kref, nvme_free_dev);
3333 }
3334
3335 /* These functions are yet to be implemented */
3336 #define nvme_error_detected NULL
3337 #define nvme_dump_registers NULL
3338 #define nvme_link_reset NULL
3339 #define nvme_slot_reset NULL
3340 #define nvme_error_resume NULL
3341
3342 #ifdef CONFIG_PM_SLEEP
3343 static int nvme_suspend(struct device *dev)
3344 {
3345         struct pci_dev *pdev = to_pci_dev(dev);
3346         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3347
3348         nvme_dev_shutdown(ndev);
3349         return 0;
3350 }
3351
3352 static int nvme_resume(struct device *dev)
3353 {
3354         struct pci_dev *pdev = to_pci_dev(dev);
3355         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3356
3357         schedule_work(&ndev->probe_work);
3358         return 0;
3359 }
3360 #endif
3361
3362 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3363
3364 static const struct pci_error_handlers nvme_err_handler = {
3365         .error_detected = nvme_error_detected,
3366         .mmio_enabled   = nvme_dump_registers,
3367         .link_reset     = nvme_link_reset,
3368         .slot_reset     = nvme_slot_reset,
3369         .resume         = nvme_error_resume,
3370         .reset_notify   = nvme_reset_notify,
3371 };
3372
3373 /* Move to pci_ids.h later */
3374 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3375
3376 static const struct pci_device_id nvme_id_table[] = {
3377         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3378         { 0, }
3379 };
3380 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3381
3382 static struct pci_driver nvme_driver = {
3383         .name           = "nvme",
3384         .id_table       = nvme_id_table,
3385         .probe          = nvme_probe,
3386         .remove         = nvme_remove,
3387         .shutdown       = nvme_shutdown,
3388         .driver         = {
3389                 .pm     = &nvme_dev_pm_ops,
3390         },
3391         .err_handler    = &nvme_err_handler,
3392 };
3393
3394 static int __init nvme_init(void)
3395 {
3396         int result;
3397
3398         init_waitqueue_head(&nvme_kthread_wait);
3399
3400         nvme_workq = create_singlethread_workqueue("nvme");
3401         if (!nvme_workq)
3402                 return -ENOMEM;
3403
3404         result = register_blkdev(nvme_major, "nvme");
3405         if (result < 0)
3406                 goto kill_workq;
3407         else if (result > 0)
3408                 nvme_major = result;
3409
3410         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3411                                                         &nvme_dev_fops);
3412         if (result < 0)
3413                 goto unregister_blkdev;
3414         else if (result > 0)
3415                 nvme_char_major = result;
3416
3417         nvme_class = class_create(THIS_MODULE, "nvme");
3418         if (IS_ERR(nvme_class)) {
3419                 result = PTR_ERR(nvme_class);
3420                 goto unregister_chrdev;
3421         }
3422
3423         result = pci_register_driver(&nvme_driver);
3424         if (result)
3425                 goto destroy_class;
3426         return 0;
3427
3428  destroy_class:
3429         class_destroy(nvme_class);
3430  unregister_chrdev:
3431         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3432  unregister_blkdev:
3433         unregister_blkdev(nvme_major, "nvme");
3434  kill_workq:
3435         destroy_workqueue(nvme_workq);
3436         return result;
3437 }
3438
3439 static void __exit nvme_exit(void)
3440 {
3441         pci_unregister_driver(&nvme_driver);
3442         unregister_blkdev(nvme_major, "nvme");
3443         destroy_workqueue(nvme_workq);
3444         class_destroy(nvme_class);
3445         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3446         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3447         _nvme_check_size();
3448 }
3449
3450 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3451 MODULE_LICENSE("GPL");
3452 MODULE_VERSION("1.0");
3453 module_init(nvme_init);
3454 module_exit(nvme_exit);